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scsi: ufs-qcom: phy/hcd: Refactoring phy clock handling 

Add phy clock enable code to phy_power_on/off callbacks, and
remove explicit calls to enable these phy clocks from the
ufs-qcom hcd driver.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Vivek Gautam 2016-11-08 15:37:48 +05:30 committed by Martin K. Petersen
parent 9c7ce698ba
commit feb3d79800
3 changed files with 24 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
drivers/phy/phy-qcom-ufs.c
View File

@ -361,10 +361,9 @@ out:
return ret;
}
int ufs_qcom_phy_enable_ref_clk(struct phy *generic_phy)
static int ufs_qcom_phy_enable_ref_clk(struct ufs_qcom_phy *phy)
{
int ret = 0;
struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy);
if (phy->is_ref_clk_enabled)
goto out;
@ -411,7 +410,6 @@ out_disable_src:
out:
return ret;
}
EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_ref_clk);
static int ufs_qcom_phy_disable_vreg(struct device *dev,
struct ufs_qcom_phy_vreg *vreg)
@ -435,10 +433,8 @@ out:
return ret;
}
void ufs_qcom_phy_disable_ref_clk(struct phy *generic_phy)
static void ufs_qcom_phy_disable_ref_clk(struct ufs_qcom_phy *phy)
{
struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy);
if (phy->is_ref_clk_enabled) {
clk_disable_unprepare(phy->ref_clk);
/*
@ -451,7 +447,6 @@ void ufs_qcom_phy_disable_ref_clk(struct phy *generic_phy)
phy->is_ref_clk_enabled = false;
}
}
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_ref_clk);
#define UFS_REF_CLK_EN (1 << 5)
@ -504,9 +499,8 @@ void ufs_qcom_phy_disable_dev_ref_clk(struct phy *generic_phy)
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_dev_ref_clk);
/* Turn ON M-PHY RMMI interface clocks */
int ufs_qcom_phy_enable_iface_clk(struct phy *generic_phy)
static int ufs_qcom_phy_enable_iface_clk(struct ufs_qcom_phy *phy)
{
struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy);
int ret = 0;
if (phy->is_iface_clk_enabled)
@ -530,20 +524,16 @@ int ufs_qcom_phy_enable_iface_clk(struct phy *generic_phy)
out:
return ret;
}
EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_iface_clk);
/* Turn OFF M-PHY RMMI interface clocks */
void ufs_qcom_phy_disable_iface_clk(struct phy *generic_phy)
void ufs_qcom_phy_disable_iface_clk(struct ufs_qcom_phy *phy)
{
struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy);
if (phy->is_iface_clk_enabled) {
clk_disable_unprepare(phy->tx_iface_clk);
clk_disable_unprepare(phy->rx_iface_clk);
phy->is_iface_clk_enabled = false;
}
}
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_iface_clk);
int ufs_qcom_phy_start_serdes(struct phy *generic_phy)
{
@ -661,11 +651,18 @@ int ufs_qcom_phy_power_on(struct phy *generic_phy)
goto out_disable_phy;
}
err = ufs_qcom_phy_enable_ref_clk(generic_phy);
err = ufs_qcom_phy_enable_iface_clk(phy_common);
if (err) {
dev_err(dev, "%s enable phy iface clock failed, err=%d\n",
__func__, err);
goto out_disable_pll;
}
err = ufs_qcom_phy_enable_ref_clk(phy_common);
if (err) {
dev_err(dev, "%s enable phy ref clock failed, err=%d\n",
__func__, err);
goto out_disable_pll;
goto out_disable_iface_clk;
}
/* enable device PHY ref_clk pad rail */
@ -683,7 +680,9 @@ int ufs_qcom_phy_power_on(struct phy *generic_phy)
goto out;
out_disable_ref_clk:
ufs_qcom_phy_disable_ref_clk(generic_phy);
ufs_qcom_phy_disable_ref_clk(phy_common);
out_disable_iface_clk:
ufs_qcom_phy_disable_iface_clk(phy_common);
out_disable_pll:
ufs_qcom_phy_disable_vreg(dev, &phy_common->vdda_pll);
out_disable_phy:
@ -702,7 +701,8 @@ int ufs_qcom_phy_power_off(struct phy *generic_phy)
if (phy_common->vddp_ref_clk.reg)
ufs_qcom_phy_disable_vreg(phy_common->dev,
&phy_common->vddp_ref_clk);
ufs_qcom_phy_disable_ref_clk(generic_phy);
ufs_qcom_phy_disable_ref_clk(phy_common);
ufs_qcom_phy_disable_iface_clk(phy_common);
ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_pll);
ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_phy);

21
drivers/scsi/ufs/ufs-qcom.c
View File

@ -1114,17 +1114,8 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on,
return 0;
if (on && (status == POST_CHANGE)) {
err = ufs_qcom_phy_enable_iface_clk(host->generic_phy);
if (err)
goto out;
phy_power_on(host->generic_phy);
err = ufs_qcom_phy_enable_ref_clk(host->generic_phy);
if (err) {
dev_err(hba->dev, "%s enable phy ref clock failed, err=%d\n",
__func__, err);
ufs_qcom_phy_disable_iface_clk(host->generic_phy);
goto out;
}
/* enable the device ref clock for HS mode*/
if (ufshcd_is_hs_mode(&hba->pwr_info))
ufs_qcom_dev_ref_clk_ctrl(host, true);
@ -1133,13 +1124,14 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on,
ufs_qcom_update_bus_bw_vote(host);
} else if (!on && (status == PRE_CHANGE)) {
/* M-PHY RMMI interface clocks can be turned off */
ufs_qcom_phy_disable_iface_clk(host->generic_phy);
if (!ufs_qcom_is_link_active(hba))
if (!ufs_qcom_is_link_active(hba)) {
/* disable device ref_clk */
ufs_qcom_dev_ref_clk_ctrl(host, false);
/* powering off PHY during aggressive clk gating */
phy_power_off(host->generic_phy);
}
vote = host->bus_vote.min_bw_vote;
}
@ -1148,7 +1140,6 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on,
dev_err(hba->dev, "%s: set bus vote failed %d\n",
__func__, err);
out:
return err;
}

18
include/linux/phy/phy-qcom-ufs.h
View File

@ -17,22 +17,6 @@
#include "phy.h"
/**
* ufs_qcom_phy_enable_ref_clk() - Enable the phy
* ref clock.
* @phy: reference to a generic phy
*
* returns 0 for success, and non-zero for error.
*/
int ufs_qcom_phy_enable_ref_clk(struct phy *phy);
/**
* ufs_qcom_phy_disable_ref_clk() - Disable the phy
* ref clock.
* @phy: reference to a generic phy.
*/
void ufs_qcom_phy_disable_ref_clk(struct phy *phy);
/**
* ufs_qcom_phy_enable_dev_ref_clk() - Enable the device
* ref clock.
@ -47,8 +31,6 @@ void ufs_qcom_phy_enable_dev_ref_clk(struct phy *phy);
*/
void ufs_qcom_phy_disable_dev_ref_clk(struct phy *phy);
int ufs_qcom_phy_enable_iface_clk(struct phy *phy);
void ufs_qcom_phy_disable_iface_clk(struct phy *phy);
int ufs_qcom_phy_start_serdes(struct phy *phy);
int ufs_qcom_phy_set_tx_lane_enable(struct phy *phy, u32 tx_lanes);
int ufs_qcom_phy_calibrate_phy(struct phy *phy, bool is_rate_B);