mfd: Provide a generic version of mc13xxx adc_do_conversion
This is needed to convert the touch driver away from using struct mc13783. Note this patch drops MC13783_ADC0_ADREFMODE. This is unused and doesn't exist on mc13892. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
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@ -26,12 +26,12 @@ struct mc13xxx {
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irq_handler_t irqhandler[MC13XXX_NUM_IRQ];
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irq_handler_t irqhandler[MC13XXX_NUM_IRQ];
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void *irqdata[MC13XXX_NUM_IRQ];
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void *irqdata[MC13XXX_NUM_IRQ];
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int adcflags;
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};
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};
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struct mc13783 {
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struct mc13783 {
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struct mc13xxx mc13xxx;
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struct mc13xxx mc13xxx;
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int adcflags;
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};
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};
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struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783)
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struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783)
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@ -136,14 +136,14 @@ EXPORT_SYMBOL(mc13783_to_mc13xxx);
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#define MC13XXX_REVISION_FAB (0x03 << 11)
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#define MC13XXX_REVISION_FAB (0x03 << 11)
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#define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
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#define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
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#define MC13783_ADC1 44
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#define MC13XXX_ADC1 44
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#define MC13783_ADC1_ADEN (1 << 0)
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#define MC13XXX_ADC1_ADEN (1 << 0)
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#define MC13783_ADC1_RAND (1 << 1)
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#define MC13XXX_ADC1_RAND (1 << 1)
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#define MC13783_ADC1_ADSEL (1 << 3)
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#define MC13XXX_ADC1_ADSEL (1 << 3)
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#define MC13783_ADC1_ASC (1 << 20)
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#define MC13XXX_ADC1_ASC (1 << 20)
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#define MC13783_ADC1_ADTRIGIGN (1 << 21)
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#define MC13XXX_ADC1_ADTRIGIGN (1 << 21)
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#define MC13783_ADC2 45
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#define MC13XXX_ADC2 45
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#define MC13XXX_NUMREGS 0x3f
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#define MC13XXX_NUMREGS 0x3f
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@ -569,15 +569,15 @@ int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
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}
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}
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EXPORT_SYMBOL(mc13xxx_get_flags);
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EXPORT_SYMBOL(mc13xxx_get_flags);
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#define MC13783_ADC1_CHAN0_SHIFT 5
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#define MC13XXX_ADC1_CHAN0_SHIFT 5
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#define MC13783_ADC1_CHAN1_SHIFT 8
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#define MC13XXX_ADC1_CHAN1_SHIFT 8
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struct mc13xxx_adcdone_data {
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struct mc13xxx_adcdone_data {
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struct mc13xxx *mc13xxx;
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struct mc13xxx *mc13xxx;
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struct completion done;
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struct completion done;
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};
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};
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static irqreturn_t mc13783_handler_adcdone(int irq, void *data)
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static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
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{
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{
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struct mc13xxx_adcdone_data *adcdone_data = data;
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struct mc13xxx_adcdone_data *adcdone_data = data;
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@ -588,12 +588,11 @@ static irqreturn_t mc13783_handler_adcdone(int irq, void *data)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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#define MC13783_ADC_WORKING (1 << 0)
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#define MC13XXX_ADC_WORKING (1 << 0)
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int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
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unsigned int channel, unsigned int *sample)
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unsigned int channel, unsigned int *sample)
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{
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{
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struct mc13xxx *mc13xxx = &mc13783->mc13xxx;
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u32 adc0, adc1, old_adc0;
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u32 adc0, adc1, old_adc0;
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int i, ret;
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int i, ret;
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struct mc13xxx_adcdone_data adcdone_data = {
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struct mc13xxx_adcdone_data adcdone_data = {
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@ -605,51 +604,51 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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mc13xxx_lock(mc13xxx);
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mc13xxx_lock(mc13xxx);
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if (mc13783->adcflags & MC13783_ADC_WORKING) {
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if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
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ret = -EBUSY;
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ret = -EBUSY;
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goto out;
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goto out;
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}
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}
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mc13783->adcflags |= MC13783_ADC_WORKING;
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mc13xxx->adcflags |= MC13XXX_ADC_WORKING;
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mc13xxx_reg_read(mc13xxx, MC13783_ADC0, &old_adc0);
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mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
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adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2;
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adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2;
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adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN | MC13783_ADC1_ASC;
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adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;
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if (channel > 7)
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if (channel > 7)
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adc1 |= MC13783_ADC1_ADSEL;
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adc1 |= MC13XXX_ADC1_ADSEL;
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switch (mode) {
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switch (mode) {
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case MC13783_ADC_MODE_TS:
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case MC13XXX_ADC_MODE_TS:
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adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_TSMOD0 |
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adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
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MC13783_ADC0_TSMOD1;
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MC13XXX_ADC0_TSMOD1;
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adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
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adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
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break;
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break;
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case MC13783_ADC_MODE_SINGLE_CHAN:
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case MC13XXX_ADC_MODE_SINGLE_CHAN:
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adc0 |= old_adc0 & MC13783_ADC0_TSMOD_MASK;
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adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK;
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adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT;
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adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
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adc1 |= MC13783_ADC1_RAND;
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adc1 |= MC13XXX_ADC1_RAND;
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break;
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break;
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case MC13783_ADC_MODE_MULT_CHAN:
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case MC13XXX_ADC_MODE_MULT_CHAN:
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adc0 |= old_adc0 & MC13783_ADC0_TSMOD_MASK;
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adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK;
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adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
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adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
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break;
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break;
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default:
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default:
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mc13783_unlock(mc13783);
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mc13xxx_unlock(mc13xxx);
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return -EINVAL;
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return -EINVAL;
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}
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}
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dev_dbg(&mc13783->mc13xxx.spidev->dev, "%s: request irq\n", __func__);
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dev_dbg(&mc13xxx->spidev->dev, "%s: request irq\n", __func__);
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mc13xxx_irq_request(mc13xxx, MC13783_IRQ_ADCDONE,
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mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
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mc13783_handler_adcdone, __func__, &adcdone_data);
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mc13xxx_handler_adcdone, __func__, &adcdone_data);
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mc13xxx_irq_ack(mc13xxx, MC13783_IRQ_ADCDONE);
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mc13xxx_irq_ack(mc13xxx, MC13XXX_IRQ_ADCDONE);
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mc13xxx_reg_write(mc13xxx, MC13783_ADC0, adc0);
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mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
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mc13xxx_reg_write(mc13xxx, MC13783_ADC1, adc1);
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mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
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mc13xxx_unlock(mc13xxx);
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mc13xxx_unlock(mc13xxx);
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@ -660,27 +659,27 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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mc13xxx_lock(mc13xxx);
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mc13xxx_lock(mc13xxx);
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mc13xxx_irq_free(mc13xxx, MC13783_IRQ_ADCDONE, &adcdone_data);
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mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
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if (ret > 0)
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if (ret > 0)
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for (i = 0; i < 4; ++i) {
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for (i = 0; i < 4; ++i) {
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ret = mc13xxx_reg_read(mc13xxx,
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ret = mc13xxx_reg_read(mc13xxx,
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MC13783_ADC2, &sample[i]);
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MC13XXX_ADC2, &sample[i]);
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if (ret)
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if (ret)
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break;
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break;
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}
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}
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if (mode == MC13783_ADC_MODE_TS)
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if (mode == MC13XXX_ADC_MODE_TS)
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/* restore TSMOD */
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/* restore TSMOD */
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mc13xxx_reg_write(mc13xxx, MC13783_ADC0, old_adc0);
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mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
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mc13783->adcflags &= ~MC13783_ADC_WORKING;
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mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
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out:
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out:
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mc13xxx_unlock(mc13xxx);
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mc13xxx_unlock(mc13xxx);
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return ret;
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return ret;
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}
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}
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EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion);
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EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
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static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
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static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
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const char *format, void *pdata, size_t pdata_size)
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const char *format, void *pdata, size_t pdata_size)
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@ -89,18 +89,15 @@ static inline int mc13783_irq_ack(struct mc13783 *mc13783, int irq)
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return mc13xxx_irq_ack(mc13783_to_mc13xxx(mc13783), irq);
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return mc13xxx_irq_ack(mc13783_to_mc13xxx(mc13783), irq);
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}
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}
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#define MC13783_ADC0 43
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#define MC13783_ADC0 MC13XXX_ADC0
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#define MC13783_ADC0_ADREFEN (1 << 10)
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#define MC13783_ADC0_ADREFEN MC13XXX_ADC0_ADREFEN
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#define MC13783_ADC0_ADREFMODE (1 << 11)
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#define MC13783_ADC0_TSMOD0 MC13XXX_ADC0_TSMOD0
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#define MC13783_ADC0_TSMOD0 (1 << 12)
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#define MC13783_ADC0_TSMOD1 MC13XXX_ADC0_TSMOD1
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#define MC13783_ADC0_TSMOD1 (1 << 13)
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#define MC13783_ADC0_TSMOD2 MC13XXX_ADC0_TSMOD2
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#define MC13783_ADC0_TSMOD2 (1 << 14)
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#define MC13783_ADC0_ADINC1 MC13XXX_ADC0_ADINC1
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#define MC13783_ADC0_ADINC1 (1 << 16)
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#define MC13783_ADC0_ADINC2 MC13XXX_ADC0_ADINC2
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#define MC13783_ADC0_ADINC2 (1 << 17)
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#define MC13783_ADC0_TSMOD_MASK (MC13783_ADC0_TSMOD0 | \
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#define MC13783_ADC0_TSMOD_MASK MC13XXX_ADC0_TSMOD_MASK
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MC13783_ADC0_TSMOD1 | \
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MC13783_ADC0_TSMOD2)
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#define mc13783_regulator_init_data mc13xxx_regulator_init_data
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#define mc13783_regulator_init_data mc13xxx_regulator_init_data
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#define mc13783_regulator_platform_data mc13xxx_regulator_platform_data
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#define mc13783_regulator_platform_data mc13xxx_regulator_platform_data
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@ -115,12 +112,16 @@ static inline int mc13783_irq_ack(struct mc13783 *mc13783, int irq)
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#define MC13783_USE_REGULATOR MC13XXX_USE_REGULATOR
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#define MC13783_USE_REGULATOR MC13XXX_USE_REGULATOR
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#define MC13783_USE_LED MC13XXX_USE_LED
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#define MC13783_USE_LED MC13XXX_USE_LED
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#define MC13783_ADC_MODE_TS 1
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#define MC13783_ADC_MODE_TS MC13XXX_ADC_MODE_TS
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#define MC13783_ADC_MODE_SINGLE_CHAN 2
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#define MC13783_ADC_MODE_SINGLE_CHAN MC13XXX_ADC_MODE_SINGLE_CHAN
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#define MC13783_ADC_MODE_MULT_CHAN 3
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#define MC13783_ADC_MODE_MULT_CHAN MC13XXX_ADC_MODE_MULT_CHAN
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int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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static inline int mc13783_adc_do_conversion(struct mc13783 *mc13783,
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unsigned int channel, unsigned int *sample);
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unsigned int mode, unsigned int channel, unsigned int *sample)
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{
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return mc13xxx_adc_do_conversion(mc13783_to_mc13xxx(mc13783), mode,
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channel, sample);
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}
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#define MC13783_REG_SW1A 0
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#define MC13783_REG_SW1A 0
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@ -37,6 +37,9 @@ int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq);
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int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
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int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
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int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
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unsigned int mode, unsigned int channel, unsigned int *sample);
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#define MC13XXX_IRQ_ADCDONE 0
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#define MC13XXX_IRQ_ADCDONE 0
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#define MC13XXX_IRQ_ADCBISDONE 1
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#define MC13XXX_IRQ_ADCBISDONE 1
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#define MC13XXX_IRQ_TS 2
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#define MC13XXX_IRQ_TS 2
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struct mc13xxx_leds_platform_data *leds;
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struct mc13xxx_leds_platform_data *leds;
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};
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};
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#define MC13XXX_ADC_MODE_TS 1
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#define MC13XXX_ADC_MODE_SINGLE_CHAN 2
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#define MC13XXX_ADC_MODE_MULT_CHAN 3
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#define MC13XXX_ADC0 43
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#define MC13XXX_ADC0_ADREFEN (1 << 10)
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#define MC13XXX_ADC0_TSMOD0 (1 << 12)
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#define MC13XXX_ADC0_TSMOD1 (1 << 13)
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#define MC13XXX_ADC0_TSMOD2 (1 << 14)
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#define MC13XXX_ADC0_ADINC1 (1 << 16)
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#define MC13XXX_ADC0_ADINC2 (1 << 17)
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#define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \
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MC13XXX_ADC0_TSMOD1 | \
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MC13XXX_ADC0_TSMOD2)
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#endif /* ifndef __LINUX_MFD_MC13XXX_H */
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#endif /* ifndef __LINUX_MFD_MC13XXX_H */
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