MIPS: GIC: Prevent array overrun
A GIC interrupt which is declared as having a GIC_MAP_TO_NMI_MSK mapping causes the cpu parameter to gic_setup_intr() to be increased to 32, causing memory corruption when pcpu_masks[] is written to again later in the function. Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7375/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -269,11 +269,13 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
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/* Setup Intr to Pin mapping */
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/* Setup Intr to Pin mapping */
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if (pin & GIC_MAP_TO_NMI_MSK) {
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if (pin & GIC_MAP_TO_NMI_MSK) {
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int i;
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GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), pin);
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GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), pin);
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/* FIXME: hack to route NMI to all cpu's */
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/* FIXME: hack to route NMI to all cpu's */
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for (cpu = 0; cpu < NR_CPUS; cpu += 32) {
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for (i = 0; i < NR_CPUS; i += 32) {
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GICWRITE(GIC_REG_ADDR(SHARED,
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GICWRITE(GIC_REG_ADDR(SHARED,
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GIC_SH_MAP_TO_VPE_REG_OFF(intr, cpu)),
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GIC_SH_MAP_TO_VPE_REG_OFF(intr, i)),
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0xffffffff);
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0xffffffff);
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}
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}
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} else {
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} else {
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