Commit Graph

34 Commits

Author SHA1 Message Date
Linus Torvalds 4b42745211 ARM: SoC platform updates for 4.20
A couple of platforms change hands in the MAINTAINERS file:
 
 - Linus Walleij lists himself for the ARM Reference platforms:
   versatile, vexpress, integrator and realview. He has been the main
   contributor for these for a while, and makes it official now.
 
 - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood
 
 - Manivannan Sadhasivam becomes a secondary maintainer for the
   Actions Semi machines
 
 - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
   platform: Ludovic Desroches is now a co-maintainer for the platform, and
   several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev,
   Codrin Ciubotariu) take over individual device drivers.
 
 Thanks everyone for working on this, and welcome to the new maintainers!
 
 The "virt" platform on qemy or kvm can now be used in big-endian mode
 without additional tricks, thanks to Jason Donenfeld.
 
 Once again, we gain support for another NXP i.MX6 variant, this time
 it's the i.MX 6ULZ 32-bit single-core version.
 
 On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
 and RZ/G2M (r8a774a1). These are described as microcontrollers on the
 manufacturer website, but appear to be rather powerful. The RZ/G2M is
 used on the reference board for the CIP Super Long Term Support (SLTS)
 Linux Kernels.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJb1zkcAAoJEGCrR//JCVInEmgP/0hvJ+UqG2LrNpveuQNcEBPn
 Dp+B+xMlgzL/Z+jzNEjH05SSHvc4pkvu6OP/XvZJYK6jSAH2MGgmSowmRzVyOhE3
 qGFk67+5UJBdwfkFzKDrN0GlEhUOgX8pjFIWHDyo3IXVZfaPJP1BjHy9SdoSYF7a
 AqvxTPbIw8nJScjqJQ67MusMbGoPnUQH4229sGu3Gix3auBPe0NHl0kCGtWAYkr/
 F81Vooz/WCo0Hj7cztWI7NjJHlnIuEe6LwbbN5NdP5koMSjI4AAvh427xsbvPk0a
 N38QFgCI0d/pjRJA2MJVl3UAog/r37Bs7PIRwUXWGv0CboZYQiLKHuuRTcaCzrSt
 zdiysLo36nEL+8kQe7VRpfD8hOzB9+jNkpvdvp5I3qk+qJscjsheQryXiNt+SeQ/
 lHIBAldNNr++qVkLJwqMEW1+948zmNg0cU8NP6t+KEIYJG7bM5fUpUHmfeRXqmpc
 RVXC4YBBzcnkTn3TUCvWEn5xxedd6TX+2D6hJCL7mfbdoqeWQPnfBEvYASx/PHVo
 mMczvF/XCrJJOQFXiFqIh0JCR/LC/eBpfr8JNDQ7tmkSzjp1pRxVTny7tI2BgwiA
 GXmuQ7rZUpKLnm6U6qN0Yb2ZRYKtXuGulucDUPFyp3pcqjRi9fqRT8al1a/wNPIO
 cTQgeFL1xfZb11I3U6NG
 =7+46
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "A couple of platforms change hands in the MAINTAINERS file:

   - Linus Walleij lists himself for the ARM Reference platforms:
     versatile, vexpress, integrator and realview. He has been the main
     contributor for these for a while, and makes it official now.

   - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
     Eastwood

   - Manivannan Sadhasivam becomes a secondary maintainer for the
     Actions Semi machines

   - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
     platform: Ludovic Desroches is now a co-maintainer for the
     platform, and several other people (Claudiu Beznea, Cristian
     Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
     device drivers.

  Thanks everyone for working on this, and welcome to the new
  maintainers!

  The "virt" platform on qemy or kvm can now be used in big-endian mode
  without additional tricks, thanks to Jason Donenfeld.

  Once again, we gain support for another NXP i.MX6 variant, this time
  it's the i.MX 6ULZ 32-bit single-core version.

  On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
  and RZ/G2M (r8a774a1). These are described as microcontrollers on the
  manufacturer website, but appear to be rather powerful. The RZ/G2M is
  used on the reference board for the CIP Super Long Term Support (SLTS)
  Linux Kernels"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
  arm64: exynos: Enable generic power domain support
  MAINTAINERS: remove non-exsiting email address of Baoyou
  MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
  MAINTAINERS: Drop dt-bindings/genpd/k2g.h
  ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
  arm64: actions: Enable PINCTRL in platforms Kconfig
  MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
  MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
  MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
  ARM: imx: add i.mx6ulz msl support
  ARM: Assume maintainership of ARM reference designs
  ARM: support big-endian for the virt architecture
  MAINTAINERS: sdhci: move the Microchip entry to proper location
  MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
  MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
  MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
  MAINTAINERS: pwm: add entry for Microchip pwm driver
  MAINTAINERS: dmaengine: add files to Microchip dma entry
  MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
  ...
2018-10-29 15:37:33 -07:00
Rob Herring 5af5d40c40 ARM: shmobile: use for_each_of_cpu_node iterator
Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
has the side effect of defaulting to iterating using "cpu" node names in
preference to the deprecated (for FDT) device_type == "cpu".

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-09-28 14:25:58 -05:00
Kuninori Morimoto e2f2594b8e ARM: shmobile: convert to SPDX identifiers
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11 15:41:30 +02:00
Geert Uytterhoeven 54f464e0c9 ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
  - Remove the calls to shmobile_init_delay() from the corresponding
    machine vectors,
  - Remove a check in timer setup specific to R-Car Gen2,
  - Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20 13:44:10 +02:00
Geert Uytterhoeven a4b8c18c40 ARM: shmobile: timer: Drop support for Cortex A8
Commit edf4100906 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
core (sh7372 aka SH-Mobile AP4), hence drop support for it in the
loops-per-jiffy preset code.

As "div" is always 1 for supported contemporary ARM processors, we can
simplify the code:
  - Absorb shmobile_setup_delay_hz(), which was always called with
    mult = div = 1,
  - Return earlier if the Cortex A7/A15 arch timer exists and support is
    enabled.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20 08:55:09 +10:00
Geert Uytterhoeven c531fb27e9 ARM: shmobile: timer: Fix preset_lpj leading to too short delays
On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.

This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
  - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
    CPU clock cycle,
  - As of commit 11d4bb1bd0 ("ARM: 7907/1: lib: delay-loop: Add
    align directive to fix BogoMIPS calculation"), Cortex A8 runs
    __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.

On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20 08:52:55 +10:00
Geert Uytterhoeven 2e41e5fe88 ARM: shmobile: Add includes providing forward declarations
make C=1:

    arch/arm/mach-shmobile/timer.c:38:13: warning: symbol 'shmobile_init_delay' was not declared. Should it be static?
    arch/arm/mach-shmobile/suspend.c:37:29: warning: symbol 'shmobile_suspend_ops' was not declared. Should it be static?
    arch/arm/mach-shmobile/suspend.c:44:12: warning: symbol 'shmobile_suspend_init' was not declared. Should it be static?
    arch/arm/mach-shmobile/cpufreq.c:13:12: warning: symbol 'shmobile_cpufreq_init' was not declared. Should it be static?

Include "common.h" to fix these.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-04 15:09:29 +01:00
Geert Uytterhoeven 93161cb4c3 ARM: shmobile: Remove obsolete earlytimer registration
The last caller of shmobile_earlytimer_init() was removed in commit
c99cd90d98 ("ARM: shmobile: r8a7779: Remove legacy SoC code").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-09-14 09:58:09 +09:00
Geert Uytterhoeven 20834a406e ARM: shmobile: timer: r8a73a4 and r8a7790 are multi-platform only
Since commits e042681894 ("ARM: shmobile: r8a7790: Remove legacy
code") and 9d07d414d4 ("ARM: shmobile: r8a73a4: ape6evm: Remove
legacy platform"), the R-Mobile APE6 and R-Car H2 SoCs are supported by
multiplatform kernels only.
Hence we can drop checks for these SoCs in legacy kernel builds.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06 09:29:46 +09:00
Olof Johansson 28111dda37 Third Round of Renesas ARM Based SoC Fixes for v3.19
* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUytABAAoJENfPZGlqN0++qrkP/R2n+rHBNvZTW4p88IZcZ37O
 7zRXCkcXLHHVfKp8XHEMrhH/Pc7uIonWgq3SIKHDlK9UwAvfOdLPj2CMGm7bN+Ea
 +fgT6Qe1UP9kgbsH1whovsR3CzjLDqxmlhfjTkrmu5UjFNGQuv/iFVkkzViSCDYd
 YkSIYxybAlH3Nd7xxNFG54LzjCPauY2V76JM76/3j24m+zxZverY8sN46PtKryGg
 /toQzuVeimpz4BtObXZAi7Y7eWvvYUtELGshTTGKBmtRhLWGZDrS+60KpMDVoKtK
 f135X2taKm2jIiKPXCPMQTOWsXBls1TuxIGssiIysPU6t5OCSuNd/M1RiKDhZhE3
 J4L4vCMq/Gn2XbYe2+O0PNkLxuWepSZ4VRzALZCPhP48CYGrazP63JWTnjROcC61
 5bxuUtWMUVHF52hEWf6bXEiAEBNZP7u8kBc02drsscQHM/N3SiFcIxK/nGlIVMjy
 Qt01fYR+zZZ2v5OhQHeEe7lBfUMnKA9+QLHR4dJ32oJvyAFiDImLsrEBiVlTDk47
 gYJXmqGp2GWgB1H2mDiopHg+ERsavK9P7FL9juYG3OdvFPFuQwktJDSpN+Y0GZMV
 wRADV2/ylZBw48DidX86TD3gwtV7gP995nHvQJ2nv+/Kjq58uR4AHwn0wVHPldCE
 cDf5IYwdvD0a42id6zb5
 =/Oq9
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:

* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4

* tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-02-01 08:51:12 -08:00
Magnus Damm 77cf5166f2 ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
As of commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq
domain."), the Lager legacy board support is known to be broken.

The IRQ numbers of the GIC are now virtual, and no longer match the
hardcoded hardware IRQ numbers in the legacy platform board code.

To fix this issue specific to non-multiplatform r8a7790 and Lager:
 1) Instantiate the GIC from platform board code and also
 2) Skip over the DT arch timer as well as
 3) Force delay setup based on DT CPU frequency

With these 3 fixes in place interrupts on Lager are now unbroken.

Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to
him for the initial work.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-29 17:52:38 +09:00
Magnus Damm 974b072f71 ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
As of commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq
domain."), the APE6EVM legacy board support is known to be broken.

The IRQ numbers of the GIC are now virtual, and no longer match the
hardcoded hardware IRQ numbers in the legacy platform board code.

To fix this issue specific to non-muliplatform r8a73a4 and APE6EVM:
 1) Instantiate the GIC from platform board code and also
 2) Skip over the DT arch timer as well as
 3) Force delay setup based on DT CPU frequency

With these 3 fixes in place interrupts on APE6EVM are now unbroken.

Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to
him for the initial work.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-29 09:34:51 +09:00
Linus Torvalds 6cd94d5e57 ARM: SoC platform changes for 3.19
New and updated SoC support, notable changes include:
 
 * bcm: brcmstb SMP support
 * bcm: initial iproc/cygnus support
 * exynos: Exynos4415 SoC support
 * exynos: PMU and suspend support for Exynos5420
 * exynos: PMU support for Exynos3250
 * exynos: pm related maintenance
 * imx: new LS1021A SoC support
 * imx: vybrid 610 global timer support
 * integrator: convert to using multiplatform configuration
 * mediatek: earlyprintk support for mt8127/mt8135
 * meson: meson8 soc and l2 cache controller support
 * mvebu: Armada 38x CPU hotplug support
 * mvebu: drop support for prerelease Armada 375 Z1 stepping
 * mvebu: extended suspend support, now works on Armada 370/XP
 * omap: hwmod related maintenance
 * omap: prcm cleanup
 * pxa: initial pxa27x DT handling
 * rockchip: SMP support for rk3288
 * rockchip: add cpu frequency scaling support
 * shmobile: r8a7740 power domain support
 * shmobile: various small restart, timer, pci apmu changes
 * sunxi: Allwinner A80 (sun9i) earlyprintk support
 * ux500: power domain support
 
 Overall, a significant chunk of changes, coming mostly from
 the usual suspects: omap, shmobile, samsung and mvebu, all of
 which already contain a lot of platform specific code in
 arch/arm.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVIcjyGCrR//JCVInAQJJCRAA1Tm+HZGiAiTvXEAcm/T9tIA08uqtawHt
 cqyEAUyrnE8QxE4EhUd2pTw4EunVusqKF5EsDxOzw7b3ukUdLAWZE7bqBOSIJLqn
 hrfsQQ8dXLbyC7T/CHPnBVeM+pn9LiIc9qzpZ0YToiMnHBBI4vKFQntBjd31yoRE
 hN08I6AmDjQolOzzlqR1fuM0uZaKiHIcytdauTt3Vfqgg7FTHcTy3u1kClHTR1Lp
 m/KuDothGpR5OKjSnUQz7EO5V3KJEnaKey8z2xM1a7DLLAvJ6r2+DUaDopv9Dbz1
 W/V3H7fi5tLvillVa8xmlmzqWZbPc1xw8MWqvHZSWIMRZqloAHpC1VWKn0ZuH4SW
 5Bj4ubSrpYjJxjKYfrxtjmuzru3A2jWBNTSP5A4nsny0C3AUsXkfRmRS0VNdegF8
 sUdQ1MF8vEMpQT3QPH88+ccFHeIgqbcayhKqLPf7r8q0kwlym5N7Y2amU2A/O6qz
 +324r+yzfSA70VgJZ5EhXxWVDOPB4Lc8EtoWnH6T/kjncIMwzEsbEbyB3X1OaREW
 pVn3PNo06VjHLYoiHX+8G99pOFR/JZvaQs6jGCXLs+Orjp5WfP+kafkWqcB5GAKU
 Pfd3AQsl6rKAITdu0XsTdPiICNS4CmBiWYPepQsTa3pQaNgB7fwZNQKelNRIdGc+
 dF1lnQ7CXLQ=
 =lFoH
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
2014-12-09 14:38:28 -08:00
Laurent Pinchart 335204dfb8 ARM: shmobile: Remove FSF address from copyright headers
The information is already included in the COPYING file in the kernel
sources root directory, we don't want to modify all source files when
the FSF will move to a new address, and I'm tired of seeing the related
checkpatch.pl warnings.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-27 09:48:07 +09:00
Magnus Damm 27f3c70874 ARM: shmobile: Handle CA7 arch timer delay
Update the delay code to include arch timer checks
for CA7. From a arch timer availability perspective
CA7 should be treated same as CA15.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-24 10:53:30 +09:00
Arnd Bergmann 138310e18b Third Round of Renesas ARM Based SoC Soc Updates for v3.18
* Initial r8a7794 SoC support
 * Support Cortex-A7 in shmobile_init_delay()
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUDnyTAAoJENfPZGlqN0++xcUP/RO2TIFpvKKQ69B8v7OJpPKJ
 yaqZFsg5A0lTHos7as3/4osHQfUtp6dz0Ko9DZIs7EYQ7Xue0OoIJ48O/c9EaPJD
 zLVvNYuh/LavXHeXnvKyp9ixYzY5f3A26+mx3PZAFJrmlaqAypt5STPNdqmf61ot
 U/uEwhtXU2hDY0AW865RgvOESDWpRY+YjrVihMgW/EQE+Glq2U6mnmrjANglZyRv
 /FnifymlhTByH81KauYqLTYbtdoAJFCvOa+ZHqLIZHqu7/K5G29b6TgnlbqanVBp
 GFIxLVHFqppgyIbJqpmBqHRB5BLL1ISoAV5z5p7K6ujjz73yIMReBoCVP4rZ7ZXh
 j+t4E7HyzaI5JoGJJyUEmtv4+gqQq486mDYEsJl3r/3ByLT52DglerAFnOhd1fmU
 VBpFydYfOtpA9LtGJXlxTBDJOecP857Kv81agROLY+NID24dcq1lRImffq88poHQ
 ck3DRSyagdZWWc7uGxhZqTltJufgazP7odya31roIC2C5q6j5kDON04inxzH0FBU
 eqNhYEYYgBUYWUBje1cL50WuPboRdvV5kJjAspKNbLt8jAQ+mky9pZqoJbndRdNT
 kg30WH2WXaMD+naQPh6g07kQPrmuwz0tOtIdcZ598T6k+tXGufwE6OPIR/LsxMIq
 TSw0JlT6DO8XPSMMGMDs
 =iaYv
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc3-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Third Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman:

* Initial r8a7794 SoC support
* Support Cortex-A7 in shmobile_init_delay()

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-soc3-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Initial r8a7794 SoC support
  ARM: shmobile: support Cortex-A7 in shmobile_init_delay()
2014-09-09 17:09:35 +02:00
Ulrich Hecht 0dc50fd3dc ARM: shmobile: support Cortex-A7 in shmobile_init_delay()
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-09-05 17:23:45 +09:00
Magnus Damm 7dd4cfd7f8 ARM: shmobile: Remove shmobile_setup_delay()
All ARM mach-shmobile SoCs and boards now rely on DTS for
CPU Frequency information, so remove the unused function
shmobile_setup_delay(). While at it, make the function
shmobile_setup_delay_hz() static.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 11:31:56 +09:00
Laurent Pinchart edc8fb1d6e ARM: shmobile: Fix device node reference leakage in shmobile_init_delay
The of_find_compatible_node() function returns a new reference to the
found node. Instead of just adding of_node_put() calls, simplify the
code by moving the CPU identification logic inside the loop over cpu
nodes, in order to lower complexity from O(n) to O(1) by replacing
of_find_compatible_node() calls with of_device_is_compatible().

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-16 19:52:00 +09:00
Simon Horman f492b81777 ARM: shmobile: Set clock frequency in HZ from OF nodes
shmobile_init_delay() looks for OF "clock-frequency" to determine
the delay which is set by calling shmobile_setup_delay().

Unfortunately this seems to be incorrect in detail as
"clock-frequency" node values are in HZ whereas the frequency
argument to shmobile_setup_delay() is in MHz.

Provide a variant of shmobile_setup_delay() that accepts HZ to
correct this problem.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14 14:02:21 +09:00
Magnus Damm c39dae380b ARM: shmobile: Add shared shmobile_init_delay()
Introduce shmobile_init_delay() that gets CPU specific
parameters from DT and sets up the early delay from
there. This allows us to both remove frequency information
from the C code and consolidate existing code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:25:33 +09:00
Magnus Damm 13eb604665 ARM: shmobile: Remove unused shmobile_init_time()
Remove shmobile_timer_init() since it now is unused.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-08-06 18:07:12 +09:00
Rob Herring 0583fe478a ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.

This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-04-11 15:11:15 -05:00
Magnus Damm dbe1c3defb ARM: shmobile: Register ARM architected timer
Register ARM architected timer by default for all mach-shmobile
systems using late timer.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-02-05 17:13:55 +09:00
Stephen Warren 6bb27d7349 ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.

Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-12-24 09:36:38 -07:00
Magnus Damm 173bf69a7a ARM / mach-shmobile: Use preset_lpj with calibrate_delay()
Update the mach-shmobile shared delay calibration code for late
timers. All existing in-tree non-DT socs are however using early
timers today and they are unaffected by this change.

The patch modifies shmobile_setup_delay() from using lpj_fine
to preset_lpj. This change allows us to preset the worst case
loops-per-jiffy value to all CPU cores on the system.

The old code which made use of lpj_fine did not affect the
secondary CPU cores which made it impossible to boot on SMP
without early timers.

Needed for SMP SoCs using late timers like EMEV2 or any other
mach-shmobile SMP SoC that makes use of late timers via DT.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-05-12 22:21:36 +02:00
Rafael J. Wysocki 15d2c83948 Merge branch 'renesas-dt' into renesas-soc-core
* renesas-dt:
  ARM: mach-shmobile: sh7372 generic board support via DT V2
  ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2
  ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372
  ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
  ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H
  ARM: mach-shmobile: Introduce shmobile_setup_delay()
2012-05-12 22:20:36 +02:00
Kuninori Morimoto d6720003c3 ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix
Fix SMP TWD boot regression on sh73a0 based platforms caused by:

4200b16 ARM: shmobile: convert to twd_local_timer_register() interface

After the merge of the above commit it has been impossible to boot
sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The
kernel crashes at smp_init_cpus() timing which is before the console
has been initialized, so to the user this looks like a kernel lock up
without any particular error message.

This patch fixes the regression on sh73a0 by moving the TWD
registration code from smp_init_cpus() to sys_timer->init() time.

This patch removed shmobile_twd_init() which is no longer needed

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-05-12 22:13:45 +02:00
Magnus Damm 0f2c9f20e4 ARM: mach-shmobile: Introduce shmobile_setup_delay()
Add the function shmobile_setup_delay() to let platforms
configure their maximum loops per jiffy delay. With this
jiffies calculation done the dependency on early timer
is removed.

In the future this allows us to assign timers
using the regular driver model via the device tree.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-04-11 12:11:48 +02:00
Arnd Bergmann b2f1df8d2f Merge branch 'renesas/timer' into next/timer
Conflicts:
	arch/arm/mach-shmobile/timer.c

This resolves a nonobvious merge conflict between renesas
timer changes in the global timer changes with those
from the renesas soc branch and last minute bug fixes that
went into v3.3.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-20 09:41:43 +00:00
Marc Zyngier 4200b16d58 ARM: shmobile: convert to twd_local_timer_register() interface
Add support for the new smp_twd runtime registration interface
to the shmobile platforms, and remove the old compile-time support.

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2012-03-13 13:30:31 +00:00
Magnus Damm 2854903ad1 ARM: mach-shmobile: default to no earlytimer
Now when all SoCs and boards are converted to use
shmobile_earlytimer_init(), change the default behavior
of shmobile_timer.init() from using early timer to
do nothing which is suitable for upcoming DT support.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-03-12 22:19:46 +01:00
Magnus Damm 08ad42fb77 ARM: mach-shmobile: add shmobile_earlytimer_init()
Add shmobile_earlytimer_init() that can be used to
enable the earlytimer probing from the SoC code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-03-12 22:19:44 +01:00
Magnus Damm c793c1b0c8 ARM: mach-shmobile: SH-Mobile G3 support.
This adds preliminary support for the SH-Mobile G-series.

The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside
from the ARM MPU are primarily composed of existing SH IP blocks.

This includes initial support for the SH7367 (SH-Mobile G3) CPU and
the G3EVM reference board.

Only timer, serial console, and NOR flash are supported at this point.
Patches for the interrupt controller, pinmux support, clock framework
and runtime pm will be submitted as feature patches on top of this.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08 12:44:11 +09:00