Commit Graph

29 Commits

Author SHA1 Message Date
Laxman Dewangan 0527eb3723 pwm: tegra: Set maximum pwm clock source per SoC tapeout
The PWM hardware IP is taped-out with different maximum frequency
on different SoCs.

From HW team:

	Before Tegra186, it is 48 MHz.
	In Tegra186, it is 102 MHz.

Add support to limit the clock source frequency to the maximum IP
supported frequency. Provide these values via SoC chipdata.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-06-13 14:30:22 +02:00
Laxman Dewangan 46fa8bc087 pwm: tegra: Read PWM clock source rate in driver init
It is required to know the PWM clock source frequency to calculate the
PWM period.

In driver, the clock source frequency of the PWM does not get change
and, hence, get the clock source frequency in driver init. Get this
values later for period calculation from pwm_config().

This will help in avoiding the clock call for getting clock rate in the
pwm_config() each time.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13 17:35:40 +02:00
Thierry Reding 6db78b201b pwm: tegra: Avoid potential overflow for short periods
For very short periods, the result of the division might overflow the
unsigned long hz variable (on 32-bit architectures). Avoid that by
making it an unsigned long long. While at it, also remove an unneeded
local variable whose only purpose is to store a temporary computation.

Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13 17:34:54 +02:00
Laxman Dewangan 4a813b262f pwm: tegra: Add support to configure pin state in suspends/resume
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.

When system enters suspend, some PWM client/slave regulator devices
require the PWM output to be tristated.

Add support to configure the pin state via pinctrl frameworks in
suspend and active state of the system.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-12 16:10:09 +02:00
Laxman Dewangan 250b76f43f pwm: tegra: Increase precision in PWM rate calculation
The rate of the PWM calculated as follows:

	hz = NSEC_PER_SEC / period_ns;
 	rate = (rate + (hz / 2)) / hz;

This has the precision loss in lower PWM rate.

Change this to have more precision as:

	hz = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC * 100, period_ns);
	rate = DIV_ROUND_CLOSEST(rate * 100, hz)

Example:

1. period_ns = 16672000, PWM clock rate is 200 KHz.

	Based on old formula
		hz = NSEC_PER_SEC / period_ns
		   = 1000000000ul/16672000
		   = 59 (59.98)
		rate = (200K + 59/2)/59 = 3390

	Based on new method:
		hz = 5998
		rate = DIV_ROUND_CLOSE(200000*100, 5998) = 3334

	If we measure the PWM signal rate, we will get more accurate
	period with rate value of 3334 instead of 3390.

2.  period_ns = 16803898, PWM clock rate is 200 KHz.

	Based on old formula:
		hz = 59, rate = 3390

	Based on new formula:
		hz = 5951, rate = 3360

	The PWM signal rate of 3360 is more near to requested period
	than 3333.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-12 16:08:15 +02:00
Laxman Dewangan 90241fb9b5 pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation
Use macro DIV_ROUND_CLOSEST_ULL() for 64-bit division to closest one
instead of implementing the same locally. This increase readability.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-12 16:08:00 +02:00
Laxman Dewangan e9be88a2f0 pwm: tegra: Add support for Tegra186
Tegra186 has multiple PWM controllers with only one output instead of
one controller with four outputs in earlier SoC generations.

Add support for Tegra186 and detect the number of PWM outputs using
device tree match data.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:34 +02:00
Hyong Bin Kim b979ed5314 pwm: tegra: Avoid overflow when calculating duty cycle
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calculation
when the PWM rate is low. Hence do all calculation on unsigned long long
to avoid overflow.

Signed-off-by: Hyong Bin Kim <hyongbink@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:32 +02:00
Victor(Weiguo) Pan e0ee1a75f4 pwm: tegra: Allow 100 % duty cycle
To get 100 % duty cycle (always high), pulse width needs to be set to
256.

Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:32 +02:00
Rohith Seelaboyina 5dfbd2bd54 pwm: tegra: Add support for reset control
Add reset control of the PWM controller to reset it before
accessing the PWM register.

Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:31 +02:00
Thierry Reding 4f57f5a01f pwm: tegra: Rename mmio_base to regs
The former is much longer to type and is ambiguous because the value
stored in the field is not the (physical) base address of the memory-
mapped I/O registers, but the virtual address of those registers as
mapped through the MMU.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:31 +02:00
Thierry Reding e17c0b2258 pwm: tegra: Remove useless padding
Use single spaces to separate data type from field names in structure
definitions.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:30 +02:00
Thierry Reding c009c56475 pwm: tegra: Drop NUM_PWM macro
This macro is used to initialize the ->npwm field of the PWM chip. Use a
literal instead and make all other places rely on ->npwm.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:30 +02:00
Boris Brezillon 5c31252c4a pwm: Add the pwm_is_enabled() helper
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper
function to hide the logic behind enabled test. This will allow us to
smoothly move from the current approach to an atomic PWM update
approach.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-20 09:46:06 +02:00
Thierry Reding b65af27ad8 pwm: tegra: Use NSEC_PER_SEC
Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-02-18 08:40:29 +01:00
Wolfram Sang f05fae14a1 pwm: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:21:28 +02:00
Jingoo Han 474b69025d pwm: tegra: Remove unnecessary OOM messages
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-04-28 13:37:48 +02:00
Thierry Reding 3dd0a90947 pwm: Fill in missing .owner fields
Some drivers don't set the .owner fields of the struct device_driver or
struct pwm_ops, which causes the module usage count to become wrong.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-12 13:18:29 +02:00
Wolfram Sang 362e9cd2f5 drivers/pwm: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2013-05-18 11:55:58 +02:00
Thierry Reding f1a8870aeb pwm: Constify OF match tables
A few drivers already annotate this properly. Make the same change for
all other OF supporting drivers.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2013-04-23 07:42:20 +02:00
Linus Torvalds 3eb05225ee pwm: Changes for v3.9-rc1
A new driver has been added to support the PWM mode of the timer counter
 blocks found on Atmel AT91 SoCs. The VT8500 driver now supports changing
 the PWM signal polarity and the TI drivers (EHRPWM and ECAP) gained
 suspend and resume functionality.
 
 User drivers can now query the core for whether access to a PWM device
 will sleep (if the PWM chip is on a slow bus such as I2C or SPI).
 
 The pwm-backlight driver now handles the backlight BL_CORE_FBBLANK state
 in addition to the FB layer's blanking states.
 
 To round things off, a few fixes and cleanups are also included.
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Merge tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwm

Pull PWM changes from Thierry Reding:
 "A new driver has been added to support the PWM mode of the timer
  counter blocks found on Atmel AT91 SoCs.  The VT8500 driver now
  supports changing the PWM signal polarity and the TI drivers (EHRPWM
  and ECAP) gained suspend and resume functionality.

  User drivers can now query the core for whether access to a PWM device
  will sleep (if the PWM chip is on a slow bus such as I2C or SPI).

  The pwm-backlight driver now handles the backlight BL_CORE_FBBLANK
  state in addition to the FB layer's blanking states.

  To round things off, a few fixes and cleanups are also included"

* tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwm:
  pwm: twl: Use to_twl() instead of container_of()
  pwm: tegra: assume CONFIG_OF
  pwm_backlight: Validate dft_brightness in main probe function
  pwm: Export pwm_{set,get}_chip_data()
  pwm: Make Kconfig entries more consistent
  pwm: Add can_sleep property to drivers
  pwm: Add pwm_can_sleep() as exported API to users
  pwm-backlight: handle BL_CORE_FBBLANK state
  pwm: pwm-tiecap: Low power sleep support
  pwm: pwm-tiehrpwm: Low power sleep support
  pwm: pwm-tiehrpwm: Update the clock handling of pwm-tiehrpwm driver
  pwm: vt8500: Add polarity support
  pwm: vt8500: Register write busy test performed incorrectly
  pwm: atmel: add Timer Counter Block PWM driver
2013-02-26 09:34:29 -08:00
Stephen Warren 838bf09d4f pwm: tegra: assume CONFIG_OF
Tegra only supports, and always enables, device tree. Remove all ifdefs
for DT support from the driver.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-15 23:27:51 +01:00
Thierry Reding 6d4294d163 pwm: Convert to devm_ioremap_resource()
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-22 11:41:57 -08:00
Bill Pemberton 77f37917a6 pwm: remove use of __devexit
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 12:23:41 -08:00
Bill Pemberton fd1091125a pwm: remove use of __devexit_p
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 12:23:41 -08:00
Axel Lin 2ffdc9a648 pwm: Remove a redundant error message when devm_request_and_ioremap fails
The implementation in devm_request_and_ioremap() already shows error message,
so no need to show dev_err again if devm_request_and_ioremap() fails.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-08-17 14:08:25 +02:00
Axel Lin 0c8f527d8c pwm: Convert pwm-tegra to use devm_clk_get()
Also return proper error in tegra_pwm_remove() if pwmchip_remove()
fails.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-07-23 13:24:02 +02:00
Thierry Reding 140fd977dc pwm: tegra: Add device tree support
Add auxdata to instantiate the PWFM controller from a device tree,
include the corresponding nodes in the dtsi files for Tegra 20 and
Tegra 30 and add binding documentation.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-07-02 21:38:59 +02:00
Thierry Reding 0134b932a0 pwm: Add NVIDIA Tegra SoC support
This commit adds a generic PWM framework driver for the PWFM controller
found on NVIDIA Tegra SoCs. The driver is based on code from the
Chromium kernel tree and was originally written by Gary King (NVIDIA)
and later modified by Simon Que (Chromium).

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-07-02 21:38:57 +02:00