Commit Graph

4280 Commits

Author SHA1 Message Date
Myron Stowe 96c5590058 PCI: Pull PCI 'latency timer' setup up into the core
The 'latency timer' of PCI devices, both Type 0 and Type 1,
is setup in architecture-specific code [see: 'pcibios_set_master()'].
There are two approaches being taken by all the architectures - check
if the 'latency timer' is currently set between 16 and 255 and if not
bring it within bounds, or, do nothing (and then there is the
gratuitously different PA-RISC implementation).

There is nothing architecture-specific about PCI's 'latency timer' so
this patch pulls its setup functionality up into the PCI core by
creating a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-01-06 12:10:42 -08:00
Greg Kroah-Hartman ff4b8a57f0 Merge branch 'driver-core-next' into Linux 3.2
This resolves the conflict in the arch/arm/mach-s3c64xx/s3c6400.c file,
and it fixes the build error in the arch/x86/kernel/microcode_core.c
file, that the merge did not catch.

The microcode_core.c patch was provided by Stephen Rothwell
<sfr@canb.auug.org.au> who was invaluable in the merge issues involved
with the large sysdev removal process in the driver-core tree.

Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2012-01-06 11:42:52 -08:00
Linus Torvalds 423d091dfe Merge branch 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (64 commits)
  cpu: Export cpu_up()
  rcu: Apply ACCESS_ONCE() to rcu_boost() return value
  Revert "rcu: Permit rt_mutex_unlock() with irqs disabled"
  docs: Additional LWN links to RCU API
  rcu: Augment rcu_batch_end tracing for idle and callback state
  rcu: Add rcutorture tests for srcu_read_lock_raw()
  rcu: Make rcutorture test for hotpluggability before offlining CPUs
  driver-core/cpu: Expose hotpluggability to the rest of the kernel
  rcu: Remove redundant rcu_cpu_stall_suppress declaration
  rcu: Adaptive dyntick-idle preparation
  rcu: Keep invoking callbacks if CPU otherwise idle
  rcu: Irq nesting is always 0 on rcu_enter_idle_common
  rcu: Don't check irq nesting from rcu idle entry/exit
  rcu: Permit dyntick-idle with callbacks pending
  rcu: Document same-context read-side constraints
  rcu: Identify dyntick-idle CPUs on first force_quiescent_state() pass
  rcu: Remove dynticks false positives and RCU failures
  rcu: Reduce latency of rcu_prepare_for_idle()
  rcu: Eliminate RCU_FAST_NO_HZ grace-period hang
  rcu: Avoid needlessly IPIing CPUs at GP end
  ...
2012-01-06 08:02:40 -08:00
Al Viro 84dfa9897e consolidate a bunch of ipcbuf.h instances
... some still remain weird :-/

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-01-03 22:55:18 -05:00
Al Viro 0583fcc96b consolidate umode_t declarations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-01-03 22:55:17 -05:00
Joshua Kinard c0d2b8376a net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery
SGI IP32 (O2)'s ethernet driver (meth) lacks a set_rx_mode function, which
prevents IPv6 from working completely because any ICMPv6 neighbor
solicitation requests aren't picked up by the driver.  So the machine can
ping out and connect to other systems, but other systems will have a very
hard time connecting to the O2.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-12-27 13:17:34 -05:00
Kay Sievers edbaa603eb driver-core: remove sysdev.h usage.
The sysdev.h file should not be needed by any in-kernel code, so remove
the .h file from these random files that seem to still want to include
it.

The sysdev code will be going away soon, so this include needs to be
removed no matter what.

Cc: Jiandong Zheng <jdzheng@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "Venkatesh Pallipadi
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
2011-12-21 16:26:03 -08:00
Kay Sievers 269a3eb1bf mips: txx9_sram - convert sysdev_class to a regular subsystem
After all sysdev classes are ported to regular driver core entities, the
sysdev implementation will be entirely removed from the kernel.

Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Cc: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-12-21 15:09:54 -08:00
Kay Sievers 0e38eaf34e mips: 7segled - convert sysdev_class to a regular subsystem
After all sysdev classes are ported to regular driver core entities, the
sysdev implementation will be entirely removed from the kernel.

Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-12-21 15:09:53 -08:00
Rafael J. Wysocki b00f4dc5ff Merge branch 'master' into pm-sleep
* master: (848 commits)
  SELinux: Fix RCU deref check warning in sel_netport_insert()
  binary_sysctl(): fix memory leak
  mm/vmalloc.c: remove static declaration of va from __get_vm_area_node
  ipmi_watchdog: restore settings when BMC reset
  oom: fix integer overflow of points in oom_badness
  memcg: keep root group unchanged if creation fails
  nilfs2: potential integer overflow in nilfs_ioctl_clean_segments()
  nilfs2: unbreak compat ioctl
  cpusets: stall when updating mems_allowed for mempolicy or disjoint nodemask
  evm: prevent racing during tfm allocation
  evm: key must be set once during initialization
  mmc: vub300: fix type of firmware_rom_wait_states module parameter
  Revert "mmc: enable runtime PM by default"
  mmc: sdhci: remove "state" argument from sdhci_suspend_host
  x86, dumpstack: Fix code bytes breakage due to missing KERN_CONT
  IB/qib: Correct sense on freectxts increment and decrement
  RDMA/cma: Verify private data length
  cgroups: fix a css_set not found bug in cgroup_attach_proc
  oprofile: Fix uninitialized memory access when writing to writing to oprofilefs
  Revert "xen/pv-on-hvm kexec: add xs_reset_watches to shutdown watches from old kernel"
  ...

Conflicts:
	kernel/cgroup_freezer.c
2011-12-21 21:59:45 +01:00
Ingo Molnar 45aa0663cc Merge branch 'memblock-kill-early_node_map' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/misc into core/memblock 2011-12-20 12:14:26 +01:00
David Howells 1632b9e2a1 UAPI: Split trivial #if defined(__KERNEL__) && X conditionals
Split trivial #if defined(__KERNEL__) && X conditionals to make automated
disintegration easier.

Signed-off-by: David Howells <dhowells@redhat.com>
2011-12-13 15:07:49 +00:00
David Howells 8935e13457 UAPI: Fix arch/mips/include/asm/Kbuild to have separate header-y lines
Fix arch/mips/include/asm/Kbuild to have a separate header-y line for each
header to make them easier to relocate individually as part of the UAPI header
split.

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-12 13:52:27 +00:00
Frederic Weisbecker 1268fbc746 nohz: Remove tick_nohz_idle_enter_norcu() / tick_nohz_idle_exit_norcu()
Those two APIs were provided to optimize the calls of
tick_nohz_idle_enter() and rcu_idle_enter() into a single
irq disabled section. This way no interrupt happening in-between would
needlessly process any RCU job.

Now we are talking about an optimization for which benefits
have yet to be measured. Let's start simple and completely decouple
idle rcu and dyntick idle logics to simplify.

Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
2011-12-11 10:31:57 -08:00
Frederic Weisbecker 2bbb6817c0 nohz: Allow rcu extended quiescent state handling seperately from tick stop
It is assumed that rcu won't be used once we switch to tickless
mode and until we restart the tick. However this is not always
true, as in x86-64 where we dereference the idle notifiers after
the tick is stopped.

To prepare for fixing this, add two new APIs:
tick_nohz_idle_enter_norcu() and tick_nohz_idle_exit_norcu().

If no use of RCU is made in the idle loop between
tick_nohz_enter_idle() and tick_nohz_exit_idle() calls, the arch
must instead call the new *_norcu() version such that the arch doesn't
need to call rcu_idle_enter() and rcu_idle_exit().

Otherwise the arch must call tick_nohz_enter_idle() and
tick_nohz_exit_idle() and also call explicitly:

- rcu_idle_enter() after its last use of RCU before the CPU is put
to sleep.
- rcu_idle_exit() before the first use of RCU after the CPU is woken
up.

Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
2011-12-11 10:31:36 -08:00
Frederic Weisbecker 280f06774a nohz: Separate out irq exit and idle loop dyntick logic
The tick_nohz_stop_sched_tick() function, which tries to delay
the next timer tick as long as possible, can be called from two
places:

- From the idle loop to start the dytick idle mode
- From interrupt exit if we have interrupted the dyntick
idle mode, so that we reprogram the next tick event in
case the irq changed some internal state that requires this
action.

There are only few minor differences between both that
are handled by that function, driven by the ts->inidle
cpu variable and the inidle parameter. The whole guarantees
that we only update the dyntick mode on irq exit if we actually
interrupted the dyntick idle mode, and that we enter in RCU extended
quiescent state from idle loop entry only.

Split this function into:

- tick_nohz_idle_enter(), which sets ts->inidle to 1, enters
dynticks idle mode unconditionally if it can, and enters into RCU
extended quiescent state.

- tick_nohz_irq_exit() which only updates the dynticks idle mode
when ts->inidle is set (ie: if tick_nohz_idle_enter() has been called).

To maintain symmetry, tick_nohz_restart_sched_tick() has been renamed
into tick_nohz_idle_exit().

This simplifies the code and micro-optimize the irq exit path (no need
for local_irq_save there). This also prepares for the split between
dynticks and rcu extended quiescent state logics. We'll need this split to
further fix illegal uses of RCU in extended quiescent states in the idle
loop.

Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
2011-12-11 10:31:35 -08:00
Tejun Heo 0ee332c145 memblock: Kill early_node_map[]
Now all ARCH_POPULATES_NODE_MAP archs select HAVE_MEBLOCK_NODE_MAP -
there's no user of early_node_map[] left.  Kill early_node_map[] and
replace ARCH_POPULATES_NODE_MAP with HAVE_MEMBLOCK_NODE_MAP.  Also,
relocate for_each_mem_pfn_range() and helper from mm.h to memblock.h
as page_alloc.c would no longer host an alternative implementation.

This change is ultimately one to one mapping and shouldn't cause any
observable difference; however, after the recent changes, there are
some functions which now would fit memblock.c better than page_alloc.c
and dependency on HAVE_MEMBLOCK_NODE_MAP instead of HAVE_MEMBLOCK
doesn't make much sense on some of them.  Further cleanups for
functions inside HAVE_MEMBLOCK_NODE_MAP in mm.h would be nice.

-v2: Fix compile bug introduced by mis-spelling
 CONFIG_HAVE_MEMBLOCK_NODE_MAP to CONFIG_MEMBLOCK_HAVE_NODE_MAP in
 mmzone.h.  Reported by Stephen Rothwell.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: "H. Peter Anvin" <hpa@zytor.com>
2011-12-08 10:22:09 -08:00
Tejun Heo 9d15ffc824 mips: Use HAVE_MEMBLOCK_NODE_MAP
mips used early_node_map[] just to prime free_area_init_nodes().  Now
memblock can be used for the same purpose and early_node_map[] is
scheduled to be dropped.  Use memblock instead.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: linux-mips@linux-mips.org
2011-12-08 10:22:09 -08:00
Chandrakala Chavva 876f116618 MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
Only 64-bit kernels are supported, no need for SYS_SUPPORTS_HIGHMEM

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2988/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 12:32:57 +00:00
David Daney 595789a192 MIPS: Octeon: Add support for OCTEON II PCIe
OCTEON II SOCs have a different PCIe implementation than is present in
OCTEON Plus.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2985/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 12:32:57 +00:00
David Daney 53efc98ec6 MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2987/
Patchwork: https://patchwork.linux-mips.org/patch/3161/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 12:26:28 +00:00
Manuel Lauss 2af99920d5 MIPS: Alchemy: Update cpu-feature-overrides
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3006/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:16 +00:00
Manuel Lauss f2711be0f9 MIPS: Alchemy: db1200: Improve PB1200 detection.
The PB1200 has the CPLD located at an address which on the DB1200 is
RAM;  reading the Board-ID sometimes results in a PB1200 being detected
instead (especially during reboots after long uptimes).
On the other hand, the address of the DB1200's CPLD is hosting Flash
chips on the PB1200.  Test for the DB1200 first and additionally do a
quick write-test to the hexleds register to make sure we're writing
to the CPLD.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3005/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:16 +00:00
Manuel Lauss 3eab8095ef MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
With a generic plat_irq_dispatch (for Alchemy at least) code for both
interrupt controller types can coexist in a single kernel image and be
autodetected at runtime.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2935/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:16 +00:00
Manuel Lauss 894cc87e2e MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
IC and GPIC are now chain handlers of the traditional MIPS IRQ controller.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2933/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:16 +00:00
Manuel Lauss f267c882c7 MIPS: Alchemy: irq: register pm at irq init time
No need for a device_initcall.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2934/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:15 +00:00
Manuel Lauss 2a32daf117 MIPS: Alchemy: Touchscreen support on DB1100
Wire up the ADS7846 touchscreen controller on the DB1100.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:15 +00:00
Manuel Lauss e734ae13f1 MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
Add necessary transceiver control platform data and hook up the
IrDA peripheral on the DB1000 and DB1100 boards.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:15 +00:00
Manuel Lauss cd671c16f0 net/irda: convert au1k_ir to platform driver.
Moderate driver cleanup:
convert to platform driver, get rid of board-specific code.

Driver loads and runs on a DB1100 board.  But since I have no other
IrDA hardware to exchange data with I can't say whether it really sends
and receives.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: Samuel Ortiz <samuel@sortiz.org>
Cc: netdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2877/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:15 +00:00
Manuel Lauss 4d2216afee MIPS: Alchemy: remove unused board headers
The information in those headers is no longer necessary.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:15 +00:00
Manuel Lauss b67a1a02d4 MTD: nand: make au1550nd.c a platform_driver
Transform the au1550nd.c driver into a platform_driver and hook it
up in the PB1550 board (gen_nand works fine on the DB1550, but since
I don't have a PB1550 to test this driver stays for now).

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mtd@lists.infradead.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2875/
Patchwork: https://patchwork.linux-mips.org/patch/3160/
Acked-by: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08 10:42:10 +00:00
Hillf Danton b3ea581834 MIPS: Netlogic: Mark Netlogic chips as SMT capable
Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

[jayachandranc: simplified and adapted for new merged XLR/XLP code]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2972/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:57 +00:00
Jayachandran C 2aa54b2009 MIPS: Netlogic: Add support for XLP 3XX cores
Add new processor ID to asm/cpu.h and kernel/cpu-probe.c.
Update to new CPU frequency detection code which works on XLP 3XX
and 8XX.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2971/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:56 +00:00
Jayachandran C 66d29985fa MIPS: Netlogic: Merge some of XLR/XLP wakup code
Create a common NMI and reset handler in smpboot.S and use this for
both XLR and XLP.  In the earlier code, the woken up CPUs would
busy wait until released, switch this to wakeup by NMI.

The initial wakeup code or XLR and XLP are differ since they are
started from different bootloaders (XLP from u-boot and XLR from
netlogic bootloader). But in both platforms the woken up CPUs wait
and are released by sending an NMI.

Add support for starting XLR and XLP in 1/2/4 threads per core.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2970/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:56 +00:00
Jayachandran C 8da24631e6 MIPS: Netlogic: Add default XLP config.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2969/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:56 +00:00
Jayachandran C 1c773ea4dc MIPS: Netlogic: Add XLP makefiles and config
- Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards
- Update mips Makefiles to add XLP

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2968/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:56 +00:00
Jayachandran C 65040e224e MIPS: Netlogic: Add XLP platform files for XLP SoC
- Update common files to support XLP.
- Add arch/mips/include/asm/netlogic/xlp-hal for register definitions
  and access macros
- Add arch/mips/netlogic/xlp/ for XLP specific files.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2967/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:56 +00:00
Jayachandran C a3d4fb2d2a MIPS: Netlogic: XLP CPU support.
Add support for Netlogic's XLP MIPS SoC. This patch adds:
* XLP processor ID in cpu_probe.c and asm/cpu.h
* XLP case to asm/module.h
* CPU_XLP case to mm/tlbex.c
* minor change to r4k cache handling to ignore XLP secondary cache
* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2966/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Jayachandran C 0be3d9bb14 MIPS: Netlogic: Update default config
- Enable PCI and MSI by default
- Update cross compile tool-chain and rootfs

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2965/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Jayachandran C 0c9654072a MIPS: Netlogic: Move code common with XLP to common/
- Move code that can be shared with XLP (irq.c, smp.c, time.c and
  xlr_console.c) to arch/mips/netlogic/common
- Add asm/netlogic/haldefs.h and asm/netlogic/common.h for common and
  io functions shared with XLP
- remove type 'nlm_reg_t *' and use uint64_t for mmio offsets
- Move XLR specific code in smp.c to xlr/wakeup.c
- Move XLR specific PCI code from irq.c to mips/pci/pci-xlr.c
- Provide API for pic functions called from common/irq.c

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2964/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Jayachandran C 99fb2f7984 MIPS: Netlogic: No need to set -Werror in mips/xlr
The -Werror compilation flag is already set for arch/mips - it can be removed
from arch/mips/xlr/Makefile

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2963/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Jayachandran C c3c8cfb979 MIPS: Netlogic: Use CPU_XLR instead of NLM_XLR
The CPU_XLR config variable is sufficient for XLR compilation, the
variable NLM_XLR can be removed.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2962/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Jayachandran C faabeb9e57 MIPS: Netlogic: Style fixes for Platform
- Use platform- variable for xlr
- Load address common for all netlogic chips

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2961/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:55 +00:00
Ganesan Ramalingam f32671a867 MIPS: Netlogic: Add basic MSI support for XLR/XLS
Add basic support for MSI.

Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2730/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:54 +00:00
Jayachandran C b66f953cd0 MIPS: Netlogic: Avoid unnecessary cache flushes
XLR dcache is fully coherent across CPUs, so avoid unnecessary dcache
flushes.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:54 +00:00
Jayachandran C 11d48aace2 MIPS: Netlogic: add r4k_wait as the cpu_wait
Use r4k_wait as the CPU wait function for XLR/XLS processors.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2728/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:54 +00:00
Jayachandran C e6be33cf6b MIPS: Netlogic: Change load address
Move load address from 0x84000000 to 0x80100000 to avoid wasting
memory.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:54 +00:00
Deng-Cheng Zhu ff5d7265cf MIPS/Perf-events: Cleanup event->destroy at event init
Simplify the code by changing the place of event->destroy().

Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: David Daney <david.daney@cavium.com>
Cc: Eyal Barzilay <eyal@mips.com>
Cc: Zenon Fortuna <zenon@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/3109/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:41 +00:00
Deng-Cheng Zhu 266623b759 MIPS/Perf-events: Remove pmu and event state checking in validate_event()
Why removing pmu checking:
Since 3.2-rc1, when arch level event init is called, the event is already
connected to its PMU. Also, validate_event() is _only_ called by
validate_group() in event init, so there is no need of checking or
temporarily assigning event pmu during validate_group().

Why removing event state checking:
Events could be created in PERF_EVENT_STATE_OFF (attr->disabled == 1), when
these events go through this checking, validate_group() does dummy work.
But we do need to do group scheduling emulation for them in event init.
Again, validate_event() is _only_ called by validate_group().

Reference: http://www.spinics.net/lists/mips/msg42190.html
Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: David Daney <david.daney@cavium.com>
Cc: Eyal Barzilay <eyal@mips.com>
Cc: Zenon Fortuna <zenon@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/3108/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:41 +00:00
Deng-Cheng Zhu 74653ccf23 MIPS/Perf-events: Remove erroneous check on active_events
Port the following patch for ARM by Mark Rutland:

- 57ce9bb39b
    ARM: 6902/1: perf: Remove erroneous check on active_events

    When initialising a PMU, there is a check to protect against races with
    other CPUs filling all of the available event slots. Since armpmu_add
    checks that an event can be scheduled, we do not need to do this at
    initialisation time. Furthermore the current code is broken because it
    assumes that atomic_inc_not_zero will unconditionally increment
    active_counts and then tries to decrement it again on failure.

    This patch removes the broken, redundant code.

Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: David Daney <david.daney@cavium.com>
Cc: Eyal Barzilay <eyal@mips.com>
Cc: Zenon Fortuna <zenon@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/3106/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:41 +00:00
Deng-Cheng Zhu 2c1b54d331 MIPS/Perf-events: Don't do validation on raw events
MIPS licensees may want to modify performance counters to count extra
events. Also, now that the user is working on raw events, the manual is
being used for sure. And feeding unsupported events shouldn't cause
hardware failure and the like.

[ralf@linux-mips.org: performance events also being used in internal
performance evaluation and have a tendency to change as the micro-
architecture evolves, even for minor revisions that may not be
distinguishable by PrID.  It's not very practicable to maintain a list
of all events and there is no real benefit.]

Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: David Daney <david.daney@cavium.com>
Cc: Eyal Barzilay <eyal@mips.com>
Cc: Zenon Fortuna <zenon@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/3107/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:41 +00:00
Maneesh Soni 6457a396bb MIPS Kprobes: Support branch instructions probing
This patch provides support for kprobes on branch instructions. The branch
instruction at the probed address is actually emulated and not executed
out-of-line like other normal instructions. Instead the delay-slot instruction
is copied and single stepped out of line.

At the time of probe hit, the original branch instruction is evaluated
and the target cp0_epc is computed similar to compute_retrun_epc(). It
is also checked if the delay slot instruction can be skipped, which is
true if there is a NOP in delay slot or branch is taken in case of
branch likely instructions. Once the delay slot instruction is single
stepped the normal execution resume with the cp0_epc updated the earlier
computed cp0_epc as per the branch instructions.

Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2914/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Maneesh Soni d8d4e3ae0b MIPS Kprobes: Refactor branch emulation
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs->cp0_epc
as in case of kprobes where pt_regs->cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Maneesh Soni 9233c1ee71 MIPS Kprobes: Deny probes on ll/sc instructions
As ll/sc instruction are for atomic read-modify-write operations, allowing
probes on top of these insturctions is a bad idea.

Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2912/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Maneesh Soni 41dde781f5 MIPS Kprobes: Fix OOPS in arch_prepare_kprobe()
This patch fixes the arch_prepare_kprobe() on MIPS when it tries to find the
instruction at the previous address to the probed address. The oops happens
when the probed address is the first address in a kernel module and there is
no previous address. The patch uses probe_kernel_read() to safely read the
previous instruction.

CPU 3 Unable to handle kernel paging request at virtual address ffffffffc0211ffc, epc == ffffffff81113204, ra == ffffffff8111511c
Oops[#1]:
Cpu 3
$ 0   : 0000000000000000 0000000000000001 ffffffffc0212000 0000000000000000
$ 4   : ffffffffc0220030 0000000000000000 0000000000000adf ffffffff81a3f898
$ 8   : ffffffffc0220030 ffffffffffffffff 000000000000ffff 0000000000004821
$12   : 000000000000000a ffffffff81105ddc ffffffff812927d0 0000000000000000
$16   : ffffffff81a40000 ffffffffc0220030 ffffffffc0220030 ffffffffc0212660
$20   : 0000000000000000 0000000000000008 efffffffffffffff ffffffffc0220000
$24   : 0000000000000002 ffffffff8139f5b0
$28   : a800000072adc000 a800000072adfca0 ffffffffc0220000 ffffffff8111511c
Hi    : 0000000000000000
Lo    : 0000000000000000
epc   : ffffffff81113204 arch_prepare_kprobe+0x1c/0xe8
    Tainted: P
ra    : ffffffff8111511c register_kprobe+0x33c/0x730
Status: 10008ce3    KX SX UX KERNEL EXL IE
Cause : 00800008
BadVA : ffffffffc0211ffc
PrId  : 000d9008 (Cavium Octeon II)
Modules linked in: bpa_mem crashinfo pds tun cpumem ipv6 exportfs nfsd OOBnd(P) OOBhal(P) cvmx_mdio cvmx_gpio aipcmod(P) mtsmod procfs(P) utaker_mod dplr_pci hello atomicm_foo [last unloaded: sysmgr_hb]
Process stapio (pid: 5603, threadinfo=a800000072adc000, task=a8000000722e0438, tls=000000002b4bcda0)
Stack : ffffffff81a40000 ffffffff81a40000 ffffffffc0220030 ffffffff8111511c
        ffffffffc0218008 0000000000000001 ffffffffc0218008 0000000000000001
        ffffffffc0220000 ffffffffc021efe8 1000000000000000 0000000000000008
        efffffffffffffff ffffffffc0220000 ffffffffc0220000 ffffffffc021d500
        0000000000000022 0000000000000002 1111000072be02b8 0000000000000000
        00000000000015e6 00000000000015e6 00000000007d0f00 a800000072be02b8
        0000000000000000 ffffffff811d16c8 a80000000382e3b0 ffffffff811d5ba0
        ffffffff81b0a270 ffffffff81b0a270 ffffffffc0212000 0000000000000013
        ffffffffc0220030 ffffffffc021ed00 a800000089114c80 000000007f90d590
        a800000072adfe38 a800000089114c80 0000000010020000 0000000010020000
        ...
Call Trace:
[<ffffffff81113204>] arch_prepare_kprobe+0x1c/0xe8
[<ffffffff8111511c>] register_kprobe+0x33c/0x730
[<ffffffffc021d500>] _stp_ctl_write_cmd+0x8e8/0xa88 [atomicm_foo]
[<ffffffff812925cc>] vfs_write+0xb4/0x178
[<ffffffff81292828>] SyS_write+0x58/0x148
[<ffffffff81103844>] handle_sysn32+0x44/0x84

Code: ffb20010  ffb00000  dc820028 <8c44fffc> 8c500000  0c4449e0  0004203c  14400029  3c048199

Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2915/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Yong Zhang 8b5690f884 MIPS: irq: Remove IRQF_DISABLED
Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled and we even check
and yell when an interrupt handler returns with interrupts enabled (see
commit [b738a50a: genirq: Warn when handler enables interrupts]).

So now this flag is a NOOP and can be removed.

[ralf@linux-mips.org: Fixed up conflicts in
arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
arch/mips/kernel/perf_event.c.]

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de
linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2835/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
David Daney 43064c0c8e MIPS: Handle initmem in systems with kernel not in add_memory_region() mem
This patch addresses a couple of related problems:

1) The kernel may reside in physical memory outside of the ranges set
   by plat_mem_setup().  If this is the case, init mem cannot be
   reused as it resides outside of the range of pages that the kernel
   memory allocators control.

2) initrd images might be loaded in physical memory outside of the
   ranges set by plat_mem_setup().  The memory likewise cannot be
   reused.  The patch doesn't handle this specific case, but the
   infrastructure is useful for future patches that do.

The crux of the problem is that there are memory regions that need be
memory_present(), but that cannot be free_bootmem() at the time of
arch_mem_init().  We create a new type of memory (BOOT_MEM_INIT_RAM)
for use with add_memory_region().  Then arch_mem_init() adds the init
mem with this type if the init mem is not already covered by existing
ranges.

When memory is being freed into the bootmem allocator, we skip the
BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal
them as memory_present().  This way when they are later freed, the
necessary memory manager structures have initialized and the Sparse
allocater is prevented from crashing.

The Octeon specific code that handled this case is removed, because
the new general purpose code handles the case.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1988/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
Hillf Danton b1c10bea62 MIPS: Add fast get_user_pages
Gup is used in a few cases, say futex.

This work is derived from the x86 version, and operations of pte and pmd are
adapted to the defines of MIPS in straight forward manner.

[ralf@linux-mips.org: Fixed up reject in arch/mips/mm/Makefile due to
whitespace formatting differences.  Fixed build error in gup.c due to
conflicting changes elsewhere in the kernel.]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2859/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
Hillf Danton 5639bc4a64 MIPS: Hugetlb: Keep TLB cache hot while flushing
If we only flush the TLB of the given huge page, the TLB cache remains hot
for the relevant mm as it is, and less will be refilled after flush, huge
or not.

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: linux-mips@linux-mips.org
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
Thomas Bogendoerfer e84de0c619 MIPS: GIO bus support for SGI IP22/28
SGI IP22/IP28 machines have GIO busses for adding graphics and other
extension cards. This patch adds support for GIO driver/device
handling and converts the newport console driver to a GIO driver.

[ralf@linux-mips.org: Fixed build error caused by the modules.h -> export.h
changes.]

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
To: linux-fbdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:44 +00:00
David Daney 714c1f5c1a MIPS: Octeon: Update DMA mapping operations for OCTEON II processors.
OCTEON II has a new dma to phys mapping method for PCIe.  Define
OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it.

OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so
allocate this too.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2983/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney 26afc5e399 MIPS: Octeon: Update feature test functions for new chips and features.
cvmx.h was rearranged to fix include file ordering problems, but there
is no change other than moving some definitions around.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2984/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney 412394d104 MIPS: Octeon: Update SOC PCI related register definitions for new chips.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney 37d3bfd992 MIPS: Octeon: Rearrange CVMX files in preperation for device tree
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney ada11a339d MIPS: Octeon: Update bootloader board type constants.
Many new types of boards exist, so lets recognize them.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2940/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney af866496c7 MIPS: Octeon: Move some Ethernet support files out of staging.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2942/
Patchwork: https://patchwork.linux-mips.org/patch/3012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney 751c9f6849 MIPS: Oceton: Update model detection code for new chips.
Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney 506d24be55 MIPS: Octeon: Update struct cvmx_bootinfo to v3.
Bootloaders can pass version 3 of this structure.  Add the new fields
so we can support the Device Tree.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
Kevin Cernekee df0ac8a406 MIPS: BMIPS: Add SMP support code for BMIPS43xx/BMIPS5000
Initial commit of BMIPS SMP support code.  Smoke-tested on a variety of
BMIPS4350, BMIPS4380, and BMIPS5000 platforms.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2977/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee 6fb97effee MIPS: Add board_ebase_setup()
Some systems need to relocate the MIPS exception vector base during
trap initialization.  Add a hook to make this possible.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee 34bd92e27b MIPS: Add NMI notifier
Allow the board support code to register a raw notifier callback for
NMI, similar to what is done for CU2 exceptions.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee 18a1eef92d MIPS: BMIPS: Introduce bmips.h
bmips.h contains BMIPS definitions that are useful for SMP, vector
relocation, performance counters, etc.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2973/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee 020232f1ca MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations
Several BMIPS-specific CP0 registers are used for SMP boot and other
operations.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2956/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee 1c7c44519a MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS
Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Kevin Cernekee 15fb0a1509 MIPS: Clean up whitespace warning in hazards.h
Use a tab on second and subsequent lines of multiline #if's, for
consistency with the next commit.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Kevin Cernekee 1bbb6c1b7b MIPS: BMIPS: Fix up Kconfig settings
Factor out common BMIPS options into "CPU_BMIPS".  Add L2 cache for
BMIPS5000.  Add CPU_MIPS32 to satisfy checks in page.h, r4k_switch.S,
tlb-r4k.c, etc.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Florian Fainelli b15a6d62b5 MIPS: BCM63XX: generate WLAN MAC address after registering ethernet devices.
In case the MAC address pool is not big enough to also register a WLAN device
prefer registering the Ethernet devices.

[ralf@linux-mips.org: Fixed formatting as per Sergei's complaint.]

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3013/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli 92d9ae2026 MIPS: BCM63xx: Fix GPIO set/get for BCM6345
On BCM6345, the register offsets for the set/get GPIO registers is wrong.
Use the same logic as the one present in arch/mips/bcm63xx/irq.c to
define the correct gpio_out_low_reg value when support for BCM6345
is compiled in.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli e1c96c8620 MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address
Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli d61fcfe2bb MIPS: BCM63xx: Fix SDRAM size computation for BCM6345
Instead of hardcoding the amount of available RAM, read the number of
effective multiples of 8MB from SDRAM_MBASE_REG.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon 04712f3ff6 MIPS: BCM63XX: Add support for bcm6368 CPU.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon 6224892c81 MIPS: BCM63XX: Add external irq support for non 6348 CPUs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon 71a43927b3 MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.
bcm6368 has larger irq registers, prepare for this.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon 015ce7d352 MIPS: BCM63XX: Introduce bcm_readq & bcm_writeq.
Needed for upcoming 6368 CPU support.

[ralf@linux-mips.org: Changed function names as per Sergei's comments.]

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2896/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon 37c42a741f MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation.
External irq only works for 6348, change code to prepare support of
other CPUs.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2895/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon f61cced993 MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon d430b6c5e7 MIPS: BCM63XX: Add more register sets & missing register definitions.
Needed for upcoming 6368 CPU support.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon ec68c5206a MIPS: BCM63XX: Cleanup cpu registers.
Use preprocessor when possible to avoid duplicated and error-prone
code.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2897/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon d64ed7ada2 MIPS: BCM63XX: Call board_register_device from device_initcall()
Some device registration (eg leds), expect subsystem initcall to be
run first, so move board device registration to device_initcall().

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:02 +00:00
Maxime Bizon 455a503f4c MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.
Internal SOC registers can be directly accessed, no need to waste a
TLB entry.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:02 +00:00
Gabor Juhos b606d5ae90 MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.c
Rename the file as a last step of the 'ar913x' removal changes.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3034/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 009b9d52e5 MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.h
The 'ar913x' part was removed from the common variable and function names,
so remove that from the relevant header file name as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3033/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 0b0db270b8 MIPS: ath79: Register the wireless MAC device on the AP121 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 3ae4002231 MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMAC
The ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific
wireless MAC registration code.  The registration code now supports the
AR933X SoCs as well. Rename the option to reflect the changes.

Also make the new option depends on SOC_AR933X.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3031/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 34cfcd26bd MIPS: ath79: Add AR933x specific WMAC setup code
The wireless MAC of the AR933x SoCs uses different base address, and
requires different setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 6903bb49da MIPS: ath79: Separate AR913x SoC specific WMAC setup code
The device registration code can be shared between the different SoCs, but
the required setup code varies Move AR913x specific setup code into a
separate function in order to make adding support for another SoCs easier.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3029/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 67b0f0f1b3 MIPS: ath79: Remove 'ar913x' from common variable and function names
The wireless MAC specific variables and the registration code can be shared
between multiple SoCs. Remove the 'ar913x' part from the function and
variable names to avoid confusions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3028/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos be5f362320 MIPS: ath79: Store the SoC revision in a global variable
Knowing the exact revision of the SoC is required to make runtime decisions
in various code paths.  We have determined the SoC revision already, so we
only need to store that in a global variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3027/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Rene Bolldorf 2dc7b4a197 Initial support for the Ubiquiti Networks XM board (rev 1.0).
Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3020/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Rene Bolldorf 4ff40d5a76 MIPS: Initial PCI support for Atheros 724x SoCs.
[ralf@linux-mips.org: Fixed the odd formatting of all break statements.]

Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3019/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 7e0dde175e MIPS: ath79: Add initial support for the Atheros AP121 reference board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2531/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 13051c5cc3 MIPS: ath79: register UART device for the AR933X SoCs
The AR933X SoCs does not have a 8250 compatible UART, they
are using a different UART core. Register a different platform
device for the different UART.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos d57f341ba0 SERIAL: AR933X: Add driver for the built-in UART of the SoC
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos c279b77596 MIPS: ath79: add AR933X specific USB platform device registration
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos 2c048303d6 MIPS: ath79: Add config symbol for the AR933X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2525/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos fdfbcf4705 MIPS: ath79: add AR933X specific GPIO initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos 54eed4c77c MIPS: ath79: Add AR933X specific IRQ initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 7ee15d8a28 MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear}
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2523/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 04225e1d22 MIPS: ath79: add AR933X specific clock init
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2522/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 0bd3acdf7d MIPS: ath79: Add early printk support for the AR933X SoCs
The AR933X SoCs are using a different UART, thus require
different code for early printk support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2521/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 6d1c8fde2d MIPS: ath79: add revision id for the AR933X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2538/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 8bed1288d4 MIPS: ath79: Remove superfluous parentheses
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2519/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Gabor Juhos 7e98aa4639 MIPS: ath79: add common USB Host Controller device
Add common platform_device and helper code to make the registration of
the built-in USB controllers easier on the board which are using them.
Also register the USB controller on the AP81 and PB44 boards.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2442/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Gabor Juhos d2b4ac1e5d MIPS: ath79: Handle more MISC IRQs
The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.
The patch adds support for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2440/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Gabor Juhos 2f8501b9b8 MIPS: ath79: Change number of available IRQs
The status register of the miscellaneous interrupt controller is 32 bits
wide, but the actual value of NR_IRQS covers only 8 of them. Change
NR_IRQS in order to make all of those interrupt lines usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2441/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Florian Fainelli f77138e8d5 MIPS: AR7: add LEDs layout for the Actiontec GT701 router
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:34 +00:00
Florian Fainelli edc9ded191 MIPS: AR7: constify some arrays in gpio and prom code
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2980/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:34 +00:00
Manuel Lauss 1c043f16a0 MIPS: Alchemy: Add RTC device to all devboards
All Devboards can use the 32kHz counter as a RTC device.

Also delete the custom CMOS RTC header, which can be used for the
DS1693 on the PB1500.  But since it doesn't have a buffer battery
it is as useful as the on-chip RTC which I prefer.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:07 +00:00
Manuel Lauss c9af5144ce MIPS: Alchemy: MMC for DB1100
This patch hooks up the 2 MMC sockets on the DB1100 board.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2873/
Patchwork: https://patchwork.linux-mips.org/patch/2920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:07 +00:00
Manuel Lauss f59c811f8c MIPS: Alchemy: one kernel for DB1000/DB1500/DB1100
These 3 boards are very similar; with this patch a single kernel image
which runs on all three can be built.

Tested on DB1500 and DB1100.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:07 +00:00
Manuel Lauss 6f7c8623db MIPS: Alchemy: Merge PB1200 support into DB1200 code.
The PB1200 is basically a DB1200 with additional MMC and camera sockets
and different base addresses for external hardware (CPLD, IDE, Net, NAND).

This patch implements the missing PB1200 features in DB1200 support code
and runtime board detection.

Tested on DB1200 only.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2880/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:07 +00:00
Manuel Lauss a9b71a8f0f MIPS: Alchemy: move au1200fb global functions to platform data
au1200fb calls 3 functions which have to be defined in board code.
Fix this ugliness with the introduction of platform_data.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-fbdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:07 +00:00
Manuel Lauss 7c4b24da07 MIPS: Alchemy: merge devboard code into single per-board files.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2884/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:06 +00:00
Manuel Lauss 8e026910fc MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files
Most of these files are have more comments than real code;  merge
them all into single board-<name>.c files.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2869/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:06 +00:00
Manuel Lauss f869d42e58 MIPS: Alchemy: Improved DB1550 support, with audio and serial busses.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:06 +00:00
Manuel Lauss 64cd04d0cf MIPS: Alchemy: Basic support for the DB1300 board.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2867/
Patchwork: https://patchwork.linux-mips.org/patch/2919/
Patchwork: https://patchwork.linux-mips.org/patch/2928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:06 +00:00
Manuel Lauss 809f36c6f4 MIPS: Alchemy: Au1300 SoC support
Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:05 +00:00
Manuel Lauss fb469f084f MIPS: Alchemy: devboards: remove unneeded BCSR IRQ reg acc
Initially I had to write to both the MASK and ENABLE registers, otherwise
the CPLD would generate tons of spurious interrupts.  With the change to
the demux handler to disable the muxed line, it is now sufficient to
disable the interrupt by writing either the enable or mask register.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2865/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:05 +00:00
Manuel Lauss 435037c630 MIPS: Alchemy: Drop MIRAGE/BOSPORUS board support
No test hardware and no (apparent) users.  These boards seem very
similar to the DB1500, so if required support can be brought back
again (I have datasheets) but then with dedicated board code, not
tacked on to DB1000 support.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2864/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:05 +00:00
Manuel Lauss 3f724080a3 MIPS: Alchemy: remove PB1000 support
Noone seems to have test hardware or care anymore.  Drop PB1000 support
and along with it the old Alchemy PCMCIA socket driver.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: linux-pcmcia@lists.infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/2881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:05 +00:00
Ralf Baechle 3d18c98367 MIPS: Fix Jazz 64-bit build error.
Move add_wired_entry to its own header file from where it will be
always included.  Patch up other users of add_wired_entry to also include
the header as needed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:01:45 +00:00
Ralf Baechle ab75dc02c1 MIPS: Fix up inconsistency in panic() string argument.
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:01:45 +00:00
Manuel Lauss 864c6c22e9 MIPS: Alchemy: Fix PCI PM
Move PCI Controller PM to syscore_ops since the platform_driver PM methods
are called way too late on resume and far too early on suspend (after and
before PCI device resume/suspend).
This also allows to simplify wired entry management a bit.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3007/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:01:45 +00:00
David S. Miller 959327c784 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 2011-12-06 21:10:05 -05:00
Linus Torvalds 232ea34455 Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf: Fix loss of notification with multi-event
  perf, x86: Force IBS LVT offset assignment for family 10h
  perf, x86: Disable PEBS on SandyBridge chips
  trace_events_filter: Use rcu_assign_pointer() when setting ftrace_event_call->filter
  perf session: Fix crash with invalid CPU list
  perf python: Fix undefined symbol problem
  perf/x86: Enable raw event access to Intel offcore events
  perf: Don't use -ENOSPC for out of PMU resources
  perf: Do not set task_ctx pointer in cpuctx if there are no events in the context
  perf/x86: Fix PEBS instruction unwind
  oprofile, x86: Fix crash when unloading module (nmi timer mode)
  oprofile: Fix crash when unloading module (hr timer mode)
2011-12-05 16:54:00 -08:00
Michael S. Tsirkin eab90291d3 mips: switch to GENERIC_PCI_IOMAP
mips copied pci_iomap from generic code, probably to avoid
pulling the rest of iomap.c in.  Since that's in
a separate file now, we can reuse the common implementation.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-11-28 21:13:13 +02:00
Tejun Heo d88e4cb671 freezer: remove now unused TIF_FREEZE
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arch@vger.kernel.org
2011-11-21 12:32:25 -08:00
David S. Miller efd0bf97de Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
The forcedeth changes had a conflict with the conversion over
to atomic u64 statistics in net-next.

The libertas cfg.c code had a conflict with the bss reference
counting fix by John Linville in net-next.

Conflicts:
	drivers/net/ethernet/nvidia/forcedeth.c
	drivers/net/wireless/libertas/cfg.c
2011-11-21 13:50:33 -05:00
John W. Linville e11c259f74 Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
Conflicts:
	include/net/bluetooth/bluetooth.h
2011-11-17 13:11:43 -05:00
Linus Torvalds ff0ff78068 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: lantiq: use export.h in favour of module.h
  MAINTAINERS: The MIPS git tree has moved.
  MIPS: Fix build error due to missing inclusion of <linux/export.h>.
  MIPS: ASID conflict after CPU hotplug
  MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/flash_setup.c
  MIPS: errloongson2_clock: Fix build error by including linux/module.h
  STAGING: octeon-ethernet: Fix compile error caused by skb_frag_struct change
  MIPS: Hook up process_vm_readv and process_vm_writev system calls.
  MIPS: Kernel hangs occasionally during boot.
  MIPS: Octeon: Mark SMP-IPI interrupt as IRQF_NO_THREAD
  MIPS: BCM47xx: fix build with GENERIC_GPIO configuration
  MIPS: NXP: Remove unused source files.
  MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
2011-11-15 22:44:45 -02:00
John Crispin 4af92e7a68 MIPS: lantiq: use export.h in favour of module.h
The code located at arch/mips/lantiq/ included module.h to be able to use
the EXPORT_SYMBOL* macros. These can now be directly included using
export.h.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2937/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-11-14 13:59:24 +00:00
Peter Zijlstra aa2bc1ade5 perf: Don't use -ENOSPC for out of PMU resources
People (Linus) objected to using -ENOSPC to signal not having enough
resources on the PMU to satisfy the request. Use -EINVAL.

Requested-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-xv8geaz2zpbjhlx0svmpp28n@git.kernel.org
[ merged to newer kernel, fixed up MIPS impact ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-11-14 13:01:24 +01:00
Paul Bolle 63f722e629 MIPS: Sibyte: drop select of SIBYTE_CFE
SIBYTE_CFE got killed in commit 05f94eebd5 ("MIPS: Sibyte: Remove
standalone kernel support"). This means that since v2.6.31 there is no
Kconfig symbol SIBYTE_CFE. The select statement for that symbol is a
nop. Drop it.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-11-13 21:27:34 +01:00
Paul Bolle 3f9416cacc drop "select GCD" from three Kconfig files
There is no Kconfig symbol named GCD. The three select statements for
that symbol are nops. Drop these.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-11-13 20:58:22 +01:00
Jiri Kosina 2290c0d06d Merge branch 'master' into for-next
Sync with Linus tree to have 157550ff ("mtd: add GPMI-NAND driver
in the config and Makefile") as I have patch depending on that one.
2011-11-13 20:55:53 +01:00
Ralf Baechle 71ca869375 MIPS: Fix build error due to missing inclusion of <linux/export.h>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-11-11 15:08:11 +00:00
Maksim Rayskiy 5c20019713 MIPS: ASID conflict after CPU hotplug
I am running SMP Linux 2.6.37-rc1 on BMIPS5000 (single core dual thread)
and observe some abnormalities when doing system suspend/resume which I
narrowed down to cpu hotplugging. The suspend brings the second thread
processor down and then restarts it, after which I see memory corruption
in userspace. I started digging and found out that problem occurs because
while doing execve() the child process is getting the same ASID as the
parent, which obviously corrupts parent's address space.

Further digging showed that activate_mm() calls get_new_mmu_context() to
get a new ASID, but at this time ASID field in entryHi is 1, and
asid_cache(cpu) is 0x100 (it was just reset to ASID_FIRST_VERSION when
the secondary TP was booting).

So, get_new_mmu_context() increments the asid_cache(cpu) value to
0x101, and thus puts 0x01 into entryHi. The result - ASID field does
not get changed as it was supposed to.

My solution is very simple - do not reset asid_cache(cpu) on TP warm
restart.

Patchwork: https://patchwork.linux-mips.org/patch/1797/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-11-10 17:59:45 +00:00
David Daney b2f909419b MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/flash_setup.c
The parse_mtd_partitions() and mtd_device_register() functions were
combined into mtd_device_parse_register().  So call that instead.

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2923/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-11-10 17:59:45 +00:00
Aaro Koskinen 54b2edf487 MIPS: errloongson2_clock: Fix build error by including linux/module.h
Fix the following compilation failure with v3.2-rc1 by including module.h:

  CC [M]  arch/mips/kernel/cpufreq/loongson2_clock.o
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: data definition has no type or storage class [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/kernel/cpufreq/loongson2_clock.c:168:15: error: expected declaration specifiers or '...' before string constant
arch/mips/kernel/cpufreq/loongson2_clock.c:169:20: error: expected declaration specifiers or '...' before string constant
arch/mips/kernel/cpufreq/loongson2_clock.c:170:16: error: expected declaration specifiers or '...' before string constant

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2922/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-11-10 17:59:45 +00:00
Johannes Berg 6e3e939f3b net: add wireless TX status socket option
The 802.1X EAPOL handshake hostapd does requires
knowing whether the frame was ack'ed by the peer.
Currently, we fudge this pretty badly by not even
transmitting the frame as a normal data frame but
injecting it with radiotap and getting the status
out of radiotap monitor as well. This is rather
complex, confuses users (mon.wlan0 presence) and
doesn't work with all hardware.

To get rid of that hack, introduce a real wifi TX
status option for data frame transmissions.

This works similar to the existing TX timestamping
in that it reflects the SKB back to the socket's
error queue with a SCM_WIFI_STATUS cmsg that has
an int indicating ACK status (0/1).

Since it is possible that at some point we will
want to have TX timestamping and wifi status in a
single errqueue SKB (there's little point in not
doing that), redefine SO_EE_ORIGIN_TIMESTAMPING
to SO_EE_ORIGIN_TXSTATUS which can collect more
than just the timestamp; keep the old constant
as an alias of course. Currently the internal APIs
don't make that possible, but it wouldn't be hard
to split them up in a way that makes it possible.

Thanks to Neil Horman for helping me figure out
the functions that add the control messages.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2011-11-09 16:01:02 -05:00