Setting the supply is optional but beneficial, it will cause PMIC
voltages to be dynamically changed with cpu frequency.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Model the Carrier Board power distribution by adding a fixed 3.3V
and 5V regulator. The 3.3V regulator is connected to the backlight
as well as the display supply. The 5V regulator is used to supply
USB VBUS.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ADC is directly supplied by the PMIC 1.8V rail, remove the
superfluous fixed regulator.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The regulator-always-on property on the Ethernet rail prevents Linux
from disabling the rail when Ethernet is shut down (suspend or simply
link down). With this change the regulator framework will disable the
rail when the Ethernet PHY is not used, saving power especially on
carrier board not using Ethernet.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix wrong voltage of PWR_EN_+V3.3 rail. The error had no noticeable
effect since no consumer explicitly requested a specific voltage.
Also use round voltages as it is common in other device trees.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To make use of the new eLCDIF DRM driver OF graph description is
required. Describe the display using OF graph nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename the switch2@0 label of the switch2 node to switch@0 to respect
the general unit@address DTS rule, and be consistent with the other
switch nodes of the DTS file.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for i2c nodes i2c1 and i2c2 on Is.IoT MX6UL
eMMC variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
lcdif nodes are differ wrt specific LCD connected on Is.IoT MX6UL
module, so create separate file 'imx6ul-isiot-common.dtsi' for common
lcdif node structure and include the same on respective dts.
More common nodes will add in future patches.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch add support for lcdif backlight on Is.IoT MX6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch add support for lcdif backlight on GEAM6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for the Zodiac Inflight Innovations RDU2 board,
which has both a Quad and a QuadPlus variant.
The board supports different panels, with the bootloader patching
in the correct compatible, depending on the hardware configuration.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP
and hook them up to the assigned IPU nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pinfunc definitions are ordered by mux_reg and so automatically by
conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no
mux_reg. Put it to the place where it its in the order of conf_regs
instead of the top.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This was introduced in commit 18e2b50407 ("ARM: dts: imx25-pinfunc:
more defines").
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
System Reset Controller in i.MX7 doesn't have any commonality with IP
block found in i.MX5 and i.MX6 SoC families. Given that and the new
upstream driver for i.MX7 variant (see
https://lkml.org/lkml/2017/2/21/466) remove "fsl,imx51-src" from
compatibility string.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 12.3" industrial, 1280x480 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 10.1" industrial, 1280x800 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx7d-sdb has a mickro bus connector that can be connected to a
Sensirion SHT11 click board (temperature and humidity sensor):
https://shop.mikroe.com/click/sensors/sht1x
Add a new device tree file to describe such hardware.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PHYs embedded in the switch direct there interrupts through the
switch interrupt controllers. Now that devel C has its switch
interrupts connected to the SoC, the PHY interrupts can be used by
phylib. Explicitly include MDIO nodes in the switch device tree nodes,
and link the PHY interrupts back to the switch interrupt
controller. Also, link the ports to the PHYs on the MDIO bus.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The devel B and devel C board use the same GPIO lines for interrupts
from the two switches. Move the pinmux nodes from devel B into the
shared .dtsi file, and wire up the interrupts on devel C.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
UART on i.MX6SX (like all other i.MX6 SoC variants) has the same
programming model as the 'imx6q-uart' type, so add it to the compatible
UART string.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change the maxium spi clock frequency from 20MHz to 10MHz to meet the
operation voltage range requirement recommended in AT25 datasheet.
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit 361b848202 ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reference them by handle and remove the changed clocks that are copied
from the downstream DT and are not part of the mainline binding.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Referencing the node by handle make the QP DT more resilent against
changes of the base DT. Also remove the duplicated reg property, it's
not needed as it the same as in the base DT, just the compatible is
actually different.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By using the handle, we can avoid some duplication of the base DT
and so avoid any maintenance overhead in the QP DT if the referenced
node changes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All currently supported i.MX25-based machines use phy_type = "utmi" and
dr_mode = "otg". So this seems to be a sensible default.
This also doesn't hurt out-of-tree machines because up to now they had
to specify these two properties in the machine.dts which still takes
precedence by just overwriting the defaults added here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and is sold as part
of I2SE's PLC Bundle for IoT. This is a development kit for Homeplug
Green PHY based powerline products based on Qualcomms QCA7000 chip.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and features a
EnOcean daugther board based on the popular TCM310 chipset.
This product is intended to be used for e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and features a
RS-485 daugther board. This device is intended to be used for
e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is an USB pen drive sized development board,
based on NXP's i.MX28 CPU. In contrast to the previous
model "Duckbill", the "Duckbill 2" series has internal
eMMC storage.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull ARM fixes from Russell King:
"A number of ARM fixes:
- prevent oopses caused by dma_get_sgtable() and declared DMA
coherent memory
- fix boot failure on nommu caused by ID_PFR1 access
- a number of kprobes fixes from Jon Medhurst and Masami Hiramatsu"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8665/1: nommu: access ID_PFR1 only if CPUID scheme
ARM: dma-mapping: disallow dma_get_sgtable() for non-kernel managed memory
arm: kprobes: Align stack to 8-bytes in test code
arm: kprobes: Fix the return address of multiple kretprobes
arm: kprobes: Skip single-stepping in recursing path if possible
arm: kprobes: Allow to handle reentered kprobe on single-stepping
Now that we support both timers and PMU reporting interrupts
to userspace, we can advertise this support.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When not using an in-kernel VGIC, but instead emulating an interrupt
controller in userspace, we should report the PMU overflow status to
that userspace interrupt controller using the KVM_CAP_ARM_USER_IRQ
feature.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If you're running with a userspace gic or other interrupt controller
(that is no vgic in the kernel), then you have so far not been able to
use the architected timers, because the output of the architected
timers, which are driven inside the kernel, was a kernel-only construct
between the arch timer code and the vgic.
This patch implements the new KVM_CAP_ARM_USER_IRQ feature, where we use a
side channel on the kvm_run structure, run->s.regs.device_irq_level, to
always notify userspace of the timer output levels when using a userspace
irqchip.
This works by ensuring that before we enter the guest, if the timer
output level has changed compared to what we last told userspace, we
don't enter the guest, but instead return to userspace to notify it of
the new level. If we are exiting, because of an MMIO for example, and
the level changed at the same time, the value is also updated and
userspace can sample the line as it needs. This is nicely achieved
simply always updating the timer_irq_level field after the main run
loop.
Note that the kvm_timer_update_irq trace event is changed to show the
host IRQ number for the timer instead of the guest IRQ number, because
the kernel no longer know which IRQ userspace wires up the timer signal
to.
Also note that this patch implements all required functionality but does
not yet advertise the capability.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
We have 2 modes for dealing with interrupts in the ARM world. We can
either handle them all using hardware acceleration through the vgic or
we can emulate a gic in user space and only drive CPU IRQ pins from
there.
Unfortunately, when driving IRQs from user space, we never tell user
space about events from devices emulated inside the kernel, which may
result in interrupt line state changes, so we lose out on for example
timer and PMU events if we run with user space gic emulation.
Define an ABI to publish such device output levels to userspace.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We now return HVC_STUB_ERR when a stub hypercall fails, but we
leave whatever was in r0 on success. Zeroing it on return seems
like a good idea.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Nobody is using __hyp_get_vectors anymore, so let's remove both
implementations (hyp-stub and KVM).
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
When the compressed image needs to be relocated to avoid being
overwritten by the decompression process, we need to relocate
the hyp vectors as well so that we can find them once the
decompression has taken effect.
For that, we perform the following calculation:
u32 v = __hyp_get_vectors();
v += offset;
__hyp_set_vectors(v);
But we're guaranteed that the initial value of v as returned by
__hyp_get_vectors is always __hyp_stub_vectors, because we have
just set it by calling __hyp_stub_install.
So let's remove the use of __hyp_get_vectors, and directly use
__hyp_stub_vectors instead.
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Instead of trying to compare the value given by __hyp_get_vectors(),
which doesn't offer any real guarantee to be the stub's address, use
HVC_RESET_VECTORS to make sure we're in a sane state to reinstall
KVM across PM events.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
With __cpu_reset_hyp_mode having become fairly dumb, there is no
need for kvm_get_idmap_start anymore.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
__cpu_reset_hyp_mode doesn't need to be passed any argument now,
as the hyp-stub implementations are self-contained, and is now
reduced to just calling __hyp_reset_vectors(). Let's drop the
wrapper and use the stub hypercall directly.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Should kvm_reboot() be invoked while guest is running, an IPI
wil be issued, forcing the guest to exit and HYP being reset to
the stubs. We will then try to reenter the guest, only to get
an error (HVC_STUB_ERR).
This patch allows this case to be gracefully handled by exiting
the run loop.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Another missing stub hypercall is HVC_SOFT_RESTART. It turns out
that it is pretty easy to implement in terms of HVC_RESET_VECTORS
(since it needs to turn the MMU off).
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
We are now able to use the hyp stub to reset HYP mode. Time to
kiss __kvm_hyp_reset goodbye, and use __hyp_reset_vectors.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
We now have a full hyp-stub implementation in the KVM init code,
but the main KVM code only supports HVC_GET_VECTORS, which is not
enough.
Instead of reinventing the wheel, let's reuse the init implementation
by branching to the idmap page when called with a hyp-stub hypercall.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Now that we have an infrastructure to handle hypercalls in the KVM
init code, let's implement HVC_GET_VECTORS there.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
In order to restore HYP mode to its original condition, KVM currently
implements __kvm_hyp_reset(). As we're moving towards a hyp-stub
defined API, it becomes necessary to implement HVC_RESET_VECTORS.
This patch adds the HVC_RESET_VECTORS hypercall to the KVM init
code, which so far lacked any form of hypercall support.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Let's define a new stub hypercall that resets the HYP configuration
to its default: hyp-stub vectors, and MMU disabled.
Of course, for the hyp-stub itself, this is a trivial no-op.
Hypervisors will have a bit more work to do.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Define a standard return value to be returned when a hyp stub
call fails.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
The KVM code needs to be able to compute the address of
symbols in its idmap page (the equivalent of a virt_to_idmap()
call). Unfortunately, virt_to_idmap is slightly complicated,
depending on the use of arch_phys_to_idmap_offset or not, and
none of that is readily available at HYP.
Instead, expose a single kimage_voffset variable which contains the
offset between a kernel VA and its idmap address, enabling the
VA->IDMAP conversion. This allows the KVM code to behave similarily
to its arm64 counterpart.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
It is not really obvious why the restart address should be in r3
when communicated to the hyp-stub. r1 should be perfectly adequate,
and consistent with the rest of the code.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
cpu_v7_reset() now takes a second parameter indicating whether
we should reboot in HYP or not. Update the documentation to
reflect this.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
The conversion of the HYP stub ABI to something similar to arm64
left the KVM code broken, as it doesn't know about the new
stub numbering. Let's move the various #defines to virt.h, and
let KVM use HVC_GET_VECTORS.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
When we soft-reboot (eg, kexec) from one kernel into the next, we need
to ensure that we enter the new kernel in the same processor mode as
when we were entered, so that (eg) the new kernel can install its own
hypervisor - the old kernel's hypervisor will have been overwritten.
In order to do this, we need to pass a flag to cpu_reset() so it knows
what to do, and we need to modify the kernel's own hypervisor stub to
allow it to handle a soft-reboot.
As we are always guaranteed to install our own hypervisor if we're
entered in HYP32 mode, and KVM will have moved itself out of the way
on kexec/normal reboot, we can assume that our hypervisor is in place
when we want to kexec, so changing our hypervisor API should not be a
problem.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Improve the hyp-stub ABI to allow it to do more than just get/set the
vectors. We follow the example in ARM64, where r0 is used as an opcode
with the other registers as an argument.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Instead of considering that a CP15 accessor has failed when
returning false, let's consider that it is *always* successful
(after all, we won't stand for an incomplete emulation).
The return value now simply indicates whether we should skip
the instruction (because it has now been emulated), or if we
should leave the PC alone if the emulation has injected an
exception.
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reads from write-only system registers are generally confined to
EL1 and not propagated to EL2 (that's what the architecture
mantates). In order to be sure that we have a sane behaviour
even in the unlikely event that we have a broken system, we still
handle it in KVM. Same goes for write to RO registers.
In that case, let's inject an undef into the guest.
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We don't have to save/restore the VMCR on every entry to/from the guest,
since on GICv2 we can access the control interface from EL1 and on VHE
systems with GICv3 we can access the control interface from KVM running
in EL2.
GICv3 systems without VHE becomes the rare case, which has to
save/restore the register on each round trip.
Note that userspace accesses may see out-of-date values if the VCPU is
running while accessing the VGIC state via the KVM device API, but this
is already the case and it is up to userspace to quiesce the CPUs before
reading the CPU registers from the GIC for an up-to-date view.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
In order to perform an operation on a gpa range, we currently iterate
over each page in a user memory slot for the given range. This is
inefficient while dealing with a big range (e.g, a VMA), especially
while unmaping a range. At present, with stage2 unmap on a range with
a hugepage backed region, we clear the PMD when we unmap the first
page in the loop. The remaining iterations simply traverse the page table
down to the PMD level only to see that nothing is in there.
This patch reworks the code to invoke the callback handlers on the
biggest range possible within the memory slot to to reduce the number of
times the handler is called.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Fix build of the board code for orion5x when some parts are configured
as module.
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWOZCvyMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71T0FAKCSnAXO/JTf
qi3kMJf02SqH4zzMvwCfUvomlQrn7uQlmmzy7NkKvDdJgHY=
=gps1
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.11-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.11 (part 1)
Fix build of the board code for orion5x when some parts are configured
as module.
* tag 'mvebu-fixes-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM: orion5x: only call into phylib when available
Signed-off-by: Olof Johansson <olof@lixom.net>
Two fixes for the recent A33 cpufreq support, and one to fix a missing
register in the A64 USB PHY node.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5e/6AAoJEBx+YmzsjxAgzZcQALIDcB8ZnbHib3NjHJUFYqLI
k2P32R93xCf1hiUhvhMB97dZNgOXqx4nyO2OabrUr9K++6ZNt7p+lIp1lnmNWnG1
Ali6xu02UHLGHlBjqePYc5FbNbpIOa+0TkiOYvqo6CmLycsjvcbb5Ia3dAILyR/K
NgkdGcsHV96EH4gPNzqchtaqBL/cTidHUZiIZv9Zg5zaSerRYG078VPSQ/qcA/sx
ji/JWta/hAGHpignUzXM9dkaw2a11LEOh7YWU78WPAjRZbidgo7d3Tw7wuvE5+hd
bUVG+T91Im3QEvOixaduw8gZ7R5345gQP2OFnm7eRRXnbQEx242z7lRnRwD/xor+
IHYDj+Psbspeaw1oR3KrVk76neCAOHnb9O8pIXu5eHrMwB34kgUNkRx/0wuvRzu8
fkwPtn403hzJdZa81OUGw3x8x1SndXgWPg2ez7z7Y2HjBF3U1585TvckWNrh+Xib
2dT2PLY7GKwCehAR/dAr/RY4jT95nZC6nfDTRkCchv4HOnSOTLr5W2jlhuwhmuMi
mcbIYhJrWRMZfe+3mg983g5DL4Z6k3lnn+Wv6AInk1TrP4TVsmgdmuCcyx116AsY
ikCtk2SMG6QYUiy2XV5mKokaf+ex2ms0qvEJQestx3yXtU3IXOuI2qqdbTPb8XQS
XsyqK7bEgpmLUe1y3W+z
=lFNZ
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.11, bis
Two fixes for the recent A33 cpufreq support, and one to fix a missing
register in the A64 USB PHY node.
* tag 'sunxi-fixes-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: add pmu0 regs for USB PHY
ARM: sun8i: a33: add operating-points-v2 property to all nodes
ARM: sun8i: a33: remove highest OPP to fix CPU crashes
Signed-off-by: Olof Johansson <olof@lixom.net>
Its value has never changed; we might as well make it part of the ABI instead
of using the return value of KVM_CHECK_EXTENSION(KVM_CAP_COALESCED_MMIO).
Because PPC does not always make MMIO available, the code has to be made
dependent on CONFIG_KVM_MMIO rather than KVM_COALESCED_MMIO_PAGE_OFFSET.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Remove code from architecture files that can be moved to virt/kvm, since there
is already common code for coalesced MMIO.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
[Removed a pointless 'break' after 'return'.]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
The clocksource and the sched_clock provided by the arm_global_timer
are quite unstable because their rates depend on the cpu frequency.
On the other side, the arm_global_timer has a higher rating than the
rockchip_timer, it will be selected by default by the time framework
while we want to use the stable rockchip clocksource.
Let's disable the arm_global_timer in order to have the rockchip
clocksource selected by default.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
The patch add two timers to all rk3188 based boards.
The first timer is from alive subsystem and it act as a backup
for the local timers at sleep time. It act the same as other
SoC rockchip timers already present in kernel.
The second timer is from CPU subsystem and act as replacement
for the arm-global-timer clocksource and sched clock. It run
at stable frequency 24MHz.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Property set to '"rockchip,rk3228-timer", "rockchip,rk3288-timer"'
to match devicetree bindings.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Suggested-by: Heiko Stübner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This moves the ICST clock divider helper library from
arch/arm/common to drivers/clk/versatile so it is maintained
with the other clock drivers.
We keep the structure as a helper library intact and do not
fuse it with the clk-icst.c Versatile ICST clock driver: there
may be other users out there that need to use this library for
their clocking, and then it will be helpful to keep the
library contained. (The icst.[c|h] files could just be moved
to drivers/clk/lib or a similar location to share the library.)
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All the Versatile platforms (Integrator, Versatile, RealView
Versatile Express) have been migrated to use the drivers/clk
subsystem. Clean out this header that is not referenced
anywhere anymore.
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Moxa Art interrupt controller is very very likely just an instance
of the Faraday FTINTC010 interrupt controller from Faraday Technology.
An indication would be its close association with the FA526 ARM core
and the fact that the register layout is the same.
The implementation in irq-moxart.c can probably be right off replaced
with the irq-ftintc010.c driver by adding a compatible string, selecting
this irqchip from the machine and run.
As a bonus we have an irqchip driver supporting high/low and
rising/falling edges for the Moxa Art, and shared code with the Gemini
platform.
Acked-by: Olof Johansson <olof@lixom.net>
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
- LPC Host Controller
- Pulse Width Modulation and Tachometer
- Analog to Digital converter
These three new drivers for the Aspeed SoCs will appear in 4.12. This
defconfig is based on next-20170406.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Developers can develop and users can test with this config against an
OpenBMC userspace. It turns off debugging features to ensure network
performance is high.
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Romulus has a RS-232 connection on the back of chassis, add UART1 to use
this connection.
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The string was changed when upstreaming the driver. Put the correct
string for generation 4 and 5 systems, as well as fix the reg length for
ast2500 systems.
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
All chips on OpenPOWER platforms support the fastread SPI command.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Romulus systems have one MX25L25635 (32768 Kbytes) flash module for
the BMC firmware and other MT25QL512A (65536 Kbytes) for the host.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
We do not yet have a clk driver upstream. So that users can boot the
unmodified upstream kernel, add fixed-clock and clock-frequency
properties to all of the clocks.
The values are taken from the Palmetto system. This is the only upstream
dts. It also happens to match all of the systems seen so far.
Acked-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
We do not yet have a clk driver upstream. So that users can boot the
unmodified upstream kernel, add fixed-clock and clock-frequency
properties to all of the clocks.
The values are taken from the ast2500evb. This is the only upstream dts.
It also happens to match all of the systems I have seen so far.
Acked-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This reverts commit 769907ae6e.
This change caused issues with people using USB gadget for serial
consoles. In addition, with the other USB changes coming in, it
makes sense to revert this patch and apply the new set as it
becomes ready.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add basic support for the PCM-947 carrier board, a RK3288 based development
board made by PHYTEC. This board works in a combination with
the phyCORE-RK3288 System on Module.
Following interfaces and devices are available on the PCM-947 carrier board:
- 2x UART
- micro SDMMC
- USB host and USB otg
- USB 3503 HSIC hub
- Ethernet
- 2nd alternative KSZ9031 ethernet phy
- Display connectors: PHYTEC LVDS, DDG LVDS, parallel signals, HDMI
- Parallel Camera CIF
- SGTL5000-32QFN audio codec
- 4x LEDs connected via PCA9533
- 2 user buttons
- Expansion connectors for WiFi and other modules
- RTC RV-4162-C7
- Resistive touch STMPE811
- EEPROM M24C32
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
The module can be connected to different carrier boards.
It can be also equipped with different RAM, SPI flash and eMMC variants.
The Rapid Development Kit option is using the following setup:
- 1 GB DDR3 RAM (2 Banks)
- 1x 4 KB EEPROM
- DP83867 Gigabit Ethernet PHY
- 16 MB SPI Flash
- 4 GB eMMC Flash
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero and enable the realtime clock.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
gpiod API allows standard way of specifying GPIO polarity and takes it into
account when reading or setting GPIO state. It also allows us to switch to
common way of obtaining GPIO descriptor and away form legacy platform data.
Reviewed-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Instead of keying interrupt trigger off GPIO polarity, let's rely on
platform code to set it up properly for us.
Reviewed-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Commit a4ee7e18d8 ("ARM: dts: armada: Add default trigger for sata
led") adds the default trigger to individual boards, move it to
armada-385-linksys.dtsi which effectively enables the definition for
the WRT1900ACS (Shelby) as well as for future boards.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fixes include:
- Fix a problem with GICv3 userspace save/restore
- Clarify GICv2 userspace save/restore ABI
- Be more careful in clearing GIC LRs
- Add missing synchronization primitive to our MMU handling code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJY5MItAAoJEEtpOizt6ddy4mUH/1Z2rt2mUAYFQpWD/vy9WMxf
zJKMtcLlZZGjeU78zFfWuOxEo1bbDO+tOTV1docNnY8xjyszCZ5XKOqMeo2a7Vfh
1QYHxJTOmgxcRmMsOnJpqUXhhYm9hDxrbU88U/wvoNllLjWBea01ZXiJbWFPBssT
jrdtcCVstDGp3x3D91RgYNNzj9jNw80RBekACZZwYokDRpBZyUb8DYKfUgABFEKT
UPiHrxb8UOVqvbCuXMBNzhUZcuMoAh3oY02R9sV7u1QOXAJYfRV4fOV12fIcYbHf
tnyU8cCxEkSI1pHrpVG6SStcMt8yznQ+UPo0okQNBJXim2yI8+QKHtQlvx7Tjo8=
=tPDd
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-v4.11-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm
From: Christoffer Dall <cdall@linaro.org>
KVM/ARM Fixes for v4.11-rc6
Fixes include:
- Fix a problem with GICv3 userspace save/restore
- Clarify GICv2 userspace save/restore ABI
- Be more careful in clearing GIC LRs
- Add missing synchronization primitive to our MMU handling code
Add STM32 crypto support in stm32_defconfig file.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add CRC (CRC32 crypto) support to stm32f746.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx
SinA33 has its cpu-supply property set in the cpu DT node.
Therefore, CPUfreq knows how to handle the regulator in charge of the
CPU and can adjust its voltage to match the OPP.
Add these two CPU frequencies to the CPU OPP table of the Sinlinx
SinA33.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds GPU thermal throttling for the Allwinner A33.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds the DT node for the thermal sensor present in the Allwinner
A33 GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On arm64, we have made some changes over the past year to the way the
kernel itself is allocated and to how it deals with the initrd and FDT.
This patch brings the allocation logic in the EFI stub in line with that,
which is necessary because the introduction of KASLR has created the
possibility for the initrd to be allocated in a place where the kernel
may not be able to map it. (This is mostly a theoretical scenario, since
it only affects systems where the physical memory footprint exceeds the
size of the linear mapping.)
Since we know the kernel itself will be covered by the linear mapping,
choose a suitably sized window (i.e., based on the size of the linear
region) covering the kernel when allocating memory for the initrd.
The FDT may be anywhere in memory on arm64 now that we map it via the
fixmap, so we can lift the address restriction there completely.
Tested-by: Richard Ruigrok <rruigrok@codeaurora.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20170404160245.27812-4-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@01c29c00
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
ps20: ps2@01c2a000
ps21: ps2@01c2a400
to
uart7: serial@01c29c00
ps20: ps2@01c2a000
ps21: ps2@01c2a400
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the RTC clocks to device tree. The frequencies must be fixed values
according to the hardware manual.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The X2 crystal oscillator on the Koelsch development board provides a
74.25 MHz clock, not a 148.5 MHz clock.
Fixes: cd21cb46e1 ("ARM: shmobile: koelsch: Add DU external pixel clocks to DT")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
I disabled SRAM and GPMC originally when seeing errors with
omap_barriers_init(). But that is no longer happening probably
because the memory range is now properly configured to 1021 MB
instead of 1024 MB. So let's enable SRAM and GPMC so we get
omap_barriers_init() working and can idle the GPMC.
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CPCAP PMIC interrupt is level high sensitive despite it being
requested as edge high triggered in the Motorola Linux kernel.
Note that also the related driver change is needed posted as
"mfd: cpcap: Fix interrupt to use level interrupt".
Fixes: 56e1d40d3b ("mfd: cpcap: Add minimal support")
Cc: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
K2G will use a different power domain driver than the rest of the
keystone family in order to make use of the TI SCI protocol so prevent
the standard keystone pm_domain code from registering itself in
preparation for a new driver.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Introduce a ti_sci_pm_domains driver to act as a generic pm domain
provider to allow each device to attach and associate it's ti-sci-id so
that it can be controlled through the TI SCI protocol.
This driver implements a simple genpd where each device node has a
phandle to the power domain node and also must provide an index which
represents the ID to be passed with TI SCI representing the device using
a single phandle cell. The driver manually parses the phandle to get the
cell value. Through this interface the genpd dev_ops start and stop
hooks will use TI SCI to turn on and off each device as determined by
pm_runtime usage.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
DP83848_PHY i.e. [TI TLK10X 10/100 Mbps PHY] is used on the
am335x-icev2 board. Enable the PHY driver for it.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the 2 ethernet ports as CPSW ports in dual-mac mode
Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: use AM33XX_IOPAD()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM571x IDK and the AM572x IDK use CAN1 interface.
This patch enables it for both boards.
Tested on AM572x IDK using cansequence.
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
[nsekhar@ti.com: move to use DRA7XX_CORE_IOPAD())
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Starting from commit 5de85b9d57 ("PM / runtime: Re-init runtime PM
states at probe error and driver unbind") pm_runtime core now changes
device runtime_status back to after RPM_SUSPENDED after a probe defer.
Certain OMAP devices make use of "ti,no-idle-on-init" flag which causes
omap_device_enable to be called during the BUS_NOTIFY_ADD_DEVICE event
during probe, along with pm_runtime_set_active.
This call to pm_runtime_set_active typically will prevent a call to
pm_runtime_get in a driver probe function from re-enabling the
omap_device. However, in the case of a probe defer that happens before
the driver probe function is able to run, such as a missing pinctrl
states defer, pm_runtime_reinit will set the device as RPM_SUSPENDED and
then once driver probe is actually able to run, pm_runtime_get will see
the device as suspended and call through to the omap_device layer,
attempting to enable the already enabled omap_device and causing errors
like this:
omap-gpmc 50000000.gpmc: omap_device: omap_device_enable() called from
invalid state 1
omap-gpmc 50000000.gpmc: use pm_runtime_put_sync_suspend() in driver?
We can avoid this error by making sure the pm_runtime status of a device
matches the omap_device state before a probe attempt. By extending the
omap_device bus notifier to act on the BUS_NOTIFY_BIND_DRIVER event we
can check if a device is enabled in omap_device but with a pm_runtime
status of RPM_SUSPENDED and once again mark the device as RPM_ACTIVE to
avoid a second incorrect call to omap_device_enable.
Fixes: 5de85b9d57 ("PM / runtime: Re-init runtime PM states at probe
error and driver unbind")
Tested-by: Franklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now we have driver for the PRCM CCU, switch to use it instead of
old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi .
The mux 3 of R_CCU is still the internal oscillator, which is said to be
16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my two
H3 boards and one H5 board.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 SoC has an on-board CAN controller. This patch adds
the pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 SoC has an on-board CAN controller.
This patch adds the device node.
The CAN controller is inherited from the A10 SoC and uses the same driver.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 SoC has an on-board CAN controller. This patch adds the
pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 SoC has an on-board CAN controller.
This patch adds the device node.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJY4ZYkAAoJEHm+PkMAQRiGsq4H/R4PMXDoe2XhSSk7IoT97pXV
/A8np/scAPjzEgYUidbb54OSqWwsPRuPGWONTFeSrE2u0L4wln/REI91jg7QetLq
IisncExlYeJ/XQ+iO0ZZh9fLbqwIlEJFdSXmyIFr3m/TBxe8a61C8j93oNgM1tHT
yuwzlq7c3sLq2hsmUG2HyL2kJsEfRasv4Rk0yhFuti12zVsBoTW4qmZuMauq+gdf
f7cSYgiHhPTdb2o+azg5O7uYNHaQQBxdUMlIuhhYtVOUq+pFDO23SLHSFIW2NwOm
Zn5R6CFSrLsCw0Bx0v8Xlc151QUbaRK4h9lhUhkBr6d3uNShU1NQ9JojpSvYwBo=
=vP6E
-----END PGP SIGNATURE-----
Merge tag 'v4.11-rc5' into patchwork
Linux 4.11-rc5
* tag 'v4.11-rc5': (1168 commits)
Linux 4.11-rc5
tty: pl011: fix earlycon work-around for QDF2400 erratum 44
kasan: do not sanitize kexec purgatory
drivers/rapidio/devices/tsi721.c: make module parameter variable name unique
mm/hugetlb.c: don't call region_abort if region_chg fails
kasan: report only the first error by default
hugetlbfs: initialize shared policy as part of inode allocation
mm: fix section name for .data..ro_after_init
mm, hugetlb: use pte_present() instead of pmd_present() in follow_huge_pmd()
mm: workingset: fix premature shadow node shrinking with cgroups
mm: rmap: fix huge file mmap accounting in the memcg stats
mm: move mm_percpu_wq initialization earlier
mm: migrate: fix remove_migration_pte() for ksm pages
nfs: flexfiles: fix kernel OOPS if MDS returns unsupported DS type
NFSv4.1 fix infinite loop on IO BAD_STATEID error
serial: 8250_EXAR: fix duplicate Kconfig text and add missing help text
tty/serial: atmel: fix TX path in atmel_console_write()
tty/serial: atmel: fix race condition (TX+DMA)
serial: mxs-auart: Fix baudrate calculation
irqchip/mips-gic: Fix Local compare interrupt
...
The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into drivers/soc/tegra.
By moving the flowctrl driver, tegra_flowctrl_init() is now called by
via an early initcall and to prevent this function from attempting to
mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()'
is also added.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra flowctrl.h header is included unnecessarily by the Tegra
sleep.S source file. Remove this unnecessary inclusion.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The problem described in commit 6befda9a27 ("ARM: i.MX53: globally
disable supervisor protect") for the i.MX53 platform applies to i.MX25
as well.
E.g. CSPI1+SDMA and SSI1+SDMA are not working with the default AIPS
configuration. Modifiy the AIPS configuration to allow access to the bus
by SDMA and peripherals.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We currently have some code to clear the list registers on GICv3, but we
never call this code, because the caller got nuked when removing the old
vgic. We also used to have a similar GICv2 part, but that got lost in
the process too.
Let's reintroduce the logic for GICv2 and call the logic when we
initialize the use of hypervisors on the CPU, for example when first
loading KVM or when exiting a low power state.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
In kvm_free_stage2_pgd() we don't hold the kvm->mmu_lock while calling
unmap_stage2_range() on the entire memory range for the guest. This could
cause problems with other callers (e.g, munmap on a memslot) trying to
unmap a range. And since we have to unmap the entire Guest memory range
holding a spinlock, make sure we yield the lock if necessary, after we
unmap each PUD range.
Fixes: commit d5d8184d35 ("KVM: ARM: Memory virtualization setup")
Cc: stable@vger.kernel.org # v3.10+
Cc: Paolo Bonzini <pbonzin@redhat.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[ Avoid vCPU starvation and lockup detector warnings ]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Instead of expecting that GPIO is always interrupt source, let's use
interrupt specified in I2C client.
Reviewed-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The Cubietruck has an AXP209 PMIC and can be power-supplied by ACIN via
the CHG-IN pin or by USB.
This enables the ACIN and the USB power supply subnode in the DT.
Signed-off-by: Alexander Syring <alex@asyring.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider,
and link the first CPU node to it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: 072d326542 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: ee9141522d ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: bcde372254 ("ARM: shmobile: r8a7790: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes: 969244f9c7 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables USB HS working in FS mode on stm32f429-disco
with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch enables USB FS on stm32f469-disco with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch adds the USB pins and nodes for USB FS core.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
The kbuild test robot reported this build failure on a number
of architectures:
> make.cross ARCH=arm
> lib/lib.a(bug.o): In function `find_bug':
> >> lib/bug.c:135: undefined reference to `__start___bug_table'
> >> lib/bug.c:135: undefined reference to `__stop___bug_table'
Caused by:
19d436268d ("debug: Add _ONCE() logic to report_bug()")
Which moved the BUG_TABLE from RO_DATA_SECTION() to RW_DATA_SECTION(),
but a number of architectures don't use RW_DATA_SECTION(), so they
ended up with no __bug_table[] ...
Ideally all those would use RW_DATA_SECTION() in their linker scripts,
but that's for another day.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kbuild test robot <fengguang.wu@intel.com>
Cc: kbuild-all@01.org
Cc: tipbuild@zytor.com
Link: http://lkml.kernel.org/r/20170330154927.o6qmgfp4bdhrajbm@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Update the Alpine clock-frequency values with valid default values. The
bootloader can still update these values if needed, but at least we can
boot if it does not.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Cosmetic cleanup to have consistent node definitions. Add a space before
the node units which do not have one.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
At this time, most of changes are for ASoC, while we got one fix for
yet another race of ALSA sequencer core and a usual HD-audio quirk.
The ASoC changes are mostly small and device-specific fixes. A
slightly large volume is seen in sun8i-codec, which is a new code in
4.11, and we'd like to fix user-visible stuff before the official 4.1
release.
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEECxfAB4MH3rD5mfB6bDGAVD0pKaQFAljeLGMOHHRpd2FpQHN1
c2UuZGUACgkQbDGAVD0pKaSqhhAArkaOfZ/5Dz+ejvjhvYO/usH0eTEmi6KaE/Ra
5Vl7WrnixcpXvIu6MwDJCcgCMuayJ83K3GC3PoER9FPXSJJAiowzmDRRuTfUzyQP
JzgR9DPuRrbk+ErOn/gK1P1PHVQjMXB5U+L67oV+FTbcqdATQGVQqDqaQH+jX9MD
ymMzrd0hR6gFbxKFCO5Pg+BQIyIo7ZzrD8hYHsvFKA5i/NIxQFHvnae2NzBytn8Q
NnXbBN6Cnf3h6M/+oYnW5FQ4Ik6jhH4iuXe2XrGY03NoN5t2eXe1247bK3ty/9i+
OCBwuFDadOnfkABr0xDMZGaCrbdMdUlh78SLEapszcuTvNrnW3zbul9WXIrDO/tn
MfRJwfAcoc7FzhmrFSGlicNAqUFMU5HkO7atQyu/FafN3Q5vUhV1+yVZKZsXbJm/
pOxOSdt2PCQeA8WZhT5GoP8uPTyu+EW4wU93Gy1Fj1YjmkYh65kmDQRCHTZu6l7u
T/hZtBrQDkalExxGVGkrIG6P3Fi+g/ztBIM70XkxAIVLclKOru+ghwNt0ru0ltOb
ayr01QdLlSAx1MCvHnWvQmNIyPvKJKAOz8geBtY0fEXdrivnYv9nSXbXyq+SXYfk
4sTDbgo9+VUHv8LO3K/BDUqcpaES4bgHIFbS7IO3hqL7t6xdR5+QtwDr+GAJV27e
P5NHP4s=
=qutY
-----END PGP SIGNATURE-----
Merge tag 'sound-4.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"At this time, most of changes are for ASoC, while we got one fix for
yet another race of ALSA sequencer core and a usual HD-audio quirk.
The ASoC changes are mostly small and device-specific fixes. A
slightly large volume is seen in sun8i-codec, which is a new code in
4.11, and we'd like to fix user-visible stuff before the official 4.1
release"
* tag 'sound-4.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (27 commits)
ALSA: hda - fix a problem for lineout on a Dell AIO machine
ASoC: simple-card: fix simple_dai clk lookup
ASoC: STI: Fix reader substream pointer set
ALSA: seq: Fix race during FIFO resize
ARM: dts: sun8i: Update audio-routing with renamed widgets
ASoC: sun8i-codec: Convert to use SND_SOC_DAPM_AIF_IN
ASoC: sun8i-codec: Fix space on audio-routing widget
ASoC: sun8i-codec: Update mixer to use SOC_DAPM_DOUBLE
ASoC: sun8i-codec: Remove analog "HP" widget
ASoC: rt5665: fix wrong shift rt5665_if2_1_adc_in_enum
ASoC: rt5665: fix define of RT5665_HP_DRIVER_5X
ASoC: rcar: dma: remove unnecessary "volatile"
ASoC: rcar: clear DE bit only in PDMACHCR when it stops
ASoC: rsnd: fix sound route path when using SRC6/SRC9
ASoC: don't dereference NULL pcm_{new,free}
ASoC: rt5665: CLKDET is also a power of ASRC
ASoC: rt5665: Vref3 is necessary for Mono Amp
ASoC: rt5665: increase LDO level
ASoC: rt5665: fix getting wrong work handler container
ASoC: atmel-classd: fix audio clock rate
...
Add a missing bracket at the end of Anti's email
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Merge at91_pm_set_standby() in at91_dt_ramc as this is the only callsite.
That moves it to the init section.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The PM initialization is now identical for all at91sam9. Merge the
functions.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The USB clocks mask (uhp_udp_mask) depends on the pmc. Tie it to the pmc id
instead of the SoC.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Instead of relying on the SoC type to select the memory controller type,
use the device tree ids as they are parsed anyway.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
As already explained for pm_suspend.S, the DDRSDR controller fails to put
LPDDR1 memories in self-refresh. Force the controller to think it has DDR2
memories during the self-refresh period, as the DDR2 self-refresh spec is
equivalent to LPDDR1, and is correctly implemented in the controller.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Since 2008, AT91_MC_SDRAMC_LPR is set to 0 at kernel initialization. There
is no use saving, changing and restoring it.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The number of register we can safely pass to at91_pm_suspend_in_sram is
limited. Instead, pass the address to the at91_pm_data structure.
The offsets are automatically generated to avoid hardcoding them.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Instead of having separate global variables to hold IP addresses, move them
to struct at91_pm_data.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Those macros are only used in pm.c, move them there so we can remove the
test on __ASSEMBLY__.
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
These cause warnings in linux-next, as the symbols have become 'bool' there:
arch/arm/configs/multi_v7_defconfig:600:warning: symbol value 'm' invalid for ROCKCHIP_INNO_HDMI
arch/arm/configs/multi_v7_defconfig:599:warning: symbol value 'm' invalid for ROCKCHIP_DW_MIPI_DSI
arch/arm/configs/multi_v7_defconfig:598:warning: symbol value 'm' invalid for ROCKCHIP_DW_HDMI
arch/arm/configs/multi_v7_defconfig:597:warning: symbol value 'm' invalid for ROCKCHIP_ANALOGIX_DP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There was a little conflict between the v4.11 bugfixes and the new changes for 4.12,
this merges the fixes into the 4.12 branch to avoid having to resolve it again.
* Broadcom fixes in mainline
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlja1soRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPS9hAAsFKL0gkbNG+u0P12y73IShSgt0Xhffmq
ChwdxMsRrPi5IJEOyPjcn3/HzWibBb/v+do1LIIM9i8Q+PchX+6DgssTYZEq5CAZ
szMvwNfqrT2AmV2iwM4u6xOaM+hAY9RoAtYikQpJ8Wm6vH9Dgy1Ve4ge2NmKna6P
0wnRJHIBJOzfGq4cP75QXqy2m/LJ4wwmP8pVzVa/9l/XtFlrsNT7n/kQ203PgYtR
k/nkr/Z3XEyY/nCaKosUbHS6o+CCMcxpdF2RjWcrlqvHg4xdm8eB+ilJh3be0eWH
7NMakynGXuqiI5lCqLeOpkBftD/kqSTojYuSY11nOhT+hHtoRe+KbOWYTf5UK7vb
rGXERxoZYm0WVtePDPAb+cyc7XdPTmqkXMJwCBKfomcndgcSQJqYgeUv380+5blF
76rhOq3xiKEDOPly8tjDS+4saZ+zEHj6dINhu+Lv56uQJCm0Y7o0j/RO4KMmZYAv
Ht71lOM7xNEAhw/Opk03A1ERkQNDuK1lmjW4M5hmHDskboB0RLOnGBLDDvWBIH/Q
H129hbDyEjEgMqgTuZi3cEt83jvQ0clzwjnmDDBW9O/nk1OpUHzPD4MMELNo+hBR
g1BOKjAQ6nwN3yV9i+eyiY+nk822Hu1L5CpXXDrP0XZlVOhGFbSS+6/uCztfBhcl
p7uZtAidu68=
=CRcK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren:
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
* tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits)
ARM: dts: am335x-baltos: add LED support
ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator
ARM: dts: OMAP4460: Thermal: Add slope and offset values
ARM: dts: OMAP443x: Thermal: Add slope and offset values
ARM: dts: OMAP5: Thermal: Add slope and offset values
ARM: dts: DRA7: Thermal: Add slope and offset values
ARM: dts: omap3: Add cpu_thermal zone
ARM: dts: am437x-gp-evm: Add pinmux for uart0
ARM: dts: am335x-icev2: Add SPI based NOR
Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes
ARM: dts: dra7: Add updated operating-points-v2 table for cpu
ARM: dts: am4372: Update operating-points-v2 table for cpu
ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
ARM: dts: dm8168-evm: add SATA node
ARM: dts: dm8168-evm: add the external reference clock for SATA
ARM: dts: N9/N950: add bluetooth
ARM: dts: N900: Add bluetooth
ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed
ARM: dts: motorola-cpcap-mapphone: add LEDs
...
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAljY6NUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgTORB/49/3AhQ9neAjN5igVGMxv2PX5OPkYz07wJ
AgPPyUDBchXIU2teAuPzv/T9rS0wAJR58qLL7JiYjYz+II/XE3qWJUjiT5p5mjsp
ko4ijesWraf5C7z2ltL0T25lIyZwkjCJgjMzIxLMOsDgF4nN1yBxYh18CXXyc3sL
G3GYVGwEAhM9EwFjzrpyL7guFe2ZiKAZ7QmVeLmsDT9goECgz1XebuM+3idbOwJB
JjhmOmiSuUAHZO6o3soOZiDzb6xD9MELp/5a6MAoyoBWfnzHFtvsGwD/npDBEFB8
7JP9z4tc+LgKlIjg3QWUU52FVm1vEKA8p7jMNLpZmlMkc7pNPjLf
=oPg4
-----END PGP SIGNATURE-----
Merge tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner:
Contains one new board, the Tinkerboard from Asus based on the rk3288,
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
* tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188
ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs
ARM: dts: rockchip: add rk322x dw-mmc resets
ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets
ARM: dts: rockchip: add rk3036 dw-mmc resets
ARM: dts: rockchip: add rk3288 dw-mmc resets
ARM: dts: rockchip: add dts for RK3288-Tinker board
dt-bindings: add rk3288-based Asus Tinker board
ARM: dts: rockchip: fix the MiQi board's LED definition
ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJY2WqsAAoJEEEQszewGV1zLDwP/jEiGTQwVdZZJO1/NfLlE4fv
yXsA9Uu1BxB+n0XvcXL1+kSR3Bpn7ozl6cqPBvoaVYinafrPfQKJOn48Lmeory8x
pswzdnG4vEiRka7z1WZjr9eAOIMeloYkl6KSkH+kJxQpJx5kHAehAeTPNJ5dwY2w
WuKbVP2Fjgc6wtqVANGneeKGln1sdYHe5VoPov4SS4L/sWANUW2Zjdl9onnzJYHX
NkEq5XwEafYcPOmbC1b8GgeU/UHLmkk1njfIHLlPwjcTqYaKZHa7C5TT2Uy459AO
bgVE30StqzXIQBQGzIjN0CcJJabWYaF1RyI5qaoxWcGIATcZq2BmCAZpM6naMFvx
EiHE/nAYoqpcGnfy8vOtqufVhi9Qpk3eGUqkcQoTClgPkiFdMVs60IbBAD38qOF6
msOqj1l94YPimt3YdLRtZXq5vkw/446MrbLUdyJQ62N4xTZNkE+V0AHmmSJIDLKc
1uaER+Wl+l7jQ2g5e2CobZEuVOsoFPc14xS0hsr5J4sA6DWU0LzUCEfUuiTuTBEB
17ciL66LGCTvlz9ViHbdSg56ReRq+eCOQD5cSElF3UoWlMXPaC5bc9LYrj/vybO9
8RyCz+FW0Aai8sdLDDIlUuj2wM9B8uBAyM0yStXfy6RR60rjdJOo5M0fow177H9l
Xq3vEH59C5Fl9SrA5JOR
=AkSm
-----END PGP SIGNATURE-----
Merge tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij:
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
* tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add PCI to the Gemini device trees
ARM: dts: augment Gemini GPIO nodes
ARM: dts: add power controller to the Gemini DTS
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY1VzSAAoJEIfQlpxEBwcEI+EQALcm2qF0IP/y3xYB4kmNBf3b
Xnb81oMhMcfFHj6CSQDdSObj8lv9FU4RoktosNtqYUTgvZUGsf/5GqWcwoYekH7W
+1yrHdX9Cjx9B8A5FyQDIRyYZVbQ3yON0MhEo7X9gIPbi03uAdsIEOW4v+5DbRat
X1aPhy0NkybhpDKzSudFejvIIM0IdjhhnUuBg3JtBC1mAMX0cnh+/lzxdxFXRMlV
YvHGi3KYSGR4hEYnAlyHlFJsuTHYNN9rHKO0QyMTMGF2GyrLUuo9kO68kxmRzxEU
LEcDFG/6oPQlzmc/KRIQHWjW+jBRvTn6n3cqwBHbwJc4P0S+f7b0UlG/uEwsfeD/
jf8vIMFTa/IOgP4cabnDms8NW+x5Dl4ppizB5WB/3lFG09iSFJNNHBHnFLPF/N7A
aw70ui47SbPbNxstAenHd/yJrkkNleitr1YQTQLLORof9+h0bePgxphM0AKgBrFU
fEiC916fDkuyIj7+Qq2TUUiJnhfUA1bT6Vav+L3Hc4mWMS+xDuOLYIZv+Isf1eam
duOQ3ECHHqP9VXf2qug4xwsAHalu3FTZT+FJEgJsFJ47mUnA4v7ySN0//Ta1crX3
4P2Stt/0x0Ai/8Gx4DhqAI7CsIsRpb9FJ0KOUJTad/AlO5NAQvvzQoDjvVUQR7Km
wIZiU2hq+PrtjLlc7bot
=VFXn
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree updates for
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
* tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux: (27 commits)
ARM: dts: bcm: fix msi-controller name and unit address
ARM: dts: BCM53573: Specify serial console parameters
ARM: dts: BCM5301X: Specify serial console params in dtsi files
ARM: dts: NSP: Add crypto (SPU) to dtsi
ARM: dts: NSP: Add mailbox (PDC) to NSP
ARM: dts: BCM953012HR: Add ethernet aliases
ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2
ARM: dts: NSP: disable i2c DT entry by default
ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree
ARM: dts: BCM5301X: Add I2C support to the DT
ARM: dts: BCM5301X: Add TWD WD Support to DT
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: bcm2835: add sdhost controller to devicetree
ARM: dts: bcm283x: Add HDMI audio related properties
ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys
ARM: dts: BCM5301X: Relicense DTS files I created to the ISC
ARM: dts: bcm2835: Add the DSI module nodes and clocks.
ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED
...
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWNVVVyMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71f1XAJ0WIMcrTJPA
uiYAEbN2f+InledW9wCeOD5+hJTSEFFznZSfbzN4Morh0tw=
=+cen
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.12 (part 1)" from Gregory CLEMENT:
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
* tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: linksys: enable buffer manager support
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
ARM: dts: mvebu: Move mv98dx3236 clock bindings
ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236
ARM: dts: armada-xp-98dx3236: combine dfx server nodes
ARM: dts: armada: Add default trigger for sata led
ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x
ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby)
ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS
ARM: dts: armada-38x add node labels
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY0hYtAAoJEGFBu2jqvgRNJzoQAIUrXYqHYaD+ZuvVrtUfK0b2
IG4bd9gQ09s+jVOPdhtiT+FGwTWXFTBValLAABWyjP9YV0SL6JNR0Kn6lXjZk3BD
Kprctk/EpphdmKurSEFRERulws7VOtagx88qUZqDPjootMbUGxFU7yYXzUoD1o/U
VmQfV0jpNuLZ5abRld7Qyar5Oh6w1r58YQtbHNT82Dwkk1NfXNEEL+9WJA6Eqx8L
nQBv4Yep8KuTw5PN3nWIYWQfVuKkRbdSHvnuuaCB0sxQLCQLOLtPhFlf2f9fsBaO
enxfZcKzRuH21E0aRGjQKrtoWGiZqNOoZb2nPYjcEmtgcBeoZJPtp4A9U9AEOUyO
GM9RfiWeszfcgQ9Yi6TiXqFJBVON61LAhe5IGYWGyOHsgzAFRTDqSmQ9aYL0vGzy
Z49OYTHsA22YeSHtXoFRZD9owJAouHL3dIdw97FB4gC9DeqM04+8a8nkFhg14URW
1NlaocDxFUO351OgVS+9W5P1GtvN0mYekMlk2VkS1UQihwBg2Q30RKU4Hvf2EnkH
c3B2DMWAO/lQHSQWxdpdrTzZdIdjjCSe07JoIC1A+8cWg5NOV4AncM+gAwxHRlOu
Sfbyb9dEa+0cFlz/3QGiALbmht2T/4TQFI3kkrwvU3lTFp0CZ/QCn5VpL4uBzOKH
4xZ3qSUCItMDS8xgsjp7
=DFR4
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DT updates for v4.12" from Sekhar Nori:
DaVinci device tree updates to enable
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
* tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: add the output port to the vpif node
ARM: dts: da850-evm: add IO expander node on UI card
ARM: dts: da850: add vpif video display pins
ARM: dts: da850-evm: fix whitespace errors
ARM: da850-lego-ev3: Add device tree node for sound
ARM: da850-lego-ev3: Add device tree node for A/DC
The Moxa ART GPIO is a Faraday FTGPIO010. Augment the DTS node
to indicate both compatible values for the SoC and the IP part.
Also increase the register range to 0x100, it has at least 0x48
bytes of registers, and a few extra will not hurt.
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
please pull the following:
- Gerd enables the BCM2835 MMC driver which yields better performance than the
default one (iProc)
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY1VYTAAoJEIfQlpxEBwcEDFEQALMGsJbpByPosCKn5SNCiXlA
QqQU4TuE2SNC5C/OVDyFeWXbDOa0AEu35Pi/y87vm4k1hfpAyOSqBY9JY/IG0C1p
yd+4Gbi8l1VtY4/4XJntaPmyaJ3Vk0ftL4/La6eTkJPQ/4Z8s79Jses41VQmVzZ/
tuhn7rQ3exFVOOgkpDfrC1mruHrIqx+97ASwea7ONhTfNVUSmdY8MoHJ71YvWms2
ZUIYq0Dmt58dEnE9h5UoWlf29Ib0L4HQ0GCc+CaO7tQ2fE4YpllT4x4p/PiQnR3t
XTE1KaT1aGOGDYzPoDJNjGk3+/I0fJXCuPX3kZis1nbUR9rFKDhNQcVF64YGaNQX
Y3DIvcx7v1zd6eEOt6QzckQgIXmfYSLLsvv/V22ev+H6m/oYPJSnD/5W2uCGbXVu
5UYggVEC7JPhFcprvskOpV10EW4ewzC2XKKxgll21GTqu8Pkt9Qgo65gpz2pVqGa
UAygdt7shFHQ/4ZHaZt2IYaBXDOwIZjp2M9pUp2KzKn2NuvieBR3A2M03vyJIQ04
KqDy4G0Sc6r5Sk6zOYZ7j3zpteqHDENpkuJ1OembnOoF49GO3CCKpyqZ1utKuMSF
UCjFHey4RcS98ZMK/e60WIS4tSr5uk2uOfRpvDGrw3ctbbD0sqZzlnEhCFTXhEwy
iMRCbqgMGUlOCaV2h0gN
=lxDs
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig
Pull "Broadcom defconfig changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs defconfig updates for 4.12,
please pull the following:
- Gerd enables the BCM2835 MMC driver which yields better performance than the
default one (iProc)
* tag 'arm-soc/for-4.12/defconfig' of http://github.com/Broadcom/stblinux:
arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and multi_v7_defconfig
ARM: bcm2835: Enable missing CMA settings for VC4 driver
4.12, please pull the following:
- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
addresses > 32-bit. This is only required when ARM_LPAE is enabled
- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
default.
- Florian adds support for a new 28nm generation chip: 7260 by updating the
runtime detection UART debuggin stub used for DEBUG_LL.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY1VVsAAoJEIfQlpxEBwcEaMkQAKKUiXK0AP/GHTX7WcCxZO6y
TpU1o++HEMVZP7jCfoqeSVB/wWsxRjha4GVaH/9d6xHxJMx8+gBwzok7o7mkbnDc
sjcfZS4aRXjM8J+xPAt0GqN5gde/GP4z83Z5XR1kNFG6Ngdo4gaHRF/R3HanBWJZ
+94K+W3RlBTBsk0NGHAjhOWpG6/a0xwRyt90bh3D/bkSB6xQIhEKvOauQ9MOdOJ2
9X4qHYavty2VcEEsmT9dXZifR5uQ9fkx5Vsv0SujzfLPsPwK1gm8MspQ1wjg74IG
jbxAh6gNJeWJeU5D9MtWIWTYDJSJKpNWjpkrpbRbMn88tmEsp5Pjywk7s0RogKf4
34Nm1xt2d5ktoVP8uI8SjujGRwN4IzmcUEObTa8XiRdjRhKhHSQXGg4eIyagNt4b
pc4HPml28n0COIZOaOHz82SlkRSSk58eyuY/RuRhduNBILpBDpS4H4sZHzLLD5qE
msrcwElTUrIDUeQkEONq14ErqR2wxmN2PF87UBkUd5PsVBnUq8JvHldQVRJzUrrI
ouT6P769HeJWzCcDRiorI2EIyEubVG2pEY3LGSu3W9egJ6qKVb1D+1w2gQLnsB4+
tfxhpaTjG6EIIH29eMl18lAgNCXf7nCaDst/kxVZOSWACEhipCV+Ldke4ji3333j
SJKzQ3fPkfX6W+m79tis
=xKpO
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Kconfig/platform changes for
4.12, please pull the following:
- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
addresses > 32-bit. This is only required when ARM_LPAE is enabled
- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
default.
- Florian adds support for a new 28nm generation chip: 7260 by updating the
runtime detection UART debuggin stub used for DEBUG_LL.
* tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Add entry for 7260
ARM: brcmstb: Enable ARCH_HAS_HOLES_MEMORYMODEL
ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals
Add the new hdmi phandle to exynos4.dtsi. This phandle is needed by the
s5p-cec driver to initialize the CEC notifier framework.
Tested with my Odroid U3.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Wire up the generic support for exposing CPU feature bits via the
modalias in /sys/device/system/cpu. This allows udev to automatically
load modules for things like crypto algorithms that are implemented
using optional instructions.
Since it is non-trivial to transparantly support both HWCAP and HWCAP2
capabilities in the cpu_feature() macro (which allows a module's hwcap
dependency and init routine to be declared using a single invocation of
module_cpu_feature_match()), support only HWCAP2 for now, which covers
the capabilities that are most likely to be useful in this manner.
Module dependencies on HWCAP will need to be declared explicitly via a
MODULE_DEVICE_TABLE(cpu, ...) declaration.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
A relatively large pile of fixes for mainline, the first since the merge
window. The biggest block of changes here by volume is the sun8i-codec
set, the driver was newly added in the merge window but it was realized
that renaming some of the user visible controls was required so these
are being pushed for v4.11 to avoid the original code appearing in a
release. Otherwise it's all fairly standard bugfix stuff.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCAAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAljdNc0THGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0IgMB/9SGwZvXPsI0w2q/f7pP4Q7SntvmywP
o+gyktSaC/nLDpdPkdOBMekzhpkzvEgJsg/07iop/J/qsYSgmRoT+UkGB5KMBYxS
aFse8ya9NavulcuCksINMr+kPrd9bMGzev0Y2v9p6nOAZ0Yhqoi0cK/JNeLH8WBE
amgWI7MbZ3vAR5jviKINw57crXsqeJcH7u1IkFNznhUb5MfzO7MdAby2nYnlFiTs
D7XeA/OV/cffwdsI5fylrD0zCd6DekZImjrv31nGi36DIZ275V4uDiN/XQFel069
cQc4CYLgMWXiXGZaRmxjqPZ/Om14VY6i17VsoriNhU8e5CtQlynOogV/
=k725
-----END PGP SIGNATURE-----
Merge tag 'asoc-fix-v4.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v4.11
A relatively large pile of fixes for mainline, the first since the merge
window. The biggest block of changes here by volume is the sun8i-codec
set, the driver was newly added in the merge window but it was realized
that renaming some of the user visible controls was required so these
are being pushed for v4.11 to avoid the original code appearing in a
release. Otherwise it's all fairly standard bugfix stuff.
Video capture and display on DA850 and
an ADC driver thats used by Lego EV3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY0hU2AAoJEGFBu2jqvgRNuMkP/j8UBLrRD7TkGTPKNUQ+L1mD
lAffnqdwVWf9w21/Loefsw6gpr1F036VTDDzFGixbBWxzH4EG7S6CBGaedK85H8d
+BEhgQzQWaMfcKVeM/xUJoIP6F+s9yvrfMYY0PrUYuiqcNwKBF0dYVjV9hevTAxX
QW0sj28X1ZAtZKxlkLEGxA0YNsDSyoA/CLR3PYxiEg0JsvsS0ZDNByT2WLe6u8mX
PMgjdGDwHGkk22CSl4MXl/Lp9s6LXgIiYFhAV/bmtiHShh791ePErZhVoOnXCboJ
JCC+3CswUSQ4Ub9qt+xhQOr9YUqPIlNVPAkHuu/L5qOuoHNOIIThd1ymcpCGA1CB
oYwlAvZSNp+Yf92f7javhrKNj4aJUDvZ/Odm1yp13Bje4UmoEIL66LIvqd4B9vTZ
hjxyX8eFTmQjE9Vjq70vi71sAu8dp3A7YgG9uzXMk+mHwI9PIGU0dQjXIzPe6/W6
kWMDkZ9ESTLeCKraL69zH22GGfm0+YtnMa7al9buzMIqywGdfDHiw5UqjGFSGTlH
DFn6hoqADxz8F/CIk1MaqJbSpWW5OsvyrC2as0udXcMxiaoGacLeynljcD8X+stX
pz5T7wUM8kP3w24oTYO1h+bWk4QaZyNnUFgoT/JBdGVRDtl/Bp6k61pHmGfusuti
CuKUZb3qinFpyrLzqbVs
=wj14
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.12/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
Pull "DaVinci defconfig updates for v4.12" from Sekhar Nori:
DaVinci defconfig updates for enabling
Video capture and display on DA850 and
an ADC driver thats used by Lego EV3.
* tag 'davinci-for-v4.12/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable TI ADS7950
ARM: davinci_all_defconfig: enable IRQ support for pca953x
ARM: davinci_all_defconfig: enable VPIF display modules
In many of clk_disable() implementations, it is a no-op for a NULL
pointer input, but this is one of the exceptions.
Making it treewide consistent will allow clock consumers to call
clk_disable() without NULL pointer check.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In many of clk_disable() implementations, it is a no-op for a NULL
pointer input, but this is one of the exceptions.
Making it treewide consistent will allow clock consumers to call
clk_disable() without NULL pointer check.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Wan Zongshun <mcuos.com@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
stm32_defconfig is used for several STM32 MCU: STM32F429, STM32F469,
STM32F746 and now STM32H743. Each of MCU listed have different interrupts
number mapped on NVIC. STM32F429: 81, STM32F469: 92, STM32F746: 97 and
STM32H743: 149. I could set CPU_V7M_NUM_IRQ to 149 but in order to avoid
forgetting to update this value for next STM32 MCU I prefer to set it to
max value: 240.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Keep the clearfog DTS file ordered alphabetically - Florian placed the
MDIO entry after pinctrl, which mis-orders the file.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Board code cannot call mdiobus_register_board_info() when phylib
or mdio_device is a loadable module:
arch/arm/plat-orion/common.o: In function `orion_ge00_switch_init':
:(.init.text+0x474): undefined reference to `mdiobus_register_board_info'
I had a number of ideas for how this could be solved, but after the MDIO
code got split out from PHYLIB it has gotten too hard, so I'm basically
giving up, and only call the mdiobus_register_board_info() function
if the MDIO layer is built-in to avoid the link error. This is similar
to how we handle PHY registration on other ARM platforms.
Fixes: 90eff9096c ("net: phy: Allow splitting MDIO bus/device support from PHYs")
Fixes: 648ea01340 ("net: phy: Allow pre-declaration of MDIO devices")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
- Select the poweroff driver so the system can properly shut down.
This driver is merged in the power tree.
- Select the right Faraday GPIO block (we renamed it).
- Do not select SERIAL_OF_PLATFORM that just create Kconfig
warnings on us. We'll put that into the defconfig instead.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJY2WosAAoJEEEQszewGV1zsWcP/0/j6k55yHiGTBU5sXjxQyY3
dCP+S1366nsTFWnobwqdEM0TTtM8Z1k7XNQ2u5/awPoFjdbcS4nrcmf0M1aVOIvt
iPV/lOVwEp+m9fEX70Wns+8lblkLcc96zOV3LMJM29PN+Apru7Vp0ISnWyxAeG3d
7ZnHtDXrAfMM0h+14A1a+qG1SqU4rE5MHWuGj9m2UTqzB6KUtEnPsSeUqqZKLniO
TxoO2Zaa6+G0Xlh9wPLJV/vc2GEfrC/2UsjYxd8D3r3s4Iz3Xn1x1u+jQp4CJLp0
EAytTnoITetKwkxiIKJ1vMPI9danJ2+fY+SazTCJT1p7Y97SoSOQXqtKeTFHxcFz
KXjMPvYo/SMj5t7Sy1FkYjKTASXeFX1EFlInqII0mGzAjosp2gjfB9BsJMUdbU3v
qNuSkZJz9+us3WD9AdfQJKTIoyGXhbdlN1oETcjvGRZvhHAHa99rKdCno+UWy5XA
t2bX9IF2o2qFwIME13+u8c2xTnciyDGApCYcDF4Icaa0HOat0yXB7nOKgzuAYD4e
obbBkN6Zc9sijcK+FE0vq+N4QVaHAAh2U7RF/Kly0GCxFKbXZbccxXAwuWbcIXKP
2LwsxSHRWyizH3OH7ug4SS6EwVZQ/xtqBpmau5qlsn+E0ZWO1AJfxUVDRKoScWYU
eqdNi5fZedcMQFLqvBJe
=g/Tl
-----END PGP SIGNATURE-----
Merge tag 'gemini-multiplat-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/soc
Pull "Gemini multiplatform updates" from Linus Walleij:
- Select the poweroff driver so the system can properly shut down.
This driver is merged in the power tree.
- Select the right Faraday GPIO block (we renamed it).
- Do not select SERIAL_OF_PLATFORM that just create Kconfig
warnings on us. We'll put that into the defconfig instead.
* tag 'gemini-multiplat-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: gemini: don't select SERIAL_OF_PLATFORM
ARM: gemini: select the right GPIO block
ARM: gemini: select gemini poweroff
- Drop PM_SUSPEND_STANDBY
- Clean up hwmod code in preparation to eventually dynamically
allocating hwmod data based on device tree data
- Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent
clockdomain from entering HW_AUTO
- Configure clockdomain and hwmod for dm81xx SATA
- Mark omap_init_rng as __init
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlja0g8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMB+A//VmbKMoDFNOSjYZP7gFKsnYrSzJQUgWvU
vLxI2bKjJvX2oTKaPTMhZdLzmEEVE9RcPec+4X80WgRLbmWdj+o3gkEDygjXJi9Q
ATlS6Qop9r6KEmvL4KsQnNjws0WxFXfASUxiztnJvL9fgH0svII6DpamtXN7iRwz
PmgBPcsOEOlTAnMWYr/zLbTtp6ajWkRiHetdLCgHfSRuKgo6e16OswOo+Fj2HM49
o9OSlSyWmu6jjJSrUWYo6mokexKWkNflV1z1XTgOhfi/LJKWcmlYjqwW+ycXm2h7
/Q8/YSwNXRHEetLsfNQwmvVoV6lsTkeebJ8DHsPbE1V4780TrXNpVhlZXD5OdTYZ
sgX+ubSSSwsT2JIyUFNxXwJqrZy2J7Rt//59ccJb7TtlTRDsDDvJHdSKeo+YVyys
4Cw1prelcK7yR5OFS2FRopUTXsoXtjnVDP6Y/jboPn6oihnI1Mvs0iAecgLwUUN4
jvhjvI1gSHRg/kqG0dJ77TUUyzx8N4+NQOILJJqrxea7YgfmJx4zCJP1q3FpeUVc
b0W/zTyFZKz5b9n28s0aq4ancbGiLMFh4+Vifwbx0NQsD9tajYyP4QhbPtIrwozh
k7GcB+tPoLWPpTA88L2KLXkfgAb6kon76w/CjECDlkygmOo/7k/6ULnBhUxq+Qll
hbHbhxC/30Q=
=736B
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "SoC changes for omaps for v4.12 merge window" from Tony Lindgren:
- Drop PM_SUSPEND_STANDBY
- Clean up hwmod code in preparation to eventually dynamically
allocating hwmod data based on device tree data
- Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent
clockdomain from entering HW_AUTO
- Configure clockdomain and hwmod for dm81xx SATA
- Mark omap_init_rng as __init
* tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: mark omap_init_rng as __init
ARM: OMAP2+: dm81xx: Add clkdm and hwmod for SATA
ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss
ARM: DRA7: hwmod: Fix DCAN1 stuck in transition
ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO
ARM: OMAP2+: omap_hwmod: provide space for more hwmod flags
ARM: OMAP2+: Make hwmod clkdm_name const
ARM: OMAP2+: Remove unused CLOCKACT_TEST_ICLK
ARM: OMAP2+: Use list_for_each_entry for hwmod slave_ports
ARM: OMAP2+: Remove mostly unused hwmod linkspace
ARM: OMAP: PM: Drop useless checks for PM_SUSPEND_STANDBY
Leonard Crestez
Tim Harvey
Martin Kaiser
Stefan Agner
Gary Bisson
Jagan Teki
Vivien Didelot
Lucas Stach
Rob Herring
Uwe Kleine-König
Andrey Smirnov
Peter Senna Tschudin
Marco Franchi
Andrew Lunn
Fabio Estevam
Ken Lin
Alexander Kurz
Peng Fan
Uwe Kleine-König
Michael Heimpold
Tony Lindgren
Linus Torvalds
Christoffer Dall
Alexander Graf
Marc Zyngier
Russell King
Christoffer Dall
Suzuki K Poulose
Olof Johansson
Paolo Bonzini
Alexander Kochetkov
Linus Walleij
Joel Stanley
Rick Altherr
Lei YU
Cédric Le Goater
Andy Gross
Al Viro
Wadim Egorov
Geert Uytterhoeven
Jacopo Mondi
Dmitry Torokhov
Ralph Sennhauser
Radim Krčmář
Fabien DESSENNE
Quentin Schulz
Maxime Ripard
Ard Biesheuvel
Patrick Menschel
Chris Brandt
Dave Gerlach
Roger Quadros
Schuyler Patton
Icenowy Zheng
Mauro Carvalho Chehab
Jon Hunter
Alexander Syring
Bruno Herrera
Peter Zijlstra
Antoine Tenart
Alexandre Belloni
Alexandre TORGUE
M'boumba Cedric Madianga
Arnd Bergmann
Krzysztof Kozlowski
Hans Verkuil
Takashi Iwai
Masahiro Yamada