Commit Graph

13 Commits

Author SHA1 Message Date
Arnd Bergmann 4c811b99b4 ARM: mv78xx0: clean up mach/*.h headers
This is a simple move of all header files that are no longer
included by anything else from the include/mach directory
to the platform directory itself as preparation for
multiplatform support.

The mach/uncompress.h headers are left in place for now,
and are mildly modified to be independent of the other
headers. They will be removed entirely when ARCH_MULTIPLATFORM
gets enabled and they become obsolete.

Rather than updating the path names inside of the comments
of each header, I delete those comments to avoid having to
update them again, should they get moved or copied another
time.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-07 18:17:34 +01:00
Arnd Bergmann 5cdbe5d23a ARM: orion: use SPARSE_IRQ everywhere
As a preparation for multiplatform support, this moves all the
code using plat-orion over to use sparse irq support, which is
enabled implicitly for multiplatform.

In particular, the hardcoded NR_IRQS macro gets replaced with
a machine specific one that is set in the machine descriptor
in order to set up a static mapping for all legacy interrupts.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-07 18:17:07 +01:00
Stephen Warren 6bb27d7349 ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.

Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-12-24 09:36:38 -07:00
Russell King 9635f9cd49 ARM: restart: mv78xx0: use new restart hook
Hook these platforms restart code into the new restart hook rather than
using arch_reset().

Acked-by: Nicolas pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-05 12:57:15 +00:00
Nicolas Pitre 5bc9291adc ARM: mach-mv78xx0: convert boot_params to atag_offset
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-08-21 17:15:00 -04:00
Lennert Buytenhek 4ee1f6b574 ARM: Remove dependency of plat-orion time code on mach directory includes.
This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2011-03-03 16:27:01 -05:00
Nicolas Pitre 6451d7783b arm: remove machine_desc.io_pg_offst and .phys_io
Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-20 00:27:46 -04:00
Riku Voipio 6935994389 [ARM] mv78xx0: wire i2c support
All the pieces were ready, just matter of assembling
them together.

Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-03 21:06:12 -05:00
Lennert Buytenhek f1f5465782 [ARM] mv78xx0: enable eth2/eth3 on the mv78xx0 A0 development board
The A0 revision of the mv78xx0 development board has four ethernet
ports, with PHY IDs 8-11, whereas the Z0 version has two, with PHY
addresses 8-9.  This patch configures the third and fourth ethernet
port to use the PHY addresses on the A0 board to enable use of those
ports -- if we are running on a Z0 board, the ge10/11 setup code in
common.c will force these back to PHYless mode.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2009-02-19 22:43:14 -05:00
Lennert Buytenhek 04185fc67c [ARM] mv78xx0: force link speed/duplex on eth2/eth3
On the mv78xx0 development board, eth2 and eth3 do not have
corresponding PHYs, but are internally connected, as a way of
facilitating communication between the two CPU cores.  Since there are
no PHYs, we need to tell the network driver explicitly to force the
link on eth2 and eth3 up, to 1000 Mb/s full duplex.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-10-19 14:29:05 -04:00
Lennert Buytenhek ac840605f3 mv643xx_eth: remove force_phy_addr field
Currently, there are two different fields in the
mv643xx_eth_platform_data struct that together describe the PHY
address -- one field (phy_addr) has the address of the PHY, but if
that address is zero, a second field (force_phy_addr) needs to be
set to distinguish the actual address zero from a zero due to not
having filled in the PHY address explicitly (which should mean
'use the default PHY address').

If we are a bit smarter about the encoding of the phy_addr field,
we can avoid the need for a second field -- this patch does that.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-09-05 06:33:59 +02:00
Russell King a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00
Stanislav Samsonov 794d15b25d [ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:10 +02:00