Commit Graph

6 Commits

Author SHA1 Message Date
Philipp Zabel 9e9ba091aa reset: ath79: add missing include
The driver uses readl/writel, so it should include linux/io.h.

Acked-by: Aban Bedel <albeu@free.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-25 13:27:23 +02:00
Masahiro Yamada 56865f452a reset: ath79: use devm_reset_controller_register()
Use devm_reset_controller_register() for the reset controller
registration and remove the unregister call from the .remove callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30 09:37:47 +02:00
Philipp Zabel d2f79f223f reset: ath79: Make reset_control_ops const
The ath79_reset_ops structure is never modified. Make it const.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Alban Bedel <albeu@free.fr>
2016-02-10 10:53:34 +01:00
Alban Bedel ba64e27e9d reset: ath79: Add system restart support
Add a system restart handler that use the FULL_CHIP_RESET bit of the
reset controller.

Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-11-25 10:49:58 +01:00
Axel Lin f319cb8491 reset: ath79: Fix missing spin_lock_init
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-09-01 14:48:40 +02:00
Alban Bedel ff591a9122 reset: Add a driver for the reset controller on the AR71XX/AR9XXX
The AR71XX/AR9XXX SoC have a simple reset controller with one bit per
reset line.

Signed-off-by: Alban Bedel <albeu@free.fr>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-08-04 10:41:30 +02:00