Commit Graph

4 Commits

Author SHA1 Message Date
Linus Walleij 43a255dba1 pinctrl/abx500: use direct IRQ defines
Make it harder to do mistakes by introducing the actual
defined ABx500 IRQ number into the IRQ cluster definitions.
Deduct cluster offset from the GPIO offset to make each
cluster coherent.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:48:43 +01:00
Lee Jones a6a16d274e pinctrl/abx500: replace IRQ offsets with table read-in values
The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.

The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:44:33 +01:00
Lee Jones b9fab6e45d pinctrl/abx500: align GPIO cluster boundaries
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:

    GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */

    if (offset >= cluster->start && offset <= cluster->end)
        /* Valid GPIO for IRQ use */

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:40 +01:00
Patrice Chotard a8f96e4178 pinctrl/abx500: add AB8540 sub-driver
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:21 +01:00