Commit Graph

9179 Commits

Author SHA1 Message Date
Atul Dahiya 9bbf4a634a ARM: S3C64XX: Add RTC support for S3C64XX
This patch adds support for RTC for SMDK6410.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:51 +09:00
Atul Dahiya 002d31e6b6 ARM: SAMSUNG: Updates RTC register for support Alarm IRQ and Time Tick.
This patch updates RTC registers for support Alarm IRQ and Time Tick.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Taekgyun Ko <taeggyun.ko@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:51 +09:00
Atul Dahiya 32fc7fb3b9 ARM: S3C64XX: Move RTC clock from init_clocks to init_clocks_disable
RTC clock does not require to be enabled at boot time.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Marek Szyprowski 19206b1742 ARM: SAMSUNG: Add new s3c-sdhci card detection methods for Samsung SoCs
On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected to some of the external interrupt lines or the presence
of the card depends on some other actions (like enabling a power
regulator).

This patch adds all required changes to platform support code, so
another patch, which extends the driver with support for the new card
detection methods can be applied.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title and coding-style fixes]
[kgene.kim@samsung.com: fix build errors]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Hyuk Lee b3c674bc7f ARM: SAMSUNG: Add device definition for HSMMC3
This patch adds hsmmc3 device definition in plat-samsung. Because now
S5PV210 can support 4 hsmmc such as hsmmc0, hsmmc1, hsmmc2 and hsmmc3
and that can be used in further Samsung SoCs.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Naveen Krishna Ch 50e9769ad5 ARM: SAMSUNG: Implement set_name function for ADC devices
This patch implements s3c_adc_setname() for Samsung SoCs.
Also updates its usage in S3C64XX, S5P6440, and S5PV210.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Abhilash Kesavan 0ab0b6d226 ARM: S3C64XX: Add support for Compact Flash driver on SMDK6410
Following is added for the CF-ATA driver:
	- Platform data strucure instantiation
	- Platform device enabling code
	- Addition of cfcon clock
	- Platform-specific gpio setup code

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Abhilash Kesavan db90005b5b ARM: SAMSUNG: Add Compact Flash device support for Samsung SoCs
Following has been added:
	- Common CF Platform device definition
	- Platform data strucure definition
	- CF controller register definitions

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:50 +09:00
Ben Dooks 3911dab8ad ARM: SAMSUNG: Add helper to clone and set platform data
This is intended to replace a number of sites in the Samsung kernel
where the same thing is being repeated in specific platform setting
code. See next patches for replacements.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: This is for building test]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:49 +09:00
Banajit Goswami 5db2bc8a11 ARM: SAMSUNG: Reduce virtual memory size for WDT device
This patch reduces the virtual memory allocated for WDT device from 1M
to 1K.

Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
2010-08-05 18:32:49 +09:00
Linus Torvalds a63ecd835f Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  cyber2000fb: fix console in truecolor modes
  cyber2000fb: fix machine hang on module load
  SA1111: Eliminate use after free
  ARM: Fix Versatile/Realview/VExpress MMC card detection sense
  ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt
  ARM: Add barriers to io{read,write}{8,16,32} accessors as well
  ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE
  ARM: 6272/1: Convert L2x0 to use the IO relaxed operations
  ARM: 6271/1: Introduce *_relaxed() I/O accessors
  ARM: 6275/1: ux500: don't use writeb() in uncompress.h
  ARM: 6270/1: clean files in arch/arm/boot/compressed/
  ARM: Fix csum_partial_copy_from_user()
2010-07-30 19:02:51 -07:00
Julia Lawall f2d2420bbf SA1111: Eliminate use after free
__sa1111_remove always frees its argument, so the subsequent reference to
sachip->saved_state represents a use after free.  __sa1111_remove does not
appear to use the saved_state field, so the patch simply frees it first.

A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression E,E2;
@@

__sa1111_remove(E)
...
(
  E = E2
|
* E
)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-30 23:19:30 +01:00
Russell King 74bc80931c ARM: Fix Versatile/Realview/VExpress MMC card detection sense
The MMC card detection sense has become really confused with negations
at various levels, leading to some platforms not detecting inserted
cards.  Fix this by converting everything to positive logic throughout,
thereby getting rid of these negations.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-30 23:16:32 +01:00
Gary King 831e8047eb ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt
smp_processor_id() must not be called from a preemptible context (this
is checked by CONFIG_DEBUG_PREEMPT).  kmap_high_l1_vipt() was doing so.
This lead to a problem where the wrong per_cpu kmap_high_l1_vipt_depth
could be incremented, causing a BUG_ON(*depth <= 0); in
kunmap_high_l1_vipt().

The solution is to move the call to smp_processor_id() after the call
to preempt_disable().

Originally by: Andrew Howe <ahowe@nvidia.com>

Signed-off-by: Gary King <gking@nvidia.com>
Acked-by: Nicolas Pitre <nico.as.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-30 23:16:07 +01:00
Russell King b92b361213 ARM: Add barriers to io{read,write}{8,16,32} accessors as well
The ioread/iowrite accessors also need barriers as they're used in
place of readl/writel et.al. in portable drivers.  Create __iormb()
and __iowmb() which are conditionally defined to be barriers dependent
on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 14:04:37 +01:00
Catalin Marinas 79f64dbf68 ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE
When the coherent DMA buffers are mapped as Normal Non-cacheable
(ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered
with Device memory accesses causing failures in device drivers that do
not use the mandatory memory barriers before starting a DMA transfer.
LKML discussions led to the conclusion that such barriers have to be
added to the I/O accessors:

http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153
http://thread.gmane.org/gmane.linux.ide/46414
http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250

This patch introduces a wmb() barrier to the write*() I/O accessors to
handle the situations where Normal Non-cacheable writes are still in the
processor (or L2 cache controller) write buffer before a DMA transfer
command is issued. For the read*() accessors, a rmb() is introduced
after the I/O to avoid speculative loads where the driver polls for a
DMA transfer ready bit.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 14:04:37 +01:00
Catalin Marinas 6775a558fe ARM: 6272/1: Convert L2x0 to use the IO relaxed operations
This patch is in preparation for a subsequent patch which adds barriers
to the I/O accessors. Since the mandatory barriers may do an L2 cache
sync, this patch avoids a recursive call into l2x0_cache_sync() via the
write*() accessors and wmb() and a call into l2x0_cache_sync() with the
l2x0_lock held.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 14:04:36 +01:00
Catalin Marinas e936771a76 ARM: 6271/1: Introduce *_relaxed() I/O accessors
This patch introduces readl*_relaxed()/write*_relaxed() as the main I/O
accessors (when __mem_pci is defined). The standard read*()/write*()
macros are now based on the relaxed accessors.

This patch is in preparation for a subsequent patch which adds barriers
to the I/O accessors.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 14:04:36 +01:00
Rabin Vincent 661f10f6b6 ARM: 6275/1: ux500: don't use writeb() in uncompress.h
Don't use writeb() in uncompress.h, to avoid the following build errors
when the "Add barriers to the I/O accessors" series is applied.  Use
__raw_writeb() instead.

arch/arm/boot/compressed/misc.o: In function `putc':
arch/arm/mach-ux500/include/mach/uncompress.h:41:
undefined reference to `outer_cache'

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 14:04:35 +01:00
Magnus Damm f1b957d3a0 ARM: 6270/1: clean files in arch/arm/boot/compressed/
Update the compressed boot Makefile for ARM to
remove files during clean.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29 11:31:21 +01:00
Linus Torvalds 8785eb1e7c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6:
  davinci: da850/omap-l138 evm: account for DEFDCDC{2,3} being tied high
  regulator: tps6507x: allow driver to use DEFDCDC{2,3}_HIGH register
  wm8350-regulator: fix wm8350_register_regulator error handling
  ab3100: fix off-by-one value range checking for voltage selector
2010-07-28 19:59:55 -07:00
Sekhar Nori 8b24599e72 davinci: da850/omap-l138 evm: account for DEFDCDC{2,3} being tied high
Per the da850/omap-l138 Beta EVM SOM schematic, the DEFDCDC2 and
DEFDCDC3 lines are tied high. This leads to a 3.3V IO and 1.2V CVDD
voltage.

Pass the right platform data to the TPS6507x driver so it can operate
on the DEFDCDC{2,3}_HIGH register to read and change voltage levels.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
2010-07-28 15:09:31 +01:00
Linus Torvalds 6aa033d7ef Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6265/1: kirkwood: move qnap_tsx1x_register_flash() to .init.text
  ARM: 6263/1: ns9xxx: fix FTBFS for zImage
  ARM: 6262/1: arm/clps711x: fix debug macro compilation failure
  ARM: 6261/1: arm/shark: fix debug macro compilation failure
  ARM: 6260/1: arm/plat-spear: fix debug macro compilation failure
  ARM: 6259/1: arm/ns9xxx: fix debug macro compilation failure
  ARM: 6258/1: arm/h720x: fix debug macro compilation failure
  ARM: 6233/1: Delete a wrong redundant right parenthesis
  ARM: 6230/1: fix nuc900 touchscreen clk definition bug
  [ARM] pxa: fix incorrect CONFIG_CPU_PXA27x to CONFIG_PXA27x
  [ARM] pxa/colibri-pxa300: fix AC97 init
  [ARM] pxa: fix incorrect order of AC97 reset pin configs
  [ARM] pxa: fix frequency scaling for pcmcia/pxa2xx_base
  [ARM] pxa: cpufreq-pxa2xx: fix DRI recomputation routine
  [ARM] pxa/corgi: fix MMC/SD card detection failure
2010-07-26 08:20:38 -07:00
Dmitry Torokhov 2e65a2075c Input: RX51 keymap - fix recent compile breakage
Commit 3fea60261e ("Input: twl40300-keypad - fix handling of "all
ground" rows") broke compilation as I managed to use non-existent
keycodes.

Reported-by: Arjan van de Ven <arjan@infradead.org>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-07-26 08:05:31 -07:00
Russell King 4609a179c9 ARM: Fix csum_partial_copy_from_user()
Using the parent functions frame pointer to access our arguments is
completely wrong, whether or not we're building with frame pointers
or not.  What we should be using is the stack pointer to get at the
word above the registers we stacked ourselves.

Reported-by: Bosko Radivojevic <bosko.radivojevic@gmail.com>
Tested-by: Bosko Radivojevic <bosko.radivojevic@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 12:18:16 +01:00
Uwe Kleine-König f9578fc078 ARM: 6265/1: kirkwood: move qnap_tsx1x_register_flash() to .init.text
qnap_tsx1x_register_flash is only called by qnap_ts219_init and
qnap_ts41x_init which both live in .init.text, too.  So the move is OK.

This fixes the following warning in kirkwood_defconfig:
	WARNING: vmlinux.o(.text+0x9334): Section mismatch in reference from the function qnap_tsx1x_register_flash() to the variable .init.data:qnap_tsx1x_spi_slave_info
	The function qnap_tsx1x_register_flash() references
	the variable __initdata qnap_tsx1x_spi_slave_info.
	This is often because qnap_tsx1x_register_flash lacks a __initdata
	annotation or the annotation of qnap_tsx1x_spi_slave_info is wrong.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:08 +01:00
Uwe Kleine-König 51aa87beb9 ARM: 6263/1: ns9xxx: fix FTBFS for zImage
the different putc variants used an initialized local static variable
which is broken since

	5de813b (ARM: Eliminate decompressor -Dstatic= PIC hack)

This needs to be initialized at runtime and so needs to be global.
While at it give it a better name.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:07 +01:00
Jeremy Kerr 73bcc76aee ARM: 6262/1: arm/clps711x: fix debug macro compilation failure
We need mach/hardware.h for CLPS7111_VIRT_BASE.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:07 +01:00
Jeremy Kerr 31e967daab ARM: 6261/1: arm/shark: fix debug macro compilation failure
We need a waituart macro.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:06 +01:00
Jeremy Kerr e6b8b3e21a ARM: 6260/1: arm/plat-spear: fix debug macro compilation failure
mov rx, =<immediate> isn't valid, use #<immediate> instead.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:06 +01:00
Jeremy Kerr f63a79f653 ARM: 6259/1: arm/ns9xxx: fix debug macro compilation failure
We need asm/memory.h for NS9XXX_CSxSTAT_PHYS (via mach/memory.h).

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:05 +01:00
Jeremy Kerr 9729c0ca19 ARM: 6258/1: arm/h720x: fix debug macro compilation failure
IO_BASE shoule be IO_VIRT, and IO_START should be IO_PHYS. We also need
mach/hardware.h for these definitions.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-26 10:33:05 +01:00
Linus Torvalds 27efd7e2e6 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: synaptics - relax capability ID checks on newer hardware
  Input: twl40300-keypad - fix handling of "all ground" rows
  Input: gamecon - reference correct pad in gc_psx_command()
  Input: gamecon - reference correct input device in NES mode
  Input: w90p910_keypad - change platfrom driver name to 'nuc900-kpi'
  Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
  Input: qt2160 - rename kconfig symbol name
2010-07-22 11:46:15 -07:00
wanzongshun 64dd3b74de ARM: 6233/1: Delete a wrong redundant right parenthesis
Delete a wrong redundant right parenthesis in
arch/arm/mach-footbridge/common.c

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-22 09:20:50 +01:00
wanzongshun a7029c8262 ARM: 6230/1: fix nuc900 touchscreen clk definition bug
This patch is to fix nuc900 touchscreen clk definition bug,the .dev_id's
name should be 'nuc900-ts', it should be the same to pdev.name. or else,
the touchscreen driver will be not working well due to clock engine disabled.

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-22 09:18:52 +01:00
Russell King 52d90145fb Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 2010-07-21 09:26:37 +01:00
Dmitry Torokhov 3fea60261e Input: twl40300-keypad - fix handling of "all ground" rows
The Nokia RX51 board code (arch/arm/mach-omap2/board-rx51-peripherals.c)
defines a key map for the matrix keypad keyboard. The hardware seems to
use all of the 8 rows and 8 columns of the keypad, although not all
possible locations are used.

The TWL4030 supports keypads with at most 8 rows and 8 columns. Most keys
are defined with a row and column number between 0 and 7, except

        KEY(0xff, 2, KEY_F9),
        KEY(0xff, 4, KEY_F10),
        KEY(0xff, 5, KEY_F11),

which represent keycodes that should be emitted when entire row is
connected to the ground.  since the driver handles this case as if we
had an extra column in the key matrix. Unfortunately we do not allocate
enough space and end up owerwriting some random memory.

Reported-and-tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: stable@kernel.org
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2010-07-20 20:29:48 -07:00
Linus Torvalds 2f7989efd4 Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6226/1: fix kprobe bug in ldr instruction emulation
  ARM: Update mach-types
  ARM: lockdep: fix unannotated irqs-on
  ARM: 6184/2: ux500: use neutral PRCMU base
  ARM: 6212/1: atomic ops: add memory constraints to inline asm
  ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
  ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
2010-07-14 17:28:13 -07:00
Nicolas Pitre 0ebe25f90c ARM: 6226/1: fix kprobe bug in ldr instruction emulation
From: Bin Yang <bin.yang@marvell.com>

Cc: stable@kernel.org
Signed-off-by: Bin Yang <bin.yang@marvell.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-14 23:28:06 +01:00
pieterg 7fad69861d [ARM] pxa/colibri-pxa300: fix AC97 init
The wrong CONFIG defines were checked, and the <mach/audio.h>
include was missing

Signed-off-by: pieter <p.grimmerink@inepro.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:07 +08:00
Eric Miao 5e16e3cb83 [ARM] pxa: fix incorrect order of AC97 reset pin configs
Reported-by: Dylan Cristiani <d.cristiani@idem-tech.it>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Marek Vasut 3d3d0fbf4d [ARM] pxa: cpufreq-pxa2xx: fix DRI recomputation routine
This patch:
1) Simpifies the DRI recomputation routine by pulling out the common code
2) Fixes a bug in PXA27x DRI recomputation caused by incorrect parenthesis

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Eric Miao 76d61e4ee0 [ARM] pxa/corgi: fix MMC/SD card detection failure
Reported-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Linus Torvalds c2330e286f Merge branch 'arm/defconfig/reduced-v2.6.35-rc1' of git://git.pengutronix.de/git/ukl/linux-2.6
* 'arm/defconfig/reduced-v2.6.35-rc1' of git://git.pengutronix.de/git/ukl/linux-2.6:
  ARM: reduce defconfigs

This is a big change, but results in no loss of information, despite us
losing almost 200k lines:

 177 files changed, 652 insertions(+), 194157 deletions(-)

and Grant Likely thinks powerpc can also use the same reduction
technique.

The python script that did the reduction looks like this:

    #! /usr/bin/env python
    # vim: set fileencoding=utf-8 :
    # Copyright (C) 2010 by Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

    import re
    import subprocess
    import os
    import sys

    # This prevents including a timestamp in the .config which makes comparing a
    # bit easier.
    os.environ['KCONFIG_NOTIMESTAMP'] = 'Yes, please'

    # XXX: get these using getopt
    kernel_tree = '' # os.path.join(os.environ['HOME'], 'gsrc', 'linux-2.6')
    arch = 'arm'
    target = sys.argv[1]
    defconfig_src = os.path.join(kernel_tree, 'arch/%s/configs/%s' % (arch, target))

    subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target])
    origconfig = list(open('.config'))
    config = list(origconfig)
    config_size = os.stat('.config').st_size

    i = 0

    while i < len(config):
        print 'test for %r' % config[i]
        defconfig = open(defconfig_src, 'w')
        defconfig.writelines(config[:i])
        defconfig.writelines(config[i + 1:])
        defconfig.close()
        subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target])
        if os.stat('.config').st_size == config_size and list(open('.config')) == origconfig:
            del config[i]
        else:
            i += 1

    defconfig = open(defconfig_src, 'w')
    defconfig.writelines(config)
    defconfig.close()

which is pretty self-explanatory.

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Acked-by: Russell King <linux@arm.linux.org.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-07-12 14:47:01 -07:00
Russell King d8495378e2 ARM: Update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-12 21:14:53 +01:00
Russell King ac78884e6d ARM: lockdep: fix unannotated irqs-on
CPU: Testing write buffer coherency: ok
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
Modules linked in:
[<c0035120>] (unwind_backtrace+0x0/0xf8) from [<c0355374>] (dump_stack+0x20/0x24)
[<c0355374>] (dump_stack+0x20/0x24) from [<c0060c04>] (warn_slowpath_common+0x58/0x70)
[<c0060c04>] (warn_slowpath_common+0x58/0x70) from [<c0060c3c>] (warn_slowpath_null+0x20/0x24)
[<c0060c3c>] (warn_slowpath_null+0x20/0x24) from [<c008f224>] (check_flags+0xcc/0x1dc)
[<c008f224>] (check_flags+0xcc/0x1dc) from [<c00945dc>] (lock_acquire+0x50/0x140)
[<c00945dc>] (lock_acquire+0x50/0x140) from [<c0358434>] (_raw_spin_lock+0x50/0x88)
[<c0358434>] (_raw_spin_lock+0x50/0x88) from [<c00fd114>] (set_task_comm+0x2c/0x60)
[<c00fd114>] (set_task_comm+0x2c/0x60) from [<c007e184>] (kthreadd+0x30/0x108)
[<c007e184>] (kthreadd+0x30/0x108) from [<c0030104>] (kernel_thread_exit+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
possible reason: unannotated irqs-on.
irq event stamp: 3
hardirqs last  enabled at (2): [<c0059bb0>] finish_task_switch+0x48/0xb0
hardirqs last disabled at (3): [<c002f0b0>] ret_slow_syscall+0xc/0x1c
softirqs last  enabled at (0): [<c005f3e0>] copy_process+0x394/0xe5c
softirqs last disabled at (0): [<(null)>] (null)

Fix this by ensuring that the lockdep interrupt state is manipulated in
the appropriate places.  We essentially treat userspace as an entirely
separate environment which isn't relevant to lockdep (lockdep doesn't
monitor userspace.)  We don't tell lockdep that IRQs will be enabled
in that environment.

Instead, when creating kernel threads (which is a rare event compared
to entering/leaving userspace) we have to update the lockdep state.  Do
this by starting threads with IRQs disabled, and in the kthread helper,
tell lockdep that IRQs are enabled, and enable them.

This provides lockdep with a consistent view of the current IRQ state
in kernel space.

This also revert portions of 0d928b0b61
which didn't fix the problem.

Tested-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-10 10:53:13 +01:00
Linus Walleij d9e38040cc ARM: 6184/2: ux500: use neutral PRCMU base
The MTU wallclock timing fix-up patch was hardwired to the DB8500
causing a regression. This makes it work on the DB5500 as well.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 14:46:47 +01:00
Will Deacon 398aa66827 ARM: 6212/1: atomic ops: add memory constraints to inline asm
Currently, the 32-bit and 64-bit atomic operations on ARM do not
include memory constraints in the inline assembly blocks. In the
case of barrier-less operations [for example, atomic_add], this
means that the compiler may constant fold values which have actually
been modified by a call to an atomic operation.

This issue can be observed in the atomic64_test routine in
<kernel root>/lib/atomic64_test.c:

00000000 <test_atomic64>:
   0:	e1a0c00d 	mov	ip, sp
   4:	e92dd830 	push	{r4, r5, fp, ip, lr, pc}
   8:	e24cb004 	sub	fp, ip, #4
   c:	e24dd008 	sub	sp, sp, #8
  10:	e24b3014 	sub	r3, fp, #20
  14:	e30d000d 	movw	r0, #53261	; 0xd00d
  18:	e3011337 	movw	r1, #4919	; 0x1337
  1c:	e34c0001 	movt	r0, #49153	; 0xc001
  20:	e34a1aa3 	movt	r1, #43683	; 0xaaa3
  24:	e16300f8 	strd	r0, [r3, #-8]!
  28:	e30c0afe 	movw	r0, #51966	; 0xcafe
  2c:	e30b1eef 	movw	r1, #48879	; 0xbeef
  30:	e34d0eaf 	movt	r0, #57007	; 0xdeaf
  34:	e34d1ead 	movt	r1, #57005	; 0xdead
  38:	e1b34f9f 	ldrexd	r4, [r3]
  3c:	e1a34f90 	strexd	r4, r0, [r3]
  40:	e3340000 	teq	r4, #0
  44:	1afffffb 	bne	38 <test_atomic64+0x38>
  48:	e59f0004 	ldr	r0, [pc, #4]	; 54 <test_atomic64+0x54>
  4c:	e3a0101e 	mov	r1, #30
  50:	ebfffffe 	bl	0 <__bug>
  54:	00000000 	.word	0x00000000

The atomic64_set (0x38-0x44) writes to the atomic64_t, but the
compiler doesn't see this, assumes the test condition is always
false and generates an unconditional branch to __bug. The rest of the
test is optimised away.

This patch adds suitable memory constraints to the atomic operations on ARM
to ensure that the compiler is informed of the correct data hazards. We have
to use the "Qo" constraints to avoid hitting the GCC anomaly described at
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44492 , where the compiler
makes assumptions about the writeback in the addressing mode used by the
inline assembly. These constraints forbid the use of auto{inc,dec} addressing
modes, so it doesn't matter if we don't use the operand exactly once.

Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:29:35 +01:00
Will Deacon 068de8d1be ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
The atomic64_add_unless function compares an atomic variable with
a given value and, if they are not equal, adds another given value
to the atomic variable. The function returns zero if the addition
did not occur and non-zero otherwise.

On ARM, the return value is initialised to 1 in C code. Inline assembly
code then performs the atomic64_add_unless operation, setting the
return value to 0 iff the addition does not occur. This means that
when the addition *does* occur, the value of ret must be preserved
across the inline assembly and therefore requires a "+r" constraint
rather than the current one of "=&r".

Thanks to Nicolas Pitre for helping to spot this.

Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:29:35 +01:00
Sascha Hauer 4082cfa776 ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset
default values. Allow them to be overwritten with the aux_val/aux_mask
arguments passed to l2x0_init().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:28:53 +01:00