Commit Graph

2 Commits

Author SHA1 Message Date
Baruch Siach cffcc92e96 gpio: xtensa: fix build when XCHAL_HAVE_CP is 0
In xtensa coprocessors may exist without coprocessor context, i.e. they cannot
be disabled/enabled. In this case the RSR_CPENABLE/WSR_CPENABLE are undefined,
thus breaking the build. Fix the build by adding dummy versions of
enable_cp/disable_cp in this case.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:11:45 +01:00
Baruch Siach 3b31d0eca5 gpio: driver for Xtensa GPIO32
GPIO32 is a standard optional extension to the Xtensa architecture
core that provides preconfigured output and input ports for intra
SoC signaling. The GPIO32 option is implemented as 32bit Tensilica
Instruction Extension (TIE) output state called EXPSTATE, and 32bit
input wire called IMPWIRE. This driver treats input and output
states as two distinct devices.

v3:
* Use BUG() in xtensa_impwire_set_value() to indicate that
  it should never be called (Linus Walleij)
v2:
* Address the comments of Linus Walleij:
  - Add a few comments
  - Expand commit log message
  - Use the BIT() macro for bit offsets
  - Rewrite CPENABLE handling as static inlines
  - Use device_initcall()
* Depend on !SMP for reason explained in the comments (Marc Gauthier)
* Use XCHAL_CP_ID_XTIOP to enable/disable GPIO32 only

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12 14:33:14 +01:00