The txx9_tmr_init() will not clear a timer counter register in a certain
case. The counter register is cleared on 1->0 transition of TCE bit if
CRE=1. So just clearing the TCE bit is not enough.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Convert jmr3927_clock_event_device to more generic
txx9tmr_clock_event_device which supports one-shot mode. The
txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer
interrupt was not available.
Convert jmr3927_hpt_read to txx9_clocksource driver which does not
depends jiffies anymore. The txx9_clocksource itself can be used for
TX49, but normally TX49 uses higher precision clocksource_mips.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
