Commit Graph

169 Commits

Author SHA1 Message Date
Karsten Keil ef34814426 [TG3]: ethtool always report port is TP.
Even with fiber cards ethtool reports that the connected port is TP,
the patch fix this.

Signed-off-by: Karsten Keil <kkeil@suse.de>
Acked-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-05-12 12:49:08 -07:00
Jesper Juhl a50bb7b9af [TG3]: Fix possible NULL deref in tg3_run_loopback().
tg3_run_loopback doesn't check that dev_alloc_skb() returns anything
useful.

Even if dev_alloc_skb() fails to return an skb to us we'll happily go
on and assume it did, so we risk dereferencing a NULL pointer.  Much
better to fail gracefully by returning -ENOMEM than crashing here.

Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-05-09 23:14:35 -07:00
Michael Chan b276764091 [TG3]: Update version and reldate
Update version to 3.57.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 19:01:06 -07:00
Michael Chan f6d9a2565b [TG3]: Fix bug in nvram write
Fix bug in nvram write function. If the starting nvram address offset
happens to be the last dword of the page, the NVRAM_CMD_LAST bit will
not get set in the existing code. This patch fixes the bug by changing
the "else if" to "if" so that the last dword condition always gets
checked.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 19:00:24 -07:00
Gary Zambrano 8e7a22e3eb [TG3]: Add reset_phy parameter to chip reset functions
Add a reset_phy parameter to tg3_reset_hw() and tg3_init_hw(). With
the full chip reset during MAC address change, the automatic PHY reset
during chip reset will cause a link down and bonding will not work
properly as a result. With this reset_phy parameter, we can do a chip
reset without link down when changing MAC address or MTU.

Signed-off-by: Gary Zambrano <zambrano@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 18:59:13 -07:00
Michael Chan 58712ef9f2 [TG3]: Reset chip when changing MAC address
Do the full chip reset when changing MAC address if ASF is enabled.

ASF sometimes uses a different MAC address than the driver. Without
the reset, the ASF MAC address may be overwritten when the driver's
MAC address is changed.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 18:58:01 -07:00
Michael Chan c424cb249d [TG3]: Add phy workaround
Add some PHY workaround code to reduce jitter on some PHYs.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 18:56:34 -07:00
Michael Chan c8e1e82b6a [TG3]: Call netif_carrier_off() during phy reset
Add netif_carrier_off() call during tg3_phy_reset(). This is needed
to properly track the netif_carrier state in cases where we do a
PHY reset with interrupts disabled. The SerDes code will not run
properly if the netif_carrier state is wrong.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-29 18:55:17 -07:00
Michael Chan bbadf503d7 [TG3]: Speed up SRAM access (2nd version)
Speed up SRAM read and write functions if possible by using MMIO
instead of config. cycles. With this change, the post reset signature
done at the end of D3 power change must now be moved before the D3
power change.

IBM reported a problem on powerpc blades during ethtool self test that
was caused by the memory test taking excessively long. Config.  cycles
are very slow on powerpc and the memory test can take more than 10
seconds to complete using config. cycles.

David Miller informed me that an earlier version of the patch caused
problems on sparc64 systems with built-in tg3 chips. This version
fixes the problem by excluding all SUN built-in tg3 chips from doing
MMIO SRAM access.

TG3_FLAG_EEPROM_WRITE_PROT is also set unconditionally when
TG3_FLG2_SUN_570X is set. This should be sane as all SUN chips are
built-in and do not require Vaux switching.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-09 22:25:46 -07:00
Michael Chan d2d746f83b [TG3]: Kill some less useful flags
Kill the TG3_FLAG_NO_{TX|RX}_PSEUDO_CSUM flags because they are not
very useful. This will free up some bits for new flags.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-09 22:25:44 -07:00
Adrian Bunk ad96b485b4 [TG3]: Fix a memory leak.
This patch fixes a memory leak (buf wasn't freed) spotted by the
Coverity checker.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-09 22:25:27 -07:00
Linus Torvalds 63589ed078 Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial
* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (48 commits)
  Documentation: fix minor kernel-doc warnings
  BUG_ON() Conversion in drivers/net/
  BUG_ON() Conversion in drivers/s390/net/lcs.c
  BUG_ON() Conversion in mm/slab.c
  BUG_ON() Conversion in mm/highmem.c
  BUG_ON() Conversion in kernel/signal.c
  BUG_ON() Conversion in kernel/signal.c
  BUG_ON() Conversion in kernel/ptrace.c
  BUG_ON() Conversion in ipc/shm.c
  BUG_ON() Conversion in fs/freevxfs/
  BUG_ON() Conversion in fs/udf/
  BUG_ON() Conversion in fs/sysv/
  BUG_ON() Conversion in fs/inode.c
  BUG_ON() Conversion in fs/fcntl.c
  BUG_ON() Conversion in fs/dquot.c
  BUG_ON() Conversion in md/raid10.c
  BUG_ON() Conversion in md/raid6main.c
  BUG_ON() Conversion in md/raid5.c
  Fix minor documentation typo
  BFP->BPF in Documentation/networking/tuntap.txt
  ...
2006-04-02 12:58:45 -07:00
Eric Sesterhenn 5d9428de1a BUG_ON() Conversion in drivers/net/
this changes if() BUG(); constructs to BUG_ON() which is
cleaner, contains unlikely() and can better optimized away.

Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-04-02 13:52:48 +02:00
David S. Miller 5c516c1019 [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-01 00:33:31 -08:00
David S. Miller 758a613936 [TG3]: Revert "Speed up SRAM access"
Undo commit 100c467330

MMIOs timeout more quickly that PCI config cycles and some
of these SRAM accesses can take a very long time, triggering
the MMIO limits on some sparc64 PCI controllers and thus
resulting in bus timeouts and bus errors.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-04-01 00:32:56 -08:00
Michael Chan e3a05978f1 [TG3]: Update version and reldate
Update version to 3.55.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:41 -08:00
Michael Chan f475f163f1 [TG3]: Skip timer code during full lock
Skip the main timer code if interrupts are disabled in the full lock
state.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:39 -08:00
Michael Chan 100c467330 [TG3]: Speed up SRAM access
Speed up SRAM read and write functions if possible by using MMIO
instead of config. cycles. With this change, the post reset signature
done at the end of D3 power change must now be moved before the D3
power change.

IBM reported a problem on powerpc blades during ethtool self test
that was caused by the memory test taking excessively long. Config.
cycles are very slow on powerpc and the memory test can take more
than 10 seconds to complete using config. cycles. As a result, NETDEV
WATCHDOG can be triggered during self test and the chip can end up in
a funny state.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:38 -08:00
Michael Chan ff18ff0234 [TG3]: Fix PHY loopback on 5700
Fix PHY loopback failure on some 5700 devices.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:37 -08:00
Michael Chan 6728a8e2e1 [TG3]: Fix bug in 40-bit DMA workaround code
Need to check the TG3_FLAG_40BIT_DMA_BUG flag in the workaround code
path instead of device flags.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:36 -08:00
Michael Chan 008652b337 [TG3]: Fix probe failure due to invalid MAC address
Some older bootcode in some devices may report 0 MAC address in
SRAM when booting up from low power state. This patch fixes the
problem by checking for a valid MAC address in SRAM and falling back
to NVRAM if necessary.

Thanks to walt <wa1ter@myrealbox.com> for reporting the problem
and helping to debug it.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-28 17:02:35 -08:00
David S. Miller 95381c893d [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-23 01:29:06 -08:00
Michael Chan d3c7b88697 [TG3]: Add 5755 nvram support
Add 5755 nvram support.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-23 01:28:25 -08:00
Michael Chan af36e6b6d7 [TG3]: Add 5755 support
Add support for new chip 5755 which is very similar to 5787.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-23 01:28:06 -08:00
David S. Miller 056755f4d7 [TG3]: Bump driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-22 01:07:53 -08:00
Michael Chan 15c3b69610 [TG3]: Skip phy power down on some devices
Some PHYs should not be powered down in tg3_set_power_state() because
of bugs or other hardware limitations.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-22 01:06:52 -08:00
Michael Chan caf636c760 [TG3]: Fix SRAM access during tg3_init_one()
5700 and 5701 will not return correct SRAM data when the chip is in
D3hot power state. tg3_get_eeprom_hw_cfg() must first put the device
in D0 before reading SRAM.

Thanks to Thomas Chenault at Dell for noticing this problem.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-22 01:05:31 -08:00
David S. Miller 30ca3e376e [TG3]: Don't mark tg3_test_registers() as returning const.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 23:02:36 -08:00
Adrian Bunk 81789ef5c9 [TG3]: make drivers/net/tg3.c:tg3_request_irq() static
This patch makes the needlessly global function tg3_request_irq()
static.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 23:00:14 -08:00
Jeff Mahoney 59f1741e54 [TG3]: netif_carrier_off runs too early; could still be queued when init fails
Move the netif_carrier_off() call from tg3_init_one()->
tg3_init_link_config() to tg3_open() as is the convention for most other
network drivers.

I was getting a panic after a tg3 device failed to initialize due to DMA
failure.  The oops pointed to the link watch queue with spinlock debugging
enabled.  Without spinlock debugging, the Oops didn't occur.

I suspect that the link event was getting queued but not executed until
after the DMA test had failed and the device was freed.  The link event was
then operating on freed memory, which could contain anything.  With this
patch applied, the Oops no longer occurs.

[ Based upon feedback from Michael Chan, we move netif_carrier_off()
  to the end of tg3_init_one() instead of moving it to tg3_open() -DaveM ]

Signed-off-by: Jeff Mahoney <jeffm@suse.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:39:21 -08:00
Michael Chan e9e678006e [TG3]: update version and reldate
Update version to 3.52.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:29:52 -08:00
Michael Chan c4e6575c78 [TG3]: Add firmware version info
Add fw_version information to ethtool -i.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:29:32 -08:00
Michael Chan 1820180b0e [TG3]: nvram cleanup
Some nvram related cleanup:

1. Add a tg3_nvram_read_swab() since swabing the data is frequently
done.

2. Add a function to convert nvram address to physical address
instead of doing it in 2 separate places.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:29:15 -08:00
Michael Chan 79f4d13a15 [TG3]: Fixup memory test for 5787
Ethtool memory test on 5787 requires a new memory table.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:28:57 -08:00
Michael Chan fcfa0a32c7 [TG3]: Add new one-shot MSI handler
Support one-shot MSI on 5787.

This one-shot MSI idea is credited to David Miller. In this mode, MSI
disables itself automatically after it is generated, saving the driver
a register access to disable it for NAPI.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:28:41 -08:00
Michael Chan 9c27dbdf64 [TG3]: Add ipv6 checksum support
Support ipv6 tx csum on 5787 by setting NETIF_F_HW_CSUM.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:28:27 -08:00
Michael Chan 5a6f3074c2 [TG3]: Add new hard_start_xmit
Support 5787 hardware TSO using a new flag TG3_FLG2_HW_TSO_2.

Since the TSO interface is slightly different and these chips have
finally fixed the 4GB DMA problem and do not have the 40-bit DMA
problem, a new hard_start_xmit is used for these chips. All previous
chips will use the old hard_start_xmit that is now renamed
tg3_start_xmit_dma_bug().

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:28:05 -08:00
Michael Chan 1b27777a9b [TG3]: Add 5787 nvram support
Support additional nvrams and new nvram format for 5787 and 5754.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:27:48 -08:00
Michael Chan d9ab5ad12b [TG3]: Add 5787 and 5754 basic support
Add basic support for 2 new chips 5787 and 5754.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 22:27:35 -08:00
Michael Chan 4f81c32b02 [TG3]: Fix tg3_get_ringparam()
Fix-up tg3_get_ringparam() to return the correct parameters.

Set the jumbo rx ring parameter only if it is supported by the chip
and currently in use.

Add missing value for tx_max_pending, noticed by Rick Jones.

Update version to 3.51.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 21:33:42 -08:00
Michael Chan e75f7c9009 [TG3]: Add some missing netif_running() checks
Add missing netif_running() checks in tg3's dev->set_multicast_list()
and dev->set_mac_address(). If not netif_running(), these 2 calls can
simply return 0 after storing the new settings if required.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 21:33:26 -08:00
Michael Chan 2e2e4f5c99 [TG3]: Update version and reldate
Update version to 3.50.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 17:48:18 -08:00
Michael Chan bc1c756741 [TG3]: Support shutdown WoL.
Support WoL during shutdown by calling
tg3_set_power_state(tp, PCI_D3hot) during tg3_close().

Change the power state parameter to pci_power_t type and use
constants defined in pci.h.

Certain ethtool operations cannot be performed after tg3_close()
because the device will go to low power state. Add return -EAGAIN
in such cases where appropriate.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 17:48:03 -08:00
Michael Chan 4e3a7aaa28 [TG3]: Enable TSO by default
Enable TSO by default on newer chips that support TSO in hardware.
Leave TSO off by default on older chips that do firmware TSO because
performance is slightly lower.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 17:47:44 -08:00
Michael Chan d4d2c558fd [TG3]: Add support for 5714S and 5715S
Add support for 5714S and 5715S.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 17:47:20 -08:00
Linus Torvalds c4a1745aa0 Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (230 commits)
  [SPARC64]: Update defconfig.
  [SPARC64]: Fix 2 bugs in huge page support.
  [SPARC64]: CONFIG_BLK_DEV_RAM fix
  [SPARC64]: Optimized TSB table initialization.
  [SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.
  [SPARC64]: Use SLAB caches for TSB tables.
  [SPARC64]: Don't kill the page allocator when growing a TSB.
  [SPARC64]: Randomize mm->mmap_base when PF_RANDOMIZE is set.
  [SPARC64]: Increase top of 32-bit process stack.
  [SPARC64]: Top-down address space allocation for 32-bit tasks.
  [SPARC64] bbc_i2c: Fix cpu check and add missing module license.
  [SPARC64]: Fix and re-enable dynamic TSB sizing.
  [SUNSU]: Fix missing spinlock initialization.
  [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.
  [SPARC64]: First cut at VIS simulator for Niagara.
  [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.
  [SPARC64]: Add SMT scheduling support for Niagara.
  [SPARC64]: Fix 32-bit truncation which broke sparsemem.
  [SPARC64]: Move over to sparsemem.
  [SPARC64]: Fix new context version SMP handling.
  ...
2006-03-20 11:57:50 -08:00
Jeff Garzik d378aca6ec Merge branch 'master' 2006-03-20 04:38:03 -05:00
David S. Miller 72b845e04e [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.
Sun does't put an SEEPROM behind the tigon3 chip, among other things,
so accesses to these areas just give bus timeouts.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:14:27 -08:00
Michael Chan 4a29cc2e50 [TG3]: 40-bit DMA workaround part 2
The 40-bit DMA workaround recently implemented for 5714, 5715, and
5780 needs to be expanded because there may be other tg3 devices
behind the EPB Express to PCIX bridge in the 5780 class device.

For example, some 4-port card or mother board designs have 5704 behind
the 5714.

All devices behind the EPB require the 40-bit DMA workaround.

Thanks to Chris Elmquist again for reporting the problem and testing
the patch.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-19 13:21:12 -08:00
Jeff Garzik abc71c46dc Merge branch 'upstream-fixes' 2006-03-16 19:27:08 -05:00