Commit Graph

36974 Commits

Author SHA1 Message Date
Johannes Berg 1dacc76d00 net/compat/wext: send different messages to compat tasks
Wireless extensions have the unfortunate problem that events
are multicast netlink messages, and are not independent of
pointer size. Thus, currently 32-bit tasks on 64-bit platforms
cannot properly receive events and fail with all kinds of
strange problems, for instance wpa_supplicant never notices
disassociations, due to the way the 64-bit event looks (to a
32-bit process), the fact that the address is all zeroes is
lost, it thinks instead it is 00:00:00:00:01:00.

The same problem existed with the ioctls, until David Miller
fixed those some time ago in an heroic effort.

A different problem caused by this is that we cannot send the
ASSOCREQIE/ASSOCRESPIE events because sending them causes a
32-bit wpa_supplicant on a 64-bit system to overwrite its
internal information, which is worse than it not getting the
information at all -- so we currently resort to sending a
custom string event that it then parses. This, however, has a
severe size limitation we are frequently hitting with modern
access points; this limitation would can be lifted after this
patch by sending the correct binary, not custom, event.

A similar problem apparently happens for some other netlink
users on x86_64 with 32-bit tasks due to the alignment for
64-bit quantities.

In order to fix these problems, I have implemented a way to
send compat messages to tasks. When sending an event, we send
the non-compat event data together with a compat event data in
skb_shinfo(main_skb)->frag_list. Then, when the event is read
from the socket, the netlink code makes sure to pass out only
the skb that is compatible with the task. This approach was
suggested by David Miller, my original approach required
always sending two skbs but that had various small problems.

To determine whether compat is needed or not, I have used the
MSG_CMSG_COMPAT flag, and adjusted the call path for recv and
recvfrom to include it, even if those calls do not have a cmsg
parameter.

I have not solved one small part of the problem, and I don't
think it is necessary to: if a 32-bit application uses read()
rather than any form of recvmsg() it will still get the wrong
(64-bit) event. However, neither do applications actually do
this, nor would it be a regression.

Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-15 08:53:39 -07:00
David S. Miller e5a8a896f5 Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 2009-07-09 20:18:24 -07:00
Jiri Olsa ad46276952 memory barrier: adding smp_mb__after_lock
Adding smp_mb__after_lock define to be used as a smp_mb call after
a lock.

Making it nop for x86, since {read|write|spin}_lock() on x86 are
full memory barriers.

Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-09 17:06:58 -07:00
Patrick McHardy ec634fe328 net: convert remaining non-symbolic return values in ndo_start_xmit() functions
This patch converts the remaining occurences of raw return values to their
symbolic counterparts in ndo_start_xmit() functions that were missed by the
previous automatic conversion.

Additionally code that assumed the symbolic value of NETDEV_TX_OK to be zero
is changed to explicitly use NETDEV_TX_OK.

Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-05 19:23:38 -07:00
Patrick McHardy 6ed106549d net: use NETDEV_TX_OK instead of 0 in ndo_start_xmit() functions
This patch is the result of an automatic spatch transformation to convert
all ndo_start_xmit() return values of 0 to NETDEV_TX_OK.

Some occurences are missed by the automatic conversion, those will be
handled in a seperate patch.

Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-05 19:16:04 -07:00
Linus Torvalds de481ba925 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: (27 commits)
  parisc: use generic atomic64 on 32-bit
  parisc: superio: fix build breakage
  parisc: Fix PCI resource allocation on non-PAT SBA machines
  parisc: perf: wire up sys_perf_counter_open
  parisc: add task_pt_regs macro
  parisc: wire sys_perf_counter_open to sys_ni_syscall
  parisc: inventory.c, fix bloated stack frame
  parisc: processor.c, fix bloated stack frame
  parisc: fix compile warning in mm/init.c
  parisc: remove dead code from sys_parisc32.c
  parisc: wire up rt_tgsigqueueinfo
  parisc: ensure broadcast tlb purge runs single threaded
  parisc: fix "delay!" timer handling
  parisc: fix mismatched parenthesis in memcpy.c
  parisc: Fix gcc 4.4 warning in lba_pci.c
  parisc: add parameter to read_cr16()
  parisc: decode_exc.c should include kernel.h
  parisc: remove obsolete hw_interrupt_type
  parisc: fix irq compile bugs in arch/parisc/kernel/irq.c
  parisc: advertise PCI devs after "assign_resources"
  ...

Manually fixed up trivial conflicts in tools/perf/perf.h due to addition
of SH vs HPPA perf-counter support.
2009-07-04 10:35:12 -07:00
Linus Torvalds 4806626782 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Fix CONFIG_FLATMEM version of pfn_valid()
  MIPS: Reorganize Cavium OCTEON PCI support.
  Update Yoichi Yuasa's e-mail address
  MIPS: Allow suspend and hibernation again on uniprocessor kernels.
  MIPS: 64-bit: Fix o32 core dump
  MIPS: BC47xx: Fix SSB irq setup
  MIPS: CMP: Update sync-r4k for current kernel
  MIPS: CMP: Move gcmp_probe to before the SMP ops
  MIPS: CMP: activate CMP support
  MIPS: CMP: Extend IPI handling to CPU number
  MIPS: CMP: Extend the GIC IPI interrupts beyond 32
  MIPS: Define __arch_swab64 for all mips r2 cpus
  MIPS: Update VR41xx GPIO driver to use gpiolib
  MIPS: Hookup new syscalls sys_rt_tgsigqueueinfo and sys_perf_counter_open.
  MIPS: Malta: Remove unnecessary function prototypes
  MIPS: MT: Remove unnecessary semicolons
  MIPS: Add support for Texas Instruments AR7 System-on-a-Chip
2009-07-04 09:47:01 -07:00
Linus Torvalds 29f31773e0 Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes
* git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes:
  kbuild: finally remove the obsolete variable $TOPDIR
  gitignore: ignore scripts/ihex2fw
  Kbuild: Disable the -Wformat-security gcc flag
  gitignore: ignore gcov output files
  kbuild: deb-pkg ship changelog
  Add new __init_task_data macro to be used in arch init_task.c files.
  asm-generic/vmlinux.lds.h: shuffle INIT_TASK* macro names in vmlinux.lds.h
  Add new macros for page-aligned data and bss sections.
  asm-generic/vmlinux.lds.h: Fix up RW_DATA_SECTION definition.
2009-07-04 09:46:01 -07:00
Ralf Baechle baf9227802 MIPS: Fix CONFIG_FLATMEM version of pfn_valid()
For systems which do not define PHYS_OFFSET as 0 pfn_valid() may falsely
have returned 0 on most configurations.  Bug introduced by commit
752fbeb2e3555c0d236e992f1195fd7ce30e728d (linux-mips.org) rsp.
6f284a2ce7 (kernel.org) titled "[MIPS]
FLATMEM: introduce PHYS_OFFSET."

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:29 +01:00
David Daney 01a6221a6a MIPS: Reorganize Cavium OCTEON PCI support.
Move the cavium PCI files to the arch/mips/pci directory.  Also cleanup
comment formatting and code layout.  Code from pci-common.c, was moved
into other files.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:29 +01:00
Yoichi Yuasa ada8e9514b Update Yoichi Yuasa's e-mail address
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:29 +01:00
Ralf Baechle 3f5b3e17f7 MIPS: Allow suspend and hibernation again on uniprocessor kernels.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
2009-07-03 15:45:28 +01:00
Yong Zhang cad9bc6904 MIPS: 64-bit: Fix o32 core dump
If an o32 process generates a core dump on a 64 bit kernel, the core file
will not be correctly recognized. This is because ELF_CORE_COPY_REGS and
ELF_CORE_COPY_TASK_REGS are not correctly defined for o32 and will use
the default register set which would be CONFIG_64BIT in asm/elf.h.

So we'll switch to use the right register defines in this situation by
checking for WANT_COMPAT_REG_H and use the right defines of
ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS.

[Ralf: made ELF_CORE_COPY_TASK_REGS() bullet-proof against funny arguments.]

Signed-off-by: Yong Zhang <yong.zhang@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:27 +01:00
Tim Anderson eb9b5141a9 MIPS: CMP: Update sync-r4k for current kernel
This revises the sync-4k so it will boot and operate since the removal of
expirelo from the timer code.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:27 +01:00
Tim Anderson 47b178bb69 MIPS: CMP: Move gcmp_probe to before the SMP ops
This is to move the gcmp_probe call to before the use of and selection of
the smp_ops functions. This allows malta with 1004K to work.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:26 +01:00
Tim Anderson 0365070f05 MIPS: CMP: activate CMP support
Most of the CMP support was added before, this mostly correct compile
problems but adds a platform specific translation for the interrupt number
based on cpu number.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:26 +01:00
Tim Anderson a214cef9a5 MIPS: CMP: Extend IPI handling to CPU number
This takes the current IPI interrupt assignment from the fix number of 4
to the number of CPUs defined in the system.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:26 +01:00
Tim Anderson 9306c8def6 MIPS: CMP: Extend the GIC IPI interrupts beyond 32
This patch extends the GIC interrupt handling beyond the current 32 bit
range as well as extending the number of interrupts based on the number
of CPUs.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:25 +01:00
David Daney b53d4d1f8d MIPS: Define __arch_swab64 for all mips r2 cpus
Some CPUs implement mipsr2, but because they are a super-set of mips64r2 do
not define CONFIG_CPU_MIPS64_R2.  Cavium OCTEON falls into this category.
We would still like to use the optimized implementation, so since we have
already checked for CONFIG_CPU_MIPSR2, checking for CONFIG_64BIT instead of
CONFIG_CPU_MIPS64_R2 is sufficient.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:25 +01:00
Yoichi Yuasa 27fdd325da MIPS: Update VR41xx GPIO driver to use gpiolib
Signed-off-by: Yoichi Yuasa <yyuasa@linux.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:25 +01:00
David Daney 69f16c9a86 MIPS: Hookup new syscalls sys_rt_tgsigqueueinfo and sys_perf_counter_open.
[Ralf: I fixed up the numbering in the comment in scall64-n32.S.]

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:24 +01:00
Dmitri Vorobiev d7e014db37 MIPS: Malta: Remove unnecessary function prototypes
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:24 +01:00
Joe Perches 52a7a27cd8 MIPS: MT: Remove unnecessary semicolons
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:23 +01:00
Florian Fainelli 7ca5dc145b MIPS: Add support for Texas Instruments AR7 System-on-a-Chip
This patch adds support for the Texas Instruments AR7 System-on-a-Chip.
It supports the TNETD7100, 7200 and 7300 versions of the SoC.

Signed-off-by: Matteo Croce <matteo@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Eugene Konev <ejka@openwrt.org>
Signed-off-by: Nicolas Thill <nico@openwrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:23 +01:00
Kyle McMartin 64daa4435a parisc: use generic atomic64 on 32-bit
Somewhat redundant since our atomic_t uses hashed-locks on 32-bit
anyway... Maybe we can clean those up to be generic too someday.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:13 +00:00
Kyle McMartin 2d4618dce6 parisc: perf: wire up sys_perf_counter_open
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:12 +00:00
Kyle McMartin abf1e11a0d parisc: add task_pt_regs macro
needed for perf_counters.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:11 +00:00
Kyle McMartin 538e23615f parisc: wire sys_perf_counter_open to sys_ni_syscall
Reserve a syscall slot for sys_perf_counter_open.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:11 +00:00
Kyle McMartin 0d56d1aa0e parisc: inventory.c, fix bloated stack frame
The pa_pdc_cell struct can be kmalloc'd, so do that
instead.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:11 +00:00
Kyle McMartin 64a0cdb026 parisc: processor.c, fix bloated stack frame
The pa_pdc_cell struct can be kmalloc'd, so do that instead.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:11 +00:00
Kyle McMartin 20dbc9f724 parisc: fix compile warning in mm/init.c
arch/parisc/mm/init.c: In function 'free_initmem':
381: warning: passing argument 1 of 'memset' makes pointer from integer without a cast

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:10 +00:00
Christoph Hellwig c3301ab4fb parisc: remove dead code from sys_parisc32.c
Unless I'm totally missing something get_fd_set32/set_fd_set32 are
completely unused.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:10 +00:00
Kyle McMartin 4435607e98 parisc: wire up rt_tgsigqueueinfo
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:10 +00:00
Helge Deller e82a3b7512 parisc: ensure broadcast tlb purge runs single threaded
The TLB flushing functions on hppa, which causes PxTLB broadcasts on the system
bus, needs to be protected by irq-safe spinlocks to avoid irq handlers to deadlock
the kernel. The deadlocks only happened during I/O intensive loads and triggered
pretty seldom, which is why this bug went so long unnoticed.

Signed-off-by: Helge Deller <deller@gmx.de>
[edited to use spin_lock_irqsave on UP as well since we'd been locking there
 all this time anyway, --kyle]
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:09 +00:00
Grant Grundler 84be31be37 parisc: fix "delay!" timer handling
Rewrote timer_interrupt() to properly handle the "delayed!" case.

If we used floating point math to compute the number of ticks that had
elapsed since the last timer interrupt, it could take up to 12K cycles
(emperical!) to handle the interrupt. Existing code assumed it would
never take more than 8k cycles. We end up programming Interval Timer
to a value less than "current" cycle counter.  Thus have to wait until
Interval Timer "wrapped" and would then get the "delayed!" printk that
I moved below.

Since we don't really know what the upper limit is, I prefer to read
CR16 again after we've programmed it to make sure we won't have to
wait for CR16 to wrap.

Further, the printk was between reading CR16 (cycle couner) and writing CR16
(the interval timer). This would cause us to continue to set the interval
timer to a value that was "behind" the cycle counter. Rinse and repeat.
So no printk's between reading CR16 and setting next interval timer.

Tested on A500 (550 Mhz PA8600).

Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Tested-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>

----
Kyle, Helge, and other parisc's,
Please test on 32-bit before committing.
I think I have it right but recognize I might not.

TODO: I wanted to use "do_div()" in order to get both remainder
and value back with one division op. That should help with the
latency alot but can be applied seperately from this patch.

thanks,
grant
2009-07-03 03:34:09 +00:00
Randolph Chung 87451d850c parisc: fix mismatched parenthesis in memcpy.c
>>>> I think this is what was intended? Note that this patch may affect
>>>> profiling.
>>> it really should be
>>>
>>> -    if (likely(t1 & (sizeof(unsigned int)-1)) == 0) {
>>> +    if (likely((t1 & (sizeof(unsigned int)-1)) == 0)) {
>>>
>>> randolph

Reported-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Randolph Chung <tausq@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:09 +00:00
Coly Li ebc30a0f67 parisc: add parameter to read_cr16()
This patch modifies parameter of au1x_counter1_read() from 'void' to 'struct
clocksource *cs', which fixes compile warning for incompatible parameter type.

Signed-off-by: Coly Li <coly.li@suse.de>
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:08 +00:00
Alexander Beregalov e9b2601073 parisc: decode_exc.c should include kernel.h
Fix this build error:
arch/parisc/math-emu/decode_exc.c:351: undefined reference to `printk'

Signed-off-by: Alexander Beregalov <a.beregalov@gmail.com>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:08 +00:00
Thomas Gleixner dfe0756502 parisc: remove obsolete hw_interrupt_type
The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have
been kept around for migration reasons.  After more than two years it's
time to remove them finally.

This patch cleans up one of the remaining users.  When all such patches
hit mainline we can remove the defines and typedefs finally.

Impact: cleanup

Convert the last remaining users to struct irq_chip and remove the
define.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:08 +00:00
Helge Deller 47b4150baa parisc: fix irq compile bugs in arch/parisc/kernel/irq.c
Fix miscompilation in arch/parisc/kernel/irq.c:
123: warning: passing arg 1 of `cpumask_setall' from incompatible pointer type
141: warning: passing arg 1 of `cpumask_copy' from incompatible pointer type
300: warning: passing arg 1 of `cpumask_copy' from incompatible pointer type
357: warning: passing arg 2 of `cpumask_copy' from incompatible pointer type

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:07 +00:00
Helge Deller 7d17e27631 parisc: fix ldcw inline assembler
There are two reasons to expose the memory *a in the asm:

1) To prevent the compiler from discarding a preceeding write to *a, and
2) to prevent it from caching *a in a register over the asm.

The change has had a few days testing with a SMP build of 2.6.22.19
running on a rp3440.

This patch is about the correctness of the __ldcw() macro itself.
The use of the macro should be confined to small inline functions
to try to limit the effect of clobbering memory on GCC's optimization
of loads and stores.

Signed-off-by: Dave Anglin <dave.anglin@nrc-cnrc.gc.ca>
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:07 +00:00
Kyle McMartin 4fb11781a0 parisc: kill WARN in free_initmem when DEBUG_KERNEL
Doing an IPI with local interrupts off triggers a warning. We
don't need to be quite so ridiculously paranoid. Also, clean up
a bit of the code a little.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:06 +00:00
Bastian Blank 692c14a593 parisc: Remove casts from atomic macros
The atomic operations on parisc are defined as macros. The macros
includes casts which disallows the use of some syntax elements and
produces error like this:

net/phonet/pep.c: In function 'pipe_rcv_status':
net/phonet/pep.c:262: error: lvalue required as left operand of assignment

The patch removes this superfluous casts.

Signed-off-by: Bastian Blank <waldi@debian.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:06 +00:00
Alexander Beregalov 071327ec90 parisc: remove CVS keywords
Signed-off-by: Alexander Beregalov <a.beregalov@gmail.com>
Acked-by: Matthew Wilcox <willy@linux.intel.com>
Acked-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:06 +00:00
Kyle McMartin 90eab5e09d parisc: wire up preadv/pwritev syscalls
Generic compat handlers look appropriate, so use those.

Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
2009-07-03 03:34:05 +00:00
Linus Torvalds 405d7ca515 Merge git://git.infradead.org/iommu-2.6
* git://git.infradead.org/iommu-2.6: (38 commits)
  intel-iommu: Don't keep freeing page zero in dma_pte_free_pagetable()
  intel-iommu: Introduce first_pte_in_page() to simplify PTE-setting loops
  intel-iommu: Use cmpxchg64_local() for setting PTEs
  intel-iommu: Warn about unmatched unmap requests
  intel-iommu: Kill superfluous mapping_lock
  intel-iommu: Ensure that PTE writes are 64-bit atomic, even on i386
  intel-iommu: Make iommu=pt work on i386 too
  intel-iommu: Performance improvement for dma_pte_free_pagetable()
  intel-iommu: Don't free too much in dma_pte_free_pagetable()
  intel-iommu: dump mappings but don't die on pte already set
  intel-iommu: Combine domain_pfn_mapping() and domain_sg_mapping()
  intel-iommu: Introduce domain_sg_mapping() to speed up intel_map_sg()
  intel-iommu: Simplify __intel_alloc_iova()
  intel-iommu: Performance improvement for domain_pfn_mapping()
  intel-iommu: Performance improvement for dma_pte_clear_range()
  intel-iommu: Clean up iommu_domain_identity_map()
  intel-iommu: Remove last use of PHYSICAL_PAGE_MASK, for reserving PCI BARs
  intel-iommu: Make iommu_flush_iotlb_psi() take pfn as argument
  intel-iommu: Change aligned_size() to aligned_nrpages()
  intel-iommu: Clean up intel_map_sg(), remove domain_page_mapping()
  ...
2009-07-02 16:51:09 -07:00
Yinghai Lu 7c5371c403 x86: add boundary check for 32bit res before expand e820 resource to alignment
fix hang with HIGHMEM_64G and 32bit resource.  According to hpa and
Linus, use (resource_size_t)-1 to fend off big ranges.

Analyzed by hpa

Reported-and-tested-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-02 12:11:12 -07:00
Linus Torvalds 43644679a1 x86: fix power-of-2 round_up/round_down macros
These macros had two bugs:
 - the type of the mask was not correctly expanded to the full size of
   the argument being expanded, resulting in possible loss of high bits
   when mixing types.
 - the alignment argument was evaluated twice, despite the macro looking
   like a fancy function (but it really does need to be a macro, since
   it works on arbitrary integer types)

Noticed by Peter Anvin, and with a fix that is a modification of his
suggestion (bug noticed by Yinghai Lu).

Cc: Peter Anvin <hpa@zytor.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-02 12:05:10 -07:00
David Howells 42ca4fb691 FRV: Add basic performance counter support
Add basic performance counter support to the FRV arch.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-01 19:38:31 -07:00
David Howells 00460f41ff FRV: Implement atomic64_t
Implement atomic64_t and its ops for FRV.  Tested with the following patch:

	diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c
	index 55e4fab..086d50d 100644
	--- a/arch/frv/kernel/setup.c
	+++ b/arch/frv/kernel/setup.c
	@@ -746,6 +746,52 @@ static void __init parse_cmdline_early(char *cmdline)

	 } /* end parse_cmdline_early() */

	+static atomic64_t xxx;
	+
	+static void test_atomic64(void)
	+{
	+	atomic64_set(&xxx, 0x12300000023LL);
	+
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0x12300000023LL);
	+	mb();
	+	if (atomic64_inc_return(&xxx) != 0x12300000024LL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0x12300000024LL);
	+	mb();
	+	if (atomic64_sub_return(0x36900000050LL, &xxx) != -0x2460000002cLL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != -0x2460000002cLL);
	+	mb();
	+	if (atomic64_dec_return(&xxx) != -0x2460000002dLL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != -0x2460000002dLL);
	+	mb();
	+	if (atomic64_add_return(0x36800000001LL, &xxx) != 0x121ffffffd4LL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0x121ffffffd4LL);
	+	mb();
	+	if (atomic64_cmpxchg(&xxx, 0x123456789abcdefLL, 0x121ffffffd4LL) != 0x121ffffffd4LL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0x121ffffffd4LL);
	+	mb();
	+	if (atomic64_cmpxchg(&xxx, 0x121ffffffd4LL, 0x123456789abcdefLL) != 0x121ffffffd4LL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0x123456789abcdefLL);
	+	mb();
	+	if (atomic64_xchg(&xxx, 0xabcdef123456789LL) != 0x123456789abcdefLL)
	+		BUG();
	+	mb();
	+	BUG_ON(atomic64_read(&xxx) != 0xabcdef123456789LL);
	+	mb();
	+}
	+
	 /*****************************************************************************/
	 /*
	  *
	@@ -845,6 +891,8 @@ void __init setup_arch(char **cmdline_p)
	 //	asm volatile("movgs %0,timerd" :: "r"(10000000));
	 //	__set_HSR(0, __get_HSR(0) | HSR0_ETMD);

	+	test_atomic64();
	+
	 } /* end setup_arch() */

	 #if 0

Note that this doesn't cover all the trivial wrappers, but does cover all the
substantial implementations.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-01 19:38:09 -07:00