Commit Graph

68 Commits

Author SHA1 Message Date
Amitoj Kaur Chawla 151b8c5ba1 pinctrl: sirf: atlas7: Add missing of_node_put
of_find_node_by_name does an of_node_get on its return value,
so an of_node_put is needed on this value before the corresponding
variable goes out of scope.

The Coccinelle semantic patch used to make this change is as follows:
@@
struct device_node *n;
struct device_node *n1;
statement S;
identifier f;
expression E;
constant C;
@@

n = of_find_node_by_name(...)
...
if (!n) S
... when != of_node_put(n)
    when != n1 = f(n,...)
    when != E = n
    when any
    when strict
(
+ of_node_put(n);
  return -C;
|
  of_node_put(n);
|
  n1 = f(n,...)
|
  E = n
|
  return ...;
)

Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-29 10:07:59 +02:00
Colin Ian King 5e0ec14e2f pinctrl: sirf/atlas7: fix printk spelling
fix spelling mistake, flaged -> flagged

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-04-28 10:47:50 +02:00
Linus Walleij 4e6fd26dcf pinctrl: sirf/atlas7: stop poking around in GPIO internals
This code is poking around in the gpio_chip:s internal structures
to achieve some kind of pin to GPIO mappings.

- It is wrong to poke around in these structs and the pinctrl
  maintainer was stupid to let it pass unnoticed, mea culpa.

- The right interface to use is gpiochip_add_pin_range()

- The code appears unused: the pin control part of the driver
  is not adding any ranges, so we're iterating over an empty
  list. Maybe it is poking around in some other pin controllers
  GPIO ranges, and that's just totally wrong, again use
  gpiochip_add_pin_range() and specify the right pin
  controller.

Cc: Barry Song <baohua@kernel.org>
Cc: Guoying Zhang <Guoying.Zhang@csr.com>
Cc: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16 00:19:54 +01:00
Linus Torvalds 58cf279aca GPIO bulk updates for the v4.5 kernel cycle:
Infrastructural changes:
 
 - In struct gpio_chip, rename the .dev node to .parent to better reflect
   the fact that this is not the GPIO struct device abstraction. We will
   add that soon so this would be totallt confusing.
 
 - It was noted that the driver .get_value() callbacks was
   sometimes reporting negative -ERR values to the gpiolib core, expecting
   them to be propagated to consumer gpiod_get_value() and gpio_get_value()
   calls. This was not happening, so as there was a mess of drivers
   returning negative errors and some returning "anything else than zero"
   to indicate that a line was active. As some would have bit 31 set to
   indicate "line active" it clashed with negative error codes. This is
   fixed by the largeish series clamping values in all drivers with
   !!value to [0,1] and then augmenting the code to propagate error codes
   to consumers. (Includes some ACKed patches in other subsystems.)
 
 - Add a void *data pointer to struct gpio_chip. The container_of() design
   pattern is indeed very nice, but we want to reform the struct gpio_chip
   to be a non-volative, stateless business, and keep states internal to
   the gpiolib to be able to hold on to the state when adding a proper
   userspace ABI (character device) further down the road. To achieve this,
   drivers need a handle at the internal state that is not dependent on
   their struct gpio_chip() so we add gpiochip_add_data() and
   gpiochip_get_data() following the pattern of many other subsystems.
   All the "use gpiochip data pointer" patches transforms drivers to this
   scheme.
 
 - The Generic GPIO chip header has been merged into the general
   <linux/gpio/driver.h> header, and the custom header for that removed.
   Instead of having a separate mm_gpio_chip struct for these generic
   drivers, merge that into struct gpio_chip, simplifying the code and
   removing the need for separate and confusing includes.
 
 Misc improvements:
 
 - Stabilize the way GPIOs are looked up from the ACPI legacy
   specification.
 
 - Incremental driver features for PXA, PCA953X, Lantiq (patches from the
   OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
 
 New drivers:
 
 - Add a GPIO chip to the ALSA SoC AC97 driver.
 
 - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but
   the branch is merged here too to account for infrastructural changes).
 
 - The sx150x driver now supports the sx1502.
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Merge tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "Here is the bulk of GPIO changes for v4.5.

  Notably there are big refactorings mostly by myself, aimed at getting
  the gpio_chip into a shape that makes me believe I can proceed to
  preserve state for a proper userspace ABI (character device) that has
  already been proposed once, but resulted in the feedback that I need
  to go back and restructure stuff.  So I've been restructuring stuff.
  On the way I ran into brokenness (return code from the get_value()
  callback) and had to fix it.  Also, refactored generic GPIO to be
  simpler.

  Some of that is still waiting to trickle down from the subsystems all
  over the kernel that provide random gpio_chips, I've touched every
  single GPIO driver in the kernel now, oh man I didn't know I was
  responsible for so much...

  Apart from that we're churning along as usual.

  I took some effort to test and retest so it should merge nicely and we
  shook out a couple of bugs in -next.

  Infrastructural changes:

   - In struct gpio_chip, rename the .dev node to .parent to better
     reflect the fact that this is not the GPIO struct device
     abstraction.  We will add that soon so this would be totallt
     confusing.

   - It was noted that the driver .get_value() callbacks was sometimes
     reporting negative -ERR values to the gpiolib core, expecting them
     to be propagated to consumer gpiod_get_value() and gpio_get_value()
     calls.  This was not happening, so as there was a mess of drivers
     returning negative errors and some returning "anything else than
     zero" to indicate that a line was active.  As some would have bit
     31 set to indicate "line active" it clashed with negative error
     codes.  This is fixed by the largeish series clamping values in all
     drivers with !!value to [0,1] and then augmenting the code to
     propagate error codes to consumers.  (Includes some ACKed patches
     in other subsystems.)

   - Add a void *data pointer to struct gpio_chip.  The container_of()
     design pattern is indeed very nice, but we want to reform the
     struct gpio_chip to be a non-volative, stateless business, and keep
     states internal to the gpiolib to be able to hold on to the state
     when adding a proper userspace ABI (character device) further down
     the road.  To achieve this, drivers need a handle at the internal
     state that is not dependent on their struct gpio_chip() so we add
     gpiochip_add_data() and gpiochip_get_data() following the pattern
     of many other subsystems.  All the "use gpiochip data pointer"
     patches transforms drivers to this scheme.

   - The Generic GPIO chip header has been merged into the general
     <linux/gpio/driver.h> header, and the custom header for that
     removed.  Instead of having a separate mm_gpio_chip struct for
     these generic drivers, merge that into struct gpio_chip,
     simplifying the code and removing the need for separate and
     confusing includes.

  Misc improvements:

   - Stabilize the way GPIOs are looked up from the ACPI legacy
     specification.

   - Incremental driver features for PXA, PCA953X, Lantiq (patches from
     the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48

  New drivers:

   - Add a GPIO chip to the ALSA SoC AC97 driver.

   - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir,
     but the branch is merged here too to account for infrastructural
     changes).

   - The sx150x driver now supports the sx1502"

* tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits)
  gpio: generic: make bgpio_pdata always visible
  gpiolib: fix chip order in gpio list
  gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs()
  gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs()
  gpio: brcmstb: Allow building driver for BMIPS_GENERIC
  gpio: brcmstb: Set endian flags for big-endian MIPS
  gpio: moxart: fix build regression
  gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs()
  leds: pca9532: use gpiochip data pointer
  leds: tca6507: use gpiochip data pointer
  hid: cp2112: use gpiochip data pointer
  bcma: gpio: use gpiochip data pointer
  avr32: gpio: use gpiochip data pointer
  video: fbdev: via: use gpiochip data pointer
  gpio: pch: Optimize pch_gpio_get()
  Revert "pinctrl: lantiq: Implement gpio_chip.to_irq"
  pinctrl: nsp-gpio: use gpiochip data pointer
  pinctrl: vt8500-wmt: use gpiochip data pointer
  pinctrl: exynos5440: use gpiochip data pointer
  pinctrl: at91-pio4: use gpiochip data pointer
  ...
2016-01-17 12:32:01 -08:00
Linus Walleij 192d3507e2 pinctrl: sirf: use gpiochip data pointer
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().

Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-05 14:15:05 +01:00
Linus Walleij 9420023a53 pinctrl: sirf-atlas7: use gpiochip data pointer
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().

Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-05 14:15:05 +01:00
Julia Lawall 2d98023c16 pinctrl: sirf: add missing of_node_put
for_each_child_of_node performs an of_node_get on each iteration, so a
return from the loop requires an of_node_put.

A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):

// <smpl>
@@
local idexpression n;
expression e,e1;
@@

 for_each_child_of_node(e1,n) {
   ...
(
   of_node_put(n);
|
   e = n
|
   return n;
|
+  of_node_put(n);
?  return ...;
)
   ...
 }
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-22 13:44:56 +01:00
Guoying Zhang df8801a073 pinctrl: atlas7: add pulse conter pin group without direction pin
DR needs use the pulse counter direction pin as common gpio
function.

Signed-off-by: Guoying Zhang <Guoying.Zhang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10 16:23:50 +01:00
Wei Chen 5238bba81f pinctrl: atlas7: adjust vip pin groups for atlas7
The vip low 8bit mode and vip high 8 bit mode pin groups had missed
3 pins:vip_vsync, vip_hsync and vip_pxclk. Without these 3 pins, the
vip could not work properly.
Now we add these 3 pins into these two pin groups.

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10 16:23:03 +01:00
Wei Chen d166629cdf pinctrl: atlas7: adjust pin groups of atlas7 nanddisk
Remove write-protect and chip-selector pins from nand pin group.
And then create two separate pin groups for these two pin.

So the nand driver can choose correct pin groups as board desgin:
For example:
1. nand without wp&cs:
	nand@17050000 {
		pinctrl-0 = <&nd_df_basic_pmx>;
	};
2. nand with wp
        nand@17050000 {
                pinctrl-0 = <&nd_df_basic_pmx &nd_df_wp_pmx>;
        };
3. nand with cs:
        nand@17050000 {
                pinctrl-0 = <&nd_df_basic_pmx &nd_df_cs_pmx>;
        };
4. nand with wp&cs:
        nand@17050000 {
                pinctrl-0 = <&nd_df_basic_pmx &nd_df_wp_pmx &nd_df_cs_pmx>;
        };

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10 16:22:11 +01:00
Yonghui Zhang 6d985333a1 pinctrl: altas7: add sd9 function mux support
The sd9 pin mux with sd3 and it is selected by SYS2PCI_SDIO9SEL.
This makes the codes ugly since the register is not in pinctrl
module.

Signed-off-by: Yonghui Zhang <yonghui.zhang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10 16:21:14 +01:00
Wei Chen 80d71b616d pinctrl: atlas7: add cs line for atlas7 nand
The nand in atlas7 has two chip select line. But in most time, the
nand only has one chip, so only one chip select line is enough.
The nand driver select this new pin group can free one chip select
line for other modules to avoid pin conflict.

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10 16:20:50 +01:00
Linus Walleij 58383c7842 gpio: change member .dev to .parent
The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.

This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:

@@
struct gpio_chip *var;
@@
-var->dev
+var->parent

and:

@@
struct gpio_chip var;
@@
-var.dev
+var.parent

and:

@@
struct bgpio_chip *var;
@@
-var->gc.dev
+var->gc.parent

Plus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.

This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.

Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Jiri Kosina <jkosina@suse.cz>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-19 09:24:35 +01:00
Wei Chen 3fa508cd23 pinctrl: atlas7: support atlas7 step B changes
The the pin groups and pin functions have been changed
in atlas7 step B soc. We have to update the driver
to support step B chip.

Changes:
1. add 5 jtag pins to IOC_TOP:
	"jtag_tdo", "jtag_tms","jtag_tck", "jtag_tdi", "jtag_trstn"
	these 5 pins can be mutiplex with other functions, so we
	have to conver these 5 pins in pinmux.
2. add pin groups for audio digmic, audio spdif, can transceiver
	en, can transceiver stb, i2s0, i2s1 and jtag.
3. serval pins can be located to more PADs:
	audio_uart0_urfs, audio_uart1_urfs, audio_uart2_urfs,
	audio_uart2_urxd, audio_uart2_usclk, audio_uart2_utfs,
	audio_uart2_utxd, can0_rxd, can0_txd, can1_rxd, can1_txd
	jtag_ntrst, jtag_swdiotms, jtag_tck, jtag_tdi, jtag_tdo,
	pw_cko0, pw_cko1, pw_i2s01, pw_pwm0, pw_pwm1, sd2_cdb,
	sd2_wpb, uart2_cts, uart2_rts, uart2_rxd, uart2_txd,
	uart3_cts, uart3_rts, uart3_rxd, uart3_txd, uart4_cts,
	uart4_rts, usb0_drvvbus, usb1_drvvbus.

Because of Changes#3, some functions should have more than one
pin groups. So we have to split the original pin group to serval
pin groups.

For example:
audio_uart0 has 5 pins, on STEPA, each of these 5 pins only has
one related PAD. But on STEPB, audio_uart0_urfs has 4 related
PAD.
So we place the 4 pins with one PAD into a single pin group:
	audio_uart0_basic_group.
and place urfs pin wtih different PADs to 4 different pin groups:
	audio_uart0_urfs_group0, ..., audio_uart0_urfs_group3

A full audio_uart0 pin group can be:
	pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group0>;
If audio_uart0 pin group encountered some confiction, we only have
to change the urfs group:
	pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group2>;

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16 21:56:07 +02:00
Thomas Gleixner bd0b9ac405 genirq: Remove irq argument from irq flow handlers
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-16 15:47:51 +02:00
Wei Chen 627b1516a3 pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
To set/get atlas7 pull & drive strength, we use lots of if/else
to check pad type. But except mask value or immediate value, all
actions in these conditional branches are the same.
So we use predefined pull info table and drive strength table
to reduce these redundancy code.

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 14:37:21 +02:00
Wei Chen 48356aa79c pinctrl: sirf: add power management support for atlas7
We had not implemented the pm interface of atlas7 pinctrl
and gpio drivers. So when system resumes from sleep, all
pin configuration and gpio status will be lost.

Now, we implement these interfaces to support pm.

At the same time, this patch also drops a lot of if-else
by look-up table for getting and setting pull.

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28 14:09:59 +02:00
Thomas Gleixner 3b0d1561ea pinctrl/sirf: Prepare xxx_gpio-handle_irq for irq argument removal
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.

Search and update was done with coccinelle and the invaluable help of
Julia Lawall.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
2015-07-17 21:56:22 +02:00
Jiang Liu 5663bb27de pinctrl: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-17 21:56:20 +02:00
Krzysztof Kozlowski e3f3aaac06 pinctrl: sirf: Drop owner assignment from platform_driver
platform_driver does not need to set an owner because
platform_driver_register() will set it.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 15:15:12 +02:00
Masahiro Yamada 323de9efdf pinctrl: make pinctrl_register() return proper error code
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:49:52 +02:00
Fabio Estevam 3944e7b78c pinctrl: Remove .owner field
platform_driver does not need to set the owner field, as it will be
populated by the driver core, so just remove it.

The semantic patch that makes this change is available
in scripts/coccinelle/api/platform_no_drv_owner.cocci.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-04 10:12:42 +02:00
Wei Chen f936779329 pinctrl: sirf: add sirf atlas7 pinctrl and gpio support
The Pinctrl module (ioc) controls the Pad's function select
(each pad can have 8 functions), Pad's Drive Strength, Pad's
Pull Select and Pad's Input Disable status.

The ioc has two modules, ioc_top & ioc_rtc. Both of these two
modules have function select/clear, Pull select and Drive
Strength registers. But only ioc_rtc has input-disable
registers. The Pads on ioc_top have to access ioc_rtc to set
their input-disable status and intpu-disable-value.

So have to use one ioc driver instance to drive these two
ioc modules at the same time, and each ioc module will be
treat as one bank on the "IOC Device".

The GPIO Controller controls the GPIO status if the Pad has
been config as GPIO by Pinctrl already. Includes the GPIO
Input/output, Interrupt type, Interrupt Status, and Set/Get
Values.
The GPIO pull up/down are controlled by Pinctrl.

There are 7 GPIO Groups and splited into 3 MACROs in atlas7.
The GPIO Groups in one MACRO share one GPIO controllers, each
GPIO Group are treated as one GPIO bank.

For example:
In VDIFM macro, there is one GPIO Controller, it has 3 banks
to control 3 gpio groups. Its gpio name space is from 0 to 95.

The Device Tree can be written as following:

gpio-ranges = <&pinctrl 0 0 0>,
<&pinctrl 32 0 0>,
<&pinctrl 64 0 0>;

gpio-ranges-group-names = "gnss_gpio_grp",
"lcd_vip_gpio_grp",
"sdio_i2s_gpio_grp";

bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp".
bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp".
bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp".

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19 16:01:30 +02:00
Linus Walleij 1dfe0d159d pinctrl: sirf: move sgpio lock into state container
Instead of referring to a global static variable for the sgpio
locking, use the state container to contain the lock.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-09 10:16:13 +02:00
Colin Ian King 28b30c306a pinctrl: sirf: fix typo in kernel warning on a bad interrupt
Fix typo, "flaged" -> "flagged"

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-09 18:10:59 +01:00
Barry Song a17272a46c pinctrl: sirf: drop marco support
marco chip has been dropped, clear its support.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:54 +01:00
Wolfram Sang 66d0f85f10 pinctrl: sirf: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:21:24 +02:00
Linus Torvalds ea584595fc This is the bulk of GPIO changes for the v3.18 development
cycle:
 
 - Increase the default ARCH_NR_GPIO from 256 to 512. This
   was done to avoid having a custom <asm/gpio.h> header for
   the x86 architecture - GPIO is custom and complicated
   enough as it is already! We want to move to a radix to
   store the descriptors going forward, and finally get rid
   of this fixed array size altogether.
 
 - Endgame patching of the gpio_remove() semantics initiated
   by Abdoulaye Berthe. It is not accepted by the system that
   the removal of a GPIO chip fails during e.g. reboot or
   shutdown, and therefore the return value has now painfully
   been refactored away. For special cases like GPIO expanders
   on a hot-pluggable bus like USB, we may later add some
   gpiochip_try_remove() call, but for the cases we have now,
   return values are moot.
 
 - Some incremental refactoring of the gpiolib core and ACPI
   GPIO library for more descriptor usage.
 
 - Refactor the chained IRQ handler set-up method to handle
   also threaded, nested interrupts and set up the parent IRQ
   correctly. Switch STMPE and TC3589x drivers to use this
   registration method.
 
 - Add a .irq_not_threaded flag to the struct gpio_chip, so
   that also GPIO expanders that block but are still not
   using threaded IRQ handlers.
 
 - New drivers for the ARM64 X-Gene SoC GPIO controller.
 
 - The syscon GPIO driver has been improved to handle the
   "DSP GPIO" found on the TI Keystone 2 SoC:s.
 
 - ADNP driver switched to use gpiolib irqchip helpers.
 
 - Refactor the DWAPB driver to support being instantiated
   from and MFD cell (platform device).
 
 - Incremental feature improvement in the Zynq, MCP23S08,
   DWAPB, OMAP, Xilinx and Crystalcove drivers.
 
 - Various minor fixes.
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Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO changes from Linus Walleij:
 "This is the bulk of GPIO changes for the v3.18 development cycle:

   - Increase the default ARCH_NR_GPIO from 256 to 512.  This was done
     to avoid having a custom <asm/gpio.h> header for the x86
     architecture - GPIO is custom and complicated enough as it is
     already! We want to move to a radix to store the descriptors going
     forward, and finally get rid of this fixed array size altogether.

   - Endgame patching of the gpio_remove() semantics initiated by
     Abdoulaye Berthe.  It is not accepted by the system that the
     removal of a GPIO chip fails during eg reboot or shutdown, and
     therefore the return value has now painfully been refactored away.
     For special cases like GPIO expanders on a hot-pluggable bus like
     USB, we may later add some gpiochip_try_remove() call, but for the
     cases we have now, return values are moot.

   - Some incremental refactoring of the gpiolib core and ACPI GPIO
     library for more descriptor usage.

   - Refactor the chained IRQ handler set-up method to handle also
     threaded, nested interrupts and set up the parent IRQ correctly.
     Switch STMPE and TC3589x drivers to use this registration method.

   - Add a .irq_not_threaded flag to the struct gpio_chip, so that also
     GPIO expanders that block but are still not using threaded IRQ
     handlers.

   - New drivers for the ARM64 X-Gene SoC GPIO controller.

   - The syscon GPIO driver has been improved to handle the "DSP GPIO"
     found on the TI Keystone 2 SoC:s.

   - ADNP driver switched to use gpiolib irqchip helpers.

   - Refactor the DWAPB driver to support being instantiated from and
     MFD cell (platform device).

   - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP,
     Xilinx and Crystalcove drivers.

   - Various minor fixes"

* tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits)
  gpio: pch: Build context save/restore only for PM
  pinctrl: abx500: get rid of unused variable
  gpio: ks8695: fix 'else should follow close brace '}''
  gpio: stmpe: add verbose debug code
  gpio: stmpe: fix up interrupt enable logic
  gpio: staticize xway_stp_init()
  gpio: handle also nested irqchips in the chained handler set-up
  gpio: set parent irq on chained handlers
  gpiolib: irqchip: use irq_find_mapping while removing irqchip
  gpio: crystalcove: support virtual GPIO
  pinctrl: bcm281xx: make Kconfig dependency more strict
  gpio: kona: enable only on BCM_MOBILE or for compile testing
  gpio, bcm-kona, LLVMLinux: Remove use of __initconst
  gpio: Fix ngpio in gpio-xilinx driver
  gpio: dwapb: fix pointer to integer cast
  gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard
  gpio: xgene: Remove unneeded forward declation for struct xgene_gpio
  gpio: xgene: Fix missing spin_lock_init()
  gpio: ks8695: fix switch case indentation
  gpiolib: add irq_not_threaded flag to gpio_chip
  ...
2014-10-09 14:58:15 -04:00
Linus Walleij 2fcea6cecb pinctrl: remove remaining users of gpiochip_remove() retval
Some drivers accidentally still use the return value from
gpiochip_remove(). Get rid of them so we can simplify this function
and get rid of the return value.

Cc: Abdoulaye Berthe <berthe.ab@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23 17:51:12 +02:00
Rongjun Ying c4edb11680 pinctrl: prima2: add I2S 2ch, 6ch, nodin, mclk groups
we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we
do same things for prima2.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04 19:07:19 +02:00
Pramod Gurav 0a5d667048 pinctrl: sirf: Remove gpiochip on failure cases
This patch releases gpiochip related resources by calling
gpiochip_remove when gpiochip_irqchip_add fails.

CC: Linus Walleij <linus.walleij@linaro.org>
CC: Barry Song <Baohua.Song@csr.com>
CC: Rongjun Ying <rongjun.ying@csr.com>
CC: Yuping Luo <yuping.luo@csr.com>
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04 18:46:39 +02:00
Linus Walleij 03e9f0cac5 pinctrl: clean up after enable refactoring
commit 2243a87d90
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Fan Wu <fwu@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04 10:05:07 +02:00
Rongjun Ying 086b8904b4 pinctrl: atlas6: Add I2S external clock input pingroup
The I2S controller can use the external clock as reference clock with
master mode. But based on different hardware or software design, this
external clock might be needed or not needed.
So the external input pin can be an independent pinctrl group, and the
card driver can decice to get it or not.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 08:42:13 +02:00
Rongjun Ying ed36c1a06f pinctrl: atlas6: take mclk pin out of i2s pingroup
The I2S controller can output mclk to external audio codec. But by
hardware design, some codecs need mclk and some codecs do not need
mclk. So the mclk pin can be an independent pinctrl group, and the
card driver can get it or not based on boards.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 08:40:12 +02:00
Bin Shi c09f80db58 pinctrl: sirf: fix lots of "line over 80 characters"
According to key customer's requirement, fix "line over 80
characters".

Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 08:38:37 +02:00
Bin Shi 4bee325cd9 pinctrl: sirf: fix "quoted string split across lines"
this patch fixes:
WARNING: quoted string split across lines
902: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:902:
+MODULE_AUTHOR("Rongjun Ying <rongjun.ying@csr.com>, "
+	"Yuping Luo <yuping.luo@csr.com>, "

WARNING: quoted string split across lines
903: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:903:
+	"Yuping Luo <yuping.luo@csr.com>, "
+	"Barry Song <baohua.song@csr.com>");

Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 08:37:40 +02:00
Fan Wu 2243a87d90 pinctrl: avoid duplicated calling enable_pinmux_setting for a pin
What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
  each time pinctrl_select_state is called
2. Remove the HW disable operation in pinmux_disable_setting function.
3. Remove the disable ops in struct pinmux_ops
4. Remove all the disable ops users in current code base.

Notes:
1. Great thanks for the suggestion from Linus, Tony Lindgren and
   Stephen Warren and Everyone that shared comments on this patch.
2. The patch also includes comment fixes from Stephen Warren.

The reason why we do this:
1. To avoid duplicated calling of the enable_setting operation
   without disabling operation inbetween which will let the pin
   descriptor desc->mux_usecount increase monotonously.
2. The HW pin disable operation is not useful for any of the
   existing platforms.
   And this can be used to avoid the HW glitch after using the
   item #1 modification.

In the following case, the issue can be reproduced:
1. There is a driver that need to switch pin state dynamically,
   e.g. between "sleep" and "default" state
2. The pin setting configuration in a DTS node may be like this:

  component a {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&a_grp_setting &c_grp_setting>;
	pinctrl-1 = <&b_grp_setting &c_grp_setting>;
  }

  The "c_grp_setting" config node is totally identical, maybe like
  following one:

  c_grp_setting: c_grp_setting {
	pinctrl-single,pins = <GPIO48 AF6>;
  }

3. When switching the pin state in the following official pinctrl
   sequence:
	pin = pinctrl_get();
	state = pinctrl_lookup_state(wanted_state);
	pinctrl_select_state(state);
	pinctrl_put();

Test Result:
1. The switch is completed as expected, that is: the device's
   pin configuration is changed according to the description in the
   "wanted_state" group setting
2. The "desc->mux_usecount" of the corresponding pins in "c_group"
   is increased without being decreased, because the "desc" is for
   each physical pin while the setting is for each setting node
   in the DTS.
   Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
   of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount
   will keep increasing without any chance to be decreased.

According to the comments in the original code, only the setting,
in old state but not in new state, will be "disabled" (calling
pinmux_disable_setting), which is correct logic but not intact. We
still need consider case that the setting is in both old state
and new state. We can do this in the following two ways:

1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
   setting" repeatedly
2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
   actually two setting instances, ahead of enabling them.

Analysis:
1. The solution #2 is better because it can avoid too much
   iteration.
2. If we disable all of the settings in the old state and one of
   the setting(s) exist in the new state, the pins mux function
   change may happen when some SoC vendors defined the
   "pinctrl-single,function-off"
   in their DTS file.
   old_setting => disabled_setting => new_setting.
3. In the pinmux framework, when a pin state is switched, the
   setting in the old state should be marked as "disabled".

Conclusion:
1. To Remove the HW disabling operation to above the glitch mentioned
   above.
2. Handle the issue mentioned above by disabling all of the settings
   in old state and then enable the all of the settings in new state.

Signed-off-by: Fan Wu <fwu@marvell.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-07-11 14:08:26 +02:00
Linus Walleij 29c7f1f53b pinctrl: sirf: fix a bad conflict resolution
Commit 294d1351ff
"pinctrl: sirf: switch to using allocated state container"
caused a build conflict due to a bad conflict resolution
when cherry-picking the patch. Fix it up.

Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-30 09:52:43 +02:00
Linus Walleij 294d1351ff pinctrl: sirf: switch to using allocated state container
This rewrites the SIRF pinctrl driver to allocate a state container
for the GPIO chip, just as is done for the pin controller, and
use the gpiochip_add_pin_range() to add the range from the gpiochip
side rather than adding the range from the pinctrl side.

All resulting changes are done in order to pass around a state
container rather than refer to a static global object.

Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-28 10:42:04 +02:00
Barry Song 648e42e140 pinctrl: sirf: fix typo for GPIO bank number
The patch 7420d2d09b12: "pinctrl: sirf: switch driver to use gpiolib
irqchip helpers" from Apr 15, 2014, leads to the following static
checker warning:

      drivers/pinctrl/sirf/pinctrl-sirf.c:578 sirfsoc_gpio_handle_irq()
      warn: buffer overflow 'sgpio_chip.sgpio_bank' 5 <= 31

Cc: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-27 15:25:05 +02:00
Linus Walleij 7420d2d09b pinctrl: sirf: switch driver to use gpiolib irqchip helpers
This switches the SiRF pinctrl driver over to using the gpiolib
irqchip helpers simplifying some of the code.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-23 22:02:54 +02:00
Barry Song c5eb757ca8 pinctrl: sirf: wrap all gpio banks into one gpio_chip
all gpio banks are in one chip, that makes software clean in mapping
irq and gpio.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-23 22:01:31 +02:00
Linus Walleij aef95b691f pinctrl: sirf: rename inlined accessor
The sirfsoc_irqchip_to_bank() is obviously misnamed, as it is
not converting an irqchip to a bank but converts a gpiochip
to a bank so rename it sirfsoc_gpiochip_to_bank().

Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-23 22:01:17 +02:00
Linus Torvalds 154d6f18a4 This is the bulk of GPIO changes for v3.15:
- Merged in a branch of irqchip changes from Thomas
   Gleixner: we need to have new callbacks from the
   irqchip to determine if the GPIO line will be eligible
   for IRQs, and this callback must be able to say "no".
   After some thinking I got the branch from tglx and
   have switched all current users over to use this.
 
 - Based on tglx patches, we have added some generic
   irqchip helpers in the gpiolib core. These will
   help centralize code when GPIO drivers have simple
   chained/cascaded IRQs. Drivers will still define
   their irqchip vtables, but the gpiolib core will
   take care of irqdomain set-up, mapping from local
   offsets to Linux irqs, and reserve resources by
   marking the GPIO lines for IRQs.
 
 - Initially the PL061 and Nomadik GPIO/pin control
   drivers have been switched over to use the new
   gpiochip-to-irqchip infrastructure with more
   drivers expected for the next kernel cycle. The
   factoring of just two drivers still makes it worth
   it so it is already a win.
 
 - A new driver for the Synopsys DesignWare APB GPIO
   block.
 
 - Modify the DaVinci GPIO driver to be reusable also
   for the new TI Keystone architecture.
 
 - A new driver for the LSI ZEVIO SoCs.
 
 - Delete the obsolte tnetv107x driver.
 
 - Some incremental work on GPIO descriptors: have
   gpiod_direction_output() use a logical level,
   respecting assertion polarity through ACTIVE_LOW
   flags, adding gpiod_direction_output_raw() for the
   case where you want to set that very value. Add
   gpiochip_get_desc() to fetch a GPIO descriptor from
   a specific offset on a certain chip inside driver
   code.
 
 - Switch ACPI GPIO code over to using
   gpiochip_get_desc() and get rid of gpio_to_desc().
 
 - The ACPI GPIO event handling code has been reworked
   after encountering an actual real life implementation.
 
 - Support for ACPI GPIO operation regions.
 
 - Generic GPIO chips can now be assigned labels/names
   from platform data.
 
 - We now clamp values returned from GPIO drivers to
   the boolean [0,1] range.
 
 - Some improved documentation on how to use the polarity
   flag was added.
 
 - The a large slew of incremental driver updates and
   non-critical fixes. Some targeted for stable.
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Merge tag 'gpio-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull bulk of gpio updates from Linus Walleij:
 "A pretty big chunk of changes this time, but it has all been on
  rotation in linux-next and had some testing.  Of course there will be
  some amount of fixes on top...

   - Merged in a branch of irqchip changes from Thomas Gleixner: we need
     to have new callbacks from the irqchip to determine if the GPIO
     line will be eligible for IRQs, and this callback must be able to
     say "no".  After some thinking I got the branch from tglx and have
     switched all current users over to use this.

   - Based on tglx patches, we have added some generic irqchip helpers
     in the gpiolib core.  These will help centralize code when GPIO
     drivers have simple chained/cascaded IRQs.  Drivers will still
     define their irqchip vtables, but the gpiolib core will take care
     of irqdomain set-up, mapping from local offsets to Linux irqs, and
     reserve resources by marking the GPIO lines for IRQs.

   - Initially the PL061 and Nomadik GPIO/pin control drivers have been
     switched over to use the new gpiochip-to-irqchip infrastructure
     with more drivers expected for the next kernel cycle.  The
     factoring of just two drivers still makes it worth it so it is
     already a win.

   - A new driver for the Synopsys DesignWare APB GPIO block.

   - Modify the DaVinci GPIO driver to be reusable also for the new TI
     Keystone architecture.

   - A new driver for the LSI ZEVIO SoCs.

   - Delete the obsolte tnetv107x driver.

   - Some incremental work on GPIO descriptors: have
     gpiod_direction_output() use a logical level, respecting assertion
     polarity through ACTIVE_LOW flags, adding gpiod_direction_output_raw()
     for the case where you want to set that very value.  Add
     gpiochip_get_desc() to fetch a GPIO descriptor from a specific
     offset on a certain chip inside driver code.

   - Switch ACPI GPIO code over to using gpiochip_get_desc() and get rid
     of gpio_to_desc().

   - The ACPI GPIO event handling code has been reworked after
     encountering an actual real life implementation.

   - Support for ACPI GPIO operation regions.

   - Generic GPIO chips can now be assigned labels/names from platform
     data.

   - We now clamp values returned from GPIO drivers to the boolean [0,1]
     range.

   - Some improved documentation on how to use the polarity flag was
     added.

   - a large slew of incremental driver updates and non-critical fixes.
     Some targeted for stable"

* tag 'gpio-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (80 commits)
  gpio: rcar: Add helper variable dev = &pdev->dev
  gpio-lynxpoint: force gpio_get() to return "1" and "0" only
  gpio: unmap gpio irqs properly
  pch_gpio: set value before enabling output direction
  gpio: moxart: Actually set output state in moxart_gpio_direction_output()
  gpio: moxart: Avoid forward declaration
  gpio: mxs: Allow for recursive enable_irq_wake() call
  gpio: samsung: Add missing "break" statement
  gpio: twl4030: Remove redundant assignment
  gpio: dwapb: correct gpio-cells in binding document
  gpio: iop: fix devm_ioremap_resource() return value checking
  pinctrl: coh901: convert driver to use gpiolib irqchip
  pinctrl: nomadik: convert driver to use gpiolib irqchip
  gpio: pl061: convert driver to use gpiolib irqchip
  gpio: add IRQ chip helpers in gpiolib
  pinctrl: nomadik: factor in platform data container
  pinctrl: nomadik: rename secondary to latent
  gpio: Driver for SYSCON-based GPIOs
  gpio: generic: Use platform_device_id->driver_data field for driver flags
  pinctrl: coh901: move irq line locking to resource callbacks
  ...
2014-04-03 16:44:15 -07:00
Linus Torvalds d64b393253 Pin control bulk changes for the v3.15 series, no new core
functionality this time, just incremental driver updates:
 
 - A large refactoring of the MVEBU (Marvell) driver.
 
 - A large refactoring of the Tegra (nVidia) driver.
 
 - GPIO interrupt including soft edges support in the
   STi driver.
 
 - Misc updates to PFC (Renesas), AT91, ADI2 (Blackfin),
   pinctrl-single, sirf (CSR), msm (Qualcomm), Exynos (Samsung),
   sunxi (AllWinner), i.MX (Freescale), Baytrail.
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Merge tag 'pinctrl-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control bulk changes from Linus Walleij:
 "Pin control bulk changes for the v3.15 series, no new core
  functionality this time, just incremental driver updates:

   - A large refactoring of the MVEBU (Marvell) driver.

   - A large refactoring of the Tegra (nVidia) driver.

   - GPIO interrupt including soft edges support in the STi driver.

   - Misc updates to PFC (Renesas), AT91, ADI2 (Blackfin),
     pinctrl-single, sirf (CSR), msm (Qualcomm), Exynos (Samsung), sunxi
     (AllWinner), i.MX (Freescale), Baytrail"

* tag 'pinctrl-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: tegra: add some missing Tegra114 entries
  pinctrl: tegra: fix some mistakes in Tegra124
  pinctrl: msm: fix up out-of-order merge conflict
  pinctrl: st: Fix error check for of_irq_to_resource usage
  pinctrl: tegra: consistency cleanup
  pinctrl: tegra: dynamically calculate function list of groups
  pinctrl: tegra: init Tegra20/30 at module_init time
  pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delays
  pinctrl: st: add pinctrl support for the STiH407 SoC
  pinctrl: st: Enhance the controller to manage unavailable registers
  pinctrl: msm: Simplify msm_config_reg() and callers
  pinctrl: msm: Remove impossible WARN_ON()s
  pinctrl: msm: Replace lookup tables with math
  pinctrl: msm: Drop OF_IRQ dependency
  pinctrl: msm: Drop unused includes
  pinctrl: msm: Check for ngpios > MAX_NR_GPIO
  pinctrl: msm: Silence recursive lockdep warning
  pinctrl: mvebu: silence WARN to dev_warn
  pinctrl: msm: drop wake_irqs bitmap
  pinctrl-baytrail: add function mux checking in gpio pin request
  ...
2014-04-01 13:10:49 -07:00
Linus Walleij 57ef04288a gpio: switch drivers to use new callback
This switches all GPIO and pin control drivers with irqchips
that were using .startup() and .shutdown() callbacks to lock
GPIO lines for IRQ usage over to using the .request_resources()
and .release_resources() callbacks just introduced into the
irqchip vtable.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-18 09:28:30 +01:00
Barry Song e291fd20ef pinctrl: sirf: fix kernel panic in gpio_lock_as_irq
commit 655dada627 causes kernel panic, this patch fixes it.

    [    1.197816] [ffffffee] *pgd=0d7fd821, *pte=00000000, *ppte=00000000
    [    1.204070] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
    [    1.209447] Modules linked in:
    [    1.212490] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc1 #3
    [    1.218737] task: cd03c000 ti: cd040000 task.ti: cd040000
    [    1.224127] PC is at gpiod_lock_as_irq+0xc/0x64
    [    1.228634] LR is at sirfsoc_gpio_irq_startup+0x18/0x44
    [    1.233842] pc : [<c01d3990>]    lr : [<c01d1c38>]    psr: a0000193
    [    1.233842] sp : cd041d30  ip : 00000000  fp : 00000000
    [    1.245296] r10: 00000000  r9 : cd023db4  r8 : 60000113
    [    1.250505] r7 : 0000003e  r6 : cd023dd4  r5 : c06bfa54  r4 : cd023d80
    [    1.257014] r3 : 00000020  r2 : 00000000  r1 : ffffffea  r0 : ffffffea
    [    1.263526] Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
    [    1.270903] Control: 10c53c7d  Table: 00004059  DAC: 00000015
    [    1.276631] Process swapper/0 (pid: 1, stack limit = 0xcd040240)
    [    1.282620] Stack: (0xcd041d30 to 0xcd042000)
    [    1.286963] 1d20:                                     cd023d80 c01d1c38 c01d1c20 cd023d80
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.286963] 1d20:                                     cd023d80 c01d1c38 c01d1c20 cd023d80
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.303283] 1d60: 00000800 00000083 ccb6d880 cd023d80 c02b41d8 00000083 0000003e ccb7c410
    [    1.311442] 1d80: 00000000 c00671dc 00000083 0000003e c02b41d8 cd3dd5c0 0000003e ccb7c634
    [    1.319601] 1da0: cd040030 c00672a8 cd3dd5c0 ccb7c410 ccb6d340 ccb7c410 ccb6d340 cd3dd400
    [    1.327760] 1dc0: cd3dd410 c02b4434 ccb7c410 c01265a8 00000001 cd3dd410 c0687108 00000000
    [    1.335919] 1de0: c0687108 00000000 00000000 c0240170 c0240158 cd3dd410 c06c30d0 c023e8bc
    [    1.344079] 1e00: c023e9d4 00000000 cd3dd410 c023e9d4 c0682150 c023cf88 cd003e98 cd2d50c4
    [    1.352238] 1e20: cd3dd410 cd3dd444 c06822f0 c023e768 cd3dd418 cd3dd410 c06822f0 c023de14
    [    1.360397] 1e40: cd3dd418 00000000 cd3dd410 c023c398 cd041e78 cd041ea8 cd3dd400 cd3dd410
    [    1.368556] 1e60: 00000083 00000000 cd3dd400 cd3dd410 00000083 000000c8 c04e00c8 c023fee8
    [    1.376715] 1e80: 00000000 cd041ea8 cd3dd400 00000001 00000083 c024048c c0435ef8 c0434dec
    [    1.384874] 1ea0: c068da58 c04c6d04 c0682150 c0435ef8 ffffffff 00000000 00000000 c068da58
    [    1.393033] 1ec0: 00000020 00000000 00000000 00000000 c05dabb8 00000007 c068d640 c068d640
    [    1.401193] 1ee0: c04c247c c04c249c 00000000 c00088e8 cd004c00 c043bbb8 cd029180 c03812a0
    [    1.409352] 1f00: 00000000 00000000 60000113 c0673728 60000113 c0673728 00000000 00000000
    [    1.417511] 1f20: cd7fce01 c0390a54 00000065 c003a81c c049e8bc 00000007 cd7fce0e 00000007
    [    1.425670] 1f40: 00000000 c05dabb8 00000007 c068d640 c068d640 c04c050c c04e00c8 00000065
    [    1.433829] 1f60: c04e00c0 c04c0c54 00000007 00000007 c04c050c c037d8fc cd03c000 c004322c
    [    1.441988] 1f80: c0662b40 0000d640 c03737c0 00000000 00000000 00000000 00000000 00000000
    [    1.450147] 1fa0: 00000000 c03737cc 00000000 c000e478 00000000 00000000 00000000 00000000
    [    1.458307] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    1.466467] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 0002d481 05014092
    [    1.474640] [<c01d3990>] (gpiod_lock_as_irq) from [<c01d1c38>] (sirfsoc_gpio_irq_startup+0x18/0x44)
    [    1.483661] [<c01d1c38>] (sirfsoc_gpio_irq_startup) from [<c0068438>] (irq_startup+0x34/0x6c)
    [    1.492163] [<c0068438>] (irq_startup) from [<c0067044>] (__setup_irq+0x450/0x4b8)
    [    1.499714] [<c0067044>] (__setup_irq) from [<c00671dc>] (request_threaded_irq+0xa8/0x128)
    [    1.507960] [<c00671dc>] (request_threaded_irq) from [<c00672a8>] (request_any_context_irq+0x4c/0x7c)
    [    1.517164] [<c00672a8>] (request_any_context_irq) from [<c02b4434>] (gpio_extcon_probe+0x144/0x1d4)
    [    1.526279] [<c02b4434>] (gpio_extcon_probe) from [<c0240170>] (platform_drv_probe+0x18/0x48)
    [    1.534783] [<c0240170>] (platform_drv_probe) from [<c023e8bc>] (driver_probe_device+0x120/0x238)
    [    1.543641] [<c023e8bc>] (driver_probe_device) from [<c023cf88>] (bus_for_each_drv+0x58/0x8c)
    [    1.552143] [<c023cf88>] (bus_for_each_drv) from [<c023e768>] (device_attach+0x74/0x88)
    [    1.560126] [<c023e768>] (device_attach) from [<c023de14>] (bus_probe_device+0x84/0xa8)
    [    1.568113] [<c023de14>] (bus_probe_device) from [<c023c398>] (device_add+0x440/0x520)
    [    1.576012] [<c023c398>] (device_add) from [<c023fee8>] (platform_device_add+0xb4/0x214)
    [    1.584084] [<c023fee8>] (platform_device_add) from [<c024048c>] (platform_device_register_full+0xb8/0xdc)
    [    1.593719] [<c024048c>] (platform_device_register_full) from [<c04c6d04>] (sirfsoc_init_late+0xec/0xf4)
    [    1.603185] [<c04c6d04>] (sirfsoc_init_late) from [<c04c249c>] (init_machine_late+0x20/0x28)
    [    1.611603] [<c04c249c>] (init_machine_late) from [<c00088e8>] (do_one_initcall+0xf8/0x144)
    [    1.619934] [<c00088e8>] (do_one_initcall) from [<c04c0c54>] (kernel_init_freeable+0x13c/0x1dc)
    [    1.628620] [<c04c0c54>] (kernel_init_freeable) from [<c03737cc>] (kernel_init+0xc/0x118)

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 17:11:47 +08:00
Barry Song 019c12f474 pinctrl: sirf: update copyright years to 2014
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25 10:49:13 +01:00
Rongjun Ying 58ffe7a025 pinctrl: sirf: add pin group for USP0 for atlas6
USP0 has multiple functions, and has RX and TX frame sync signals,
for some scenarios like audio PCM, we don't need both of them.
so here we add two possibilities for USP0 only holding one of TX
and RX frame sync.

commit 8385af02ba only added this group for prima2, and missed
atlas6. This patch fixes it.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-10 10:13:08 +01:00
Qipan Li fa74d0d3e3 pinctrl: sirf: correct the pin index of ac97_pins group
according to datasheet and ac97_muxmask assignment, ac97_pins should be
corrected.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:08:17 +01:00