Enable all 4 SEC units available on d05 boards.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Modify the base address of the mdio mux driver to point to the
start of the mdio mux block's register address space.
Signed-off-by: Arun Parameswaran <arun.parameswaran@broadcom.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SDM845 has two tsens blocks, one with 13 sensors and the other with 8
sensors. It uses version 2 of the TSENS IP, so use the fallback property to
allow more common code.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
We also split up the regmap address space into two, for the TM and SROT
registers. This was required to deal with different address offsets for the
TM and SROT registers across different SoC families.
8996 has two TSENS IP blocks, initialise the second one too.
Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT). This is OK since the code
doesn't really use the SROT functionality yet.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The BTF conflicts were simple overlapping changes.
The virtio_net conflict was an overlap of a fix of statistics counter,
happening alongisde a move over to a bonafide statistics structure
rather than counting value on the stack.
Signed-off-by: David S. Miller <davem@davemloft.net>
- Fix potential clobbering of user vector register state by AES ghash code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbYtldAAoJELescNyEwWM0aisH/ReBqfJb1kTr5ybUriSTsuTl
Vjn8O17aH+177P3xlY47+cYWsvewJxiy7MldlLEiER0tsyjYvqTDuzy7+ffdJJ8R
rs0MGhYh9WpD3OVjng7TmwXD71xefk/gLq4MPqmgn9e/DoAt4HO/7jC4c+mSwxRZ
gHsAH5g6WUclRvU1zXaT8QKdZnmwudPFvy5O+bQYQrIJr++zBiyJ47qu1+TjJQuC
kVmM7XV0c0L1fK9z7A18PcW+tMlIu15ITzJwEercXen/7XypdDOufgc4Y9odHCkC
5ZWnV5wZtaJIuo/JWWPnoheWfTqIVF7ggXwsaXmZ0hKfQkBvbJ8fxhogCIWgt40=
=rpVW
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 regression fix from Will Deacon:
"Ard found a nasty arm64 regression in 4.18 where the AES ghash/gcm
code doesn't notify the kernel about its use of the vector registers,
therefore potentially corrupting live user state.
The fix is straightforward and Herbert agreed for it to go via arm64"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
crypto/arm64: aes-ce-gcm - add missing kernel_neon_begin/end pair
Almost all architectures include it. Add a ARCH_NO_PREEMPT symbol to
disable preempt support for alpha, hexagon, non-coldfire m68k and
user mode Linux.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Move the source of lib/Kconfig.debug and arch/$(ARCH)/Kconfig.debug to
the top-level Kconfig. For two architectures that means moving their
arch-specific symbols in that menu into a new arch Kconfig.debug file,
and for a few more creating a dummy file so that we can include it
unconditionally.
Also move the actual 'Kernel hacking' menu to lib/Kconfig.debug, where
it belongs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Instead of duplicating the source statements in every architecture just
do it once in the toplevel Kconfig file.
Note that with this the inclusion of arch/$(SRCARCH/Kconfig moves out of
the top-level Kconfig into arch/Kconfig so that don't violate ordering
constraits while keeping a sensible menu structure.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 2c4541e24c ("mm: use vma_init() to initialize VMAs on stack and
data segments") tried to initialize various left-over ad-hoc vma's
"properly", but actually made things worse for the temporary vma's used
for TLB flushing.
vma_init() doesn't actually initialize all of the vma, just a few
fields, so doing something like
- struct vm_area_struct vma = { .vm_mm = tlb->mm, };
+ struct vm_area_struct vma;
+
+ vma_init(&vma, tlb->mm);
was actually very bad: instead of having a nicely initialized vma with
every field but "vm_mm" zeroed, you'd have an entirely uninitialized vma
with only a couple of fields initialized. And they weren't even fields
that the code in question mostly cared about.
The flush_tlb_range() function takes a "struct vma" rather than a
"struct mm_struct", because a few architectures actually care about what
kind of range it is - being able to only do an ITLB flush if it's a
range that doesn't have data accesses enabled, for example. And all the
normal users already have the vma for doing the range invalidation.
But a few people want to call flush_tlb_range() with a range they just
made up, so they also end up using a made-up vma. x86 just has a
special "flush_tlb_mm_range()" function for this, but other
architectures (arm and ia64) do the "use fake vma" thing instead, and
thus got caught up in the vma_init() changes.
At the same time, the TLB flushing code really doesn't care about most
other fields in the vma, so vma_init() is just unnecessary and
pointless.
This fixes things by having an explicit "this is just an initializer for
the TLB flush" initializer macro, which is used by the arm/arm64/ia64
people who mis-use this interface with just a dummy vma.
Fixes: 2c4541e24c ("mm: use vma_init() to initialize VMAs on stack and data segments")
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Kirill Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Hugh Dickins <hughd@google.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
(Chromebook Plus)
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAltfHfEQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgUzjCACqE5AOVnEk1y9RuyTT1AqfuH6SkAHzw+7n
QnEtfpHTmSP2SMWXUBreebr0YgHDXmyOLWsKO0dIg9kjLcqV2HKIZmHWy6i5ADEu
nvexKJ2YJ51MnzAaWXS08en49nV+pDJmLnNK0eeozGOw3qHqYo7f9AiweBQoHq7D
IZZetI57wiSSrWVD122T8XZQfw9OCYwvBtEYJMOcsUDm89JECDZNgn3mvFr8pzRM
FbGzkWoYJaySlfm/nGyVOZvPgcYymIOzVIxZej26vqa1//5WojAlw5tTvKZ3Jd9i
aR/i4ljxXmHbY3qVu1zgac+aYKMFWLeM5SV0WB5cWo0DYkkMrTC4
=FNsc
-----END PGP SIGNATURE-----
Merge tag 'v4.19-rockchip-defconfig64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/defconfig
Enablement of some more features relevant to rk3399-kevin
(Chromebook Plus)
* tag 'v4.19-rockchip-defconfig64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: defconfig: Enable more peripherals for Samsung Chromebook Plus.
Signed-off-by: Olof Johansson <olof@lixom.net>
standard. LEDs and power button for the rk3399 firefly and removal of
some deprecated type-c properties from the rk3399 devicetree.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAltfHXEQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgepyB/9HJZvneyadfomxhywbflJ8wkZj4WWfHDNG
79hwcg33EBcP2+vRkTeYypkurmhZdv+sSF6h1sLUBmtFNuapzd7xlI7FW+NAwwgl
6UFU4DtiC2E0b9ljrCL1WQH34BEVpSyaENO7EF1gR8CvZAnb4BzRgzDxfAczbQlH
6uBRzfuHooW/zHrbLxMxzkMbeHlU7m8i3/F2E3Uftxy5/qHUNmFGNcOl0bCpT/i6
gS1QKIBAMmQ6yaNwrwG6GmPPampv2jXGUCNFAlCNkLPjKY0Ri7XdBq0k91sx78YT
bP7k8Qd+TANMZgHB+mHPhgupMDur8KL+hn5I+MO3DItfn3rUW4EL
=0BU+
-----END PGP SIGNATURE-----
Merge tag 'v4.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A new board, the Vamrs Ficus using the rk3399 and followin the 96boards
standard. LEDs and power button for the rk3399 firefly and removal of
some deprecated type-c properties from the rk3399 devicetree.
* tag 'v4.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add led support for Firefly-RK3399
arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
arm64: dts: rockchip: add power button support for Firefly-RK3399
arm64: dts: rockchip: drop out-of-tree properties from rk3399-ficus regulator
arm64: dts: rockchip: add voltage properties for vcc3v3_pcie on rk3399 ficus
arm64: dts: rockchip: add USB 2.0 and 3.0 support on Ficus board
arm64: dts: rockchip: add 96boards RK3399 Ficus board
dt-bindings: Add vendor prefix for Vamrs Ltd.
Signed-off-by: Olof Johansson <olof@lixom.net>
Use more specific compatible for the Inside Secure SafeXcel on the
Armada 37xx and the Armada 7K/8K SoCs.
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW1GhYAAKCRALBhiOFHI7
1UYeAKCZvsX0evzDYPCmL32CSuArmJ+OKwCdFYn7QoXQIYwGP60bK2UZzhcWROs=
=V7S+
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.19-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.19 (part 2)
Use more specific compatible for the Inside Secure SafeXcel on the
Armada 37xx and the Armada 7K/8K SoCs.
* tag 'mvebu-dt64-4.19-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: update the crypto engine compatible
arm64: dts: marvell: armada-cp110: update the crypto engine compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
The UniPhier platform highly relies on the reset controller.
Select RESET_CONTROLLER to enable it forcibly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Calling pmull_gcm_encrypt_block() requires kernel_neon_begin() and
kernel_neon_end() to be used since the routine touches the NEON
register file. Add the missing calls.
Also, since NEON register contents are not preserved outside of
a kernel mode NEON region, pass the key schedule array again.
Fixes: 7c50136a8a ("crypto: arm64/aes-ghash - yield NEON after every ...")
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Now that we understand the deadlock arising from flush_icache_range()
on the kexec crash kernel path, add a comment to justify the use of
__flush_icache_range() here.
Reported-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The SDEI stack helper functions are only used by _on_sdei_stack() and
refer to symbols (e.g. sdei_stack_normal_ptr) that are only defined if
CONFIG_VMAP_STACK=y.
Mark these functions as static, so we don't run into errors at link-time
due to references to undefined symbols. Stick all the parameters onto
the same line whilst we're passing through.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Include KASLR offset in arm64 VMCOREINFO ELF notes to assist in
debugging. vmcore parsing in user-space already expects this value in
the notes and we are providing it for portability of those existing
tools with x86.
Ideally we would like core code to do this (so that way this
information won't be missed when an architecture adds KASLR support),
but mips has CONFIG_RANDOMIZE_BASE, and doesn't provide kaslr_offset(),
so I am not sure if this is needed for mips (and other such similar arch
cases in future). So, lets keep this architecture specific for now.
As an example of a user-space use-case, consider the
makedumpfile user-space utility which will need fixup to use this
KASLR offset to work with cases where we need to find a way to
translate symbol address from vmlinux to kernel run time address
in case of KASLR boot on arm64.
I have already submitted the makedumpfile user-space patch upstream
and the maintainer has suggested to wait for the kernel changes to be
included (see [0]).
I tested this on my qualcomm amberwing board both for KASLR and
non-KASLR boot cases:
Without this patch:
# cat > scrub.conf << EOF
[vmlinux]
erase jiffies
erase init_task.utime
for tsk in init_task.tasks.next within task_struct:tasks
erase tsk.utime
endfor
EOF
# makedumpfile --split -d 31 -x vmlinux --config scrub.conf vmcore dumpfile_{1,2,3}
readpage_elf: Attempt to read non-existent page at 0xffffa8a5bf180000.
readmem: type_addr: 1, addr:ffffa8a5bf180000, size:8
vaddr_to_paddr_arm64: Can't read pgd
readmem: Can't convert a virtual address(ffff0000092a542c) to physical
address.
readmem: type_addr: 0, addr:ffff0000092a542c, size:390
check_release: Can't get the address of system_utsname
After this patch check_release() is ok, and also we are able to erase
symbol from vmcore (I checked this with kernel 4.18.0-rc4+):
# makedumpfile --split -d 31 -x vmlinux --config scrub.conf vmcore dumpfile_{1,2,3}
The kernel version is not supported.
The makedumpfile operation may be incomplete.
Checking for memory holes : [100.0 %] \
Checking for memory holes : [100.0 %] |
Checking foExcluding unnecessary pages : [100.0 %]
\
Excluding unnecessary pages : [100.0 %] \
The dumpfiles are saved to dumpfile_1, dumpfile_2, and dumpfile_3.
makedumpfile Completed.
[0] https://www.spinics.net/lists/kexec/msg21195.html
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Acked-by: James Morse <james.morse@arm.com>
Signed-off-by: Bhupesh Sharma <bhsharma@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
It is useful to get the running time of a thread. Doing so in an
efficient manner can be important for performance of user applications.
Avoiding system calls in `clock_gettime` when handling
CLOCK_THREAD_CPUTIME_ID is important. Other clocks are handled in the
VDSO, but CLOCK_THREAD_CPUTIME_ID falls back on the system call.
CLOCK_THREAD_CPUTIME_ID is not handled in the VDSO since it would have
costs associated with maintaining updated user space accessible time
offsets. These offsets have to be updated everytime the a thread is
scheduled/descheduled. However, for programs regularly checking the
running time of a thread, this is a performance improvement.
This patch takes a middle ground, and adds support for cap_user_time an
optional feature of the perf_event API. This way costs are only
incurred when the perf_event api is enabled. This is done the same way
as it is in x86.
Ultimately this allows calculating the thread running time in userspace
on aarch64 as follows (adapted from perf_event_open manpage):
u32 seq, time_mult, time_shift;
u64 running, count, time_offset, quot, rem, delta;
struct perf_event_mmap_page *pc;
pc = buf; // buf is the perf event mmaped page as documented in the API.
if (pc->cap_usr_time) {
do {
seq = pc->lock;
barrier();
running = pc->time_running;
count = readCNTVCT_EL0(); // Read ARM hardware clock.
time_offset = pc->time_offset;
time_mult = pc->time_mult;
time_shift = pc->time_shift;
barrier();
} while (pc->lock != seq);
quot = (count >> time_shift);
rem = count & (((u64)1 << time_shift) - 1);
delta = time_offset + quot * time_mult +
((rem * time_mult) >> time_shift);
running += delta;
// running now has the current nanosecond level thread time.
}
Summary of changes in the patch:
For aarch64 systems, make arch_perf_update_userpage update the timing
information stored in the perf_event page. Requiring the following
calculations:
- Calculate the appropriate time_mult, and time_shift factors to convert
ticks to nano seconds for the current clock frequency.
- Adjust the mult and shift factors to avoid shift factors of 32 bits.
(possibly unnecessary)
- The time_offset userspace should apply when doing calculations:
negative the current sched time (now), because time_running and
time_enabled fields of the perf_event page have just been updated.
Toggle bits to appropriate values:
- Enable cap_user_time
Signed-off-by: Michael O'Farrell <micpof@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
When kernel mode NEON was first introduced to the arm64 kernel,
every call to kernel_neon_begin()/_end() stacked resp. unstacked
the entire NEON register file, making it worthwile to reduce the
number of used NEON registers to a bare minimum, and only stack
those. kernel_neon_begin_partial() was introduced for this purpose,
but after the refactoring for SVE and other changes, it no longer
exists and was simply #define'd to kernel_neon_begin() directly.
In the mean time, all users have been updated, so let's remove
the fallback macro.
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
machine_kexec flushes the reboot_code_buffer from the icache
after stopping the other cpus.
Commit 3b8c9f1cdf ("arm64: IPI each CPU after invalidating the I-cache
for kernel mappings") added an IPI call to flush_icache_range, which
causes a hang here, so replace the call with __flush_icache_range
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We always run userspace with interrupts enabled, but with the recent
conversion of the syscall entry/exit code to C, we don't inform the
hardirq tracing code that interrupts are about to become enabled by
virtue of restoring the EL0 SPSR.
This patch ensures that trace_hardirqs_on() is called on the syscall
return path when we return to the assembly code with interrupts still
disabled.
Fixes: f37099b699 ("arm64: convert syscall trace logic to C")
Reported-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Merge misc fixes from Andrew Morton:
"11 fixes"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
kvm, mm: account shadow page tables to kmemcg
zswap: re-check zswap_is_full() after do zswap_shrink()
include/linux/eventfd.h: include linux/errno.h
mm: fix vma_is_anonymous() false-positives
mm: use vma_init() to initialize VMAs on stack and data segments
mm: introduce vma_init()
mm: fix exports that inadvertently make put_page() EXPORT_SYMBOL_GPL
ipc/sem.c: prevent queue.status tearing in semop
mm: disallow mappings that conflict for devm_memremap_pages()
kasan: only select SLUB_DEBUG with SYSFS=y
delayacct: fix crash in delayacct_blkio_end() after delayacct init failure
Pull in arm perf updates, including support for 64-bit (chained) event
counters and some non-critical fixes for some of the system PMU drivers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
The xen-privcmd driver, which can be modular, calls set_pte_at()
which in turn may call __sync_icache_dcache().
The call to __sync_icache_dcache() may be optimised out because it is
conditional on !pte_special(), and xen-privcmd calls pte_mkspecial().
But it seems unwise to rely on this optimisation.
Fixes: 3ad0876554 ("xen/privcmd: add IOCTL_PRIVCMD_MMAP_RESOURCE")
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Commit b73b7ac0a7 ("crypto: sha256_generic - add cra_priority") gave
sha256-generic and sha224-generic a cra_priority of 100, to match the
convention for generic implementations. But sha256-arm64 and
sha224-arm64 also have priority 100, so their order relative to the
generic implementations became ambiguous.
Therefore, increase their priority to 125 so that they have higher
priority than the generic implementations but lower priority than the
NEON implementations which have priority 150.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Make sure to initialize all VMAs properly, not only those which come
from vm_area_cachep.
Link: http://lkml.kernel.org/r/20180724121139.62570-3-kirill.shutemov@linux.intel.com
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- add EINT support
- add gpio-ranges property to pinctrl
- add earlycon to rfb1 to find boot errros more easily
- fix uart clock
- add iommu and smi bindings
- mt6797:
- add support for the 96 board x20 development board
- fix cooling-cells of mt7622 and mt8173
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAltU6hoXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MQTQ/+JI1N6YWXFKkl6NqGFlFd5Spj
oLdlnagqc45b368eEKj+wBtbidgryhLXdPB62dSCQGABt9Id0WA+5fbTvq7xkvw7
cU8pNV0SPn5+mw2NzQfCgRtHyFEn8u+pGCZkn9CwX7yjk9mSWWKpFANJYy3isqPD
hch8Pne5c1MtB1X9MVbrdo6IKuscdD8isXuGMEWMDyKq0VniOzC+uVa/uWDBdp++
C31OoJE6KQmJj3CJPTUM41DfiwXUfJro/Prfy0xHhoZ6qctJmkuHeCZUfbwBIGSQ
xGBaN6C0AmyPzxfc56C2lVOGrTEy5LU7CgMYnMIvDQjAhREKl0nQj/E/F5YDQP/z
BPDGDu+GhKi4xHNwf1ZchDLkiALOPPM7tKsorxcWNAxlKHV/0Gz737Twj7SaiWNn
GrRNDrfyG1L3Lk3aJsPQ/S7IzTSQWmhXCFPgQKX86qijl/FfVtAEg79Mv1ay0Ii1
8uV9KnDQqiaElZRFxfeOF7oCsK1I4ugcDA7TmsWzk6diApO6w+v9mX8tTcgYetpv
a80k7ymJEStfMSBr3p3mRs5b8dGC8940yik332YzPMLufJ6ocBjqpzgEUgx9S5kk
dkYPV80CrtEYE5VmvjJjcQSroR6RNxjuMvwnsBxj0sH/KuUMFPoh+9qyXzR68g5l
X/pJ6H5271ek+qPOIx0=
=+G4b
-----END PGP SIGNATURE-----
Merge tag 'v4.18-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt
- mt7622:
- add EINT support
- add gpio-ranges property to pinctrl
- add earlycon to rfb1 to find boot errros more easily
- fix uart clock
- add iommu and smi bindings
- mt6797:
- add support for the 96 board x20 development board
- fix cooling-cells of mt7622 and mt8173
* tag 'v4.18-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: Add Mediatek X20 Development Board support
dt-bindings: arm: mediatek: Document Mediatek X20 Development Board
dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI
arm64: dts: mt7622: update a clock property for UART0
arm64: dts: mt7622: add earlycon to mt7622-rfb1 board
arm64: dts: mt7622: use gpio-ranges to pinctrl device
arm64: dts: mediatek: Add missing cooling device properties for CPUs
arm64: dts: mt7622: add EINT support to pinctrl
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for the STACKLEAK gcc plugin to arm64 by implementing
stackleak_check_alloca(), based heavily on the x86 version, and adding the
two helpers used by the stackleak common code: current_top_of_stack() and
on_thread_stack(). The stack erasure calls are made at syscall returns.
Additionally, this disables the plugin in hypervisor and EFI stub code,
which are out of scope for the protection.
Acked-by: Alexander Popov <alex.popov@linux.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
In preparation for enabling the stackleak plugin on arm64,
we need a way to get the bounds of the current stack. Extend
on_accessible_stack to get this information.
Acked-by: Alexander Popov <alex.popov@linux.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Laura Abbott <labbott@redhat.com>
[will: folded in fix for allmodconfig build breakage w/ sdei]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Some interesting changes, especially:
- MMC support for the H6
- PMIC support for the PineH64
- HDMI simplefb support for the A64
- PWM support for the A64
- New board: Pinebook, Amarula A64-Relic
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAltXJZEACgkQ0rTAlCFN
r3RIsw/8DUoWIlnSocPpRkBSonV55iC0qY4JKjamm/TrhQY5k4MjpX+7/PIyGQAU
uNHn6vOmRILOyQS5Zg+1uWLOPypdxI2aDcQUKYNPdNJ6RytdgH1zghUM0iupOuNb
CnolLpaA5RGjDvH/MarBwBoyxrAvnhLB/d5naUjzO/zoaw5j4K9idJdneJNX/aBi
nezBGxWzjF0Mu1MmFhRUZD9klZcbeUtJK4sJ4yJeKUThoi1kKynpbXvONDB5wL9L
JDVdWeNYrG3ylNHyAezOMM8gezGxSGjfya8zAaOZj/Wo5uvSDG4+oFaoJU2b+uPu
pdHO1pNGgw57HS6ePm/ON8J4U7v8Z99sRK3BZ+3NjxL3nRsvL5jzfZtSnza6v7gb
ONLlk89entDHDmtugpYYRWyw3GECv+1+oqBTngyRK9rctcFxrCsymx9cyHX7OWPC
M521xUHKL84zoFMmvXPKlMHapH+I70k+a6n5kRljQ9/lbKgnjsvenZerEUB41xvV
B2GXdo4MrZS/UYiPpD585InpoXmqC44cp7SOyXtUETAQ/pOQAbqE3cXHpVLnlUX9
yZfjCK6P6tp+lP9B0pFekIlzjhuUnhCqpNsTIp57ionGYRyK7oSVMOr2bf361vXZ
RBLNbQ+43G8IXPKItRLOFuYNHXQlyi7GR5LnLx/UbDcU3IKhj4w=
=MH+c
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner arm64 DT changes for 4.19
Some interesting changes, especially:
- MMC support for the H6
- PMIC support for the PineH64
- HDMI simplefb support for the A64
- PWM support for the A64
- New board: Pinebook, Amarula A64-Relic
* tag 'sunxi-dt64-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (22 commits)
arm64: allwinner: h6: enable MMC0/2 on Pine H64
arm64: allwinner: h6: add device tree nodes for MMC controllers
dt-binding: mmc: sunxi: add H6 compatible (with A64 fallback)
arm64: dts: allwinner: a64: Remove unused address-cells/size-cells of dwmac-sun8i
arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64
arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices
arm64: dts: allwinner: a64: add HDMI regulator to all DTs' simplefb_hdmi
arm64: dts: allwinner: a64: add device tree node for HDMI simplefb
arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU
arm64: dts: allwinner: h6: Add LED device nodes for Pine H64
arm64: allwinner: a64: allow laptops to wake up from lid
arm64: allwinner: a64: change TERES-I DLDO3's name to start with "vdd"
arm64: allwinner: a64-sopine: Add cd-gpios to mmc0 node
arm64: dts: allwinner: a64: add SRAM controller device tree node
arm64: dts: allwinner: add support for Pinebook
arm64: dts: allwinner: a64: Add PWM controllers
arm64: dts: allwinner: a64: add R_I2C controller
arm64: allwinner: a64-amarula-relic: Enable AP6330 WiFi support
arm64: allwinner: a64: Add RTC clock to phandle 32kHz external oscillator
arm64: allwinner: a64: Add Amarula A64-Relic initial support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- new SoC: S905W
- new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
- AXG: add DT for new audio clock controller
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAltWB4EACgkQWTcYmtP7
xmW5Mg/8C8UrOoUcfanK/E3qpogIbyfzJzA4duuBm0HzXjQXBQWVjn2fTJa7kkYF
DkMsM16P2c5XjutepySrystcGC7sbvj5BDvGuH6u6y5IvKeWGSM9jQ9Xy6zj53Yw
NBifmkBn0JCoO2h0Fauu1iH6xeKdVoCPufM7kXq9evhZ94qd8L+FvWMB6ZSVNl7F
WkO27xnL+PWH54flBS+cAkG/Htia635SiIxWdVzG6VdSFoDrJTqFQAAXAhi4XBdH
vkanXohQ/weXmJHYWsYpCCjuJFGtceWtaGZKnK+bCbGYXWQB3BgR/qcdGYZ+Ee2K
QJr94aaUBlySjDQvYzIGvy0qvyIeLJ/mz7EMQhJS3vG0/OKQgCyNrGpAw1JWjxcK
0LIyNKTW+b/CA8WGDIlEOMnbf11GzBRQzPjf1PneZAFc0xZDIziSCp7bMONA+Nb2
w8STNc82zDwPuPI05ZIKJuiRLWcU/kdnw/1uLdVy4UWq+gvNNxioG1ML7wrXukZV
yUErXfmOKCmg49oUeE4wlyJotNqj+YxbWfYmGks0EK/IFomA7i5CeSOrEV9BtkdQ
62ezN8wBnf/XoGon53noyvNHk2W+N0I603G7BxJ1ypV1mH8AWRSwiCxE2mOXgW16
wkwte9qduYYi25V7pkPjnuQ2aFpvPjnRT5FrGj086fDM3PkJVV4=
=bHuf
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 64-bit DT changes for v4.19, round 2
- new SoC: S905W
- new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
- AXG: add DT for new audio clock controller
* tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxl: add support for the Oranth Tanix TX3 Mini
ARM64: dts: meson-gxl: add support for the S905W SoC and the P281 board
dt-bindings: arm: amlogic: Add support for the Oranth Tanix TX3 Mini
dt-bindings: arm: amlogic: Add support for GXL S905W and the P281 board
dt-bindings: add vendor prefix for Shenzhen Oranth Technology Co., Ltd.
ARM64: dts: meson-axg: add the audio clock controller
clk: meson: expose GEN_CLK clkid
clk: meson-axg: add pcie and mipi clock bindings
dt-bindings: clock: add meson axg audio clock controller bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
On Spreadtrum platform, the current clocksource for timekeeping will be
stopped in suspend state, thus add one always-on timer to calculate the
suspend time.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the Spreadtrum SC27XX PMICs ADC device node which contains 32 channels.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the eFuse device node for Spreadtrum SC27XX PMICs.
The SC27XX eFuse contains 32 blocks and each block's data width is
16 bits.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the vibrator device node for Spreadtrum SC27XX PMICs.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The SC27xx breathing light controller can support 3 outputs:
red LED, green LED and blue LED.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add support for PM8005/PM8998 and related nodes
* Add/fix nodes on SDM845 for I2c, SPI, UART, and RPMH
* Fix BT LED trigger on DB410c
* Drop legacy clock names on MSM8916
* Add gpio line names on DB820c
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJbU6V8AAoJEFKiBbHx2RXVEWQP/iqEdooNqTqHwxTFzVrTjMrH
k4tWuXjKNIkyoxuMwOVjeDtSoHchITIe5/b3pEQqsP20kjS/ouY0moazjZkOatx/
fSNsempJkO5j3vVDMJ6veIYZqjBrzvW7FX2PzF8OI3LzSRIssZLJvhtxRZ4KgWWk
zzPpbRJPww18P+eMjtiei0W1mJnbvs0T7bgJImPkfn9G4GOxGTKx8Wd8zshbH7Bn
P1x9Ylr7ZV9G6B+t8j+tmJc1QzHAkgH0DMg8K0BeSo/kZ3o6kPGu+Yx1NtHRZo1W
3qY21AiDu0cQhtxvm31SfDrau0Mk3sysCAF3DL6L1o/REyxphZp/PtNuE0JRxaCE
RjTjmNBD02sQZHcVeI84JDlv2x+mLIOENQeRTDz0CKDinweWkY7A9bsE8Zf+dxM1
5BLVvZbKW5jF84lUHsZsxeAwp7q2rqjT5wv+kwmyOfrMGIOz8JKYpjf7W7+wncT3
+CbRDY40XyeRMF+WkxC9Ir2fJlY4uZu4dXo/5q0PASayRl3fmF7RBPijl2qwTfw/
/sqhqtEhPCl6LUS4u1tEae2/04SwnTal/1/mfawguz+nXSuM4WuZuic8Ee1nqWTX
zg3Tw8YOlBOEYggCy9WVzwI+5X3V9QHKQmsL8HjLpP7D1TY/wm5hf1/ph02TlHFG
69g8nL/ZVh49yi3Nfj70
=DQjU
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm ARM64 Updates for v4.19
* Add support for PM8005/PM8998 and related nodes
* Add/fix nodes on SDM845 for I2c, SPI, UART, and RPMH
* Fix BT LED trigger on DB410c
* Drop legacy clock names on MSM8916
* Add gpio line names on DB820c
* tag 'qcom-arm64-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: db410c: Fix Bluetooth LED trigger
arm64: dts: sdm845: Default qupv3_id_0 as "disabled" like _id_1
arm64: dts: msm8916: drop legacy suffix for clocks used by MSM DRM driver
arm64: dts: qcom: db820c: Add gpio-line-names property
arm64: dts: sdm845: Add rpmh-clk node
arm64: dts: sdm845: Add rpmh-rsc node
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp
arm64: dts: qcom: sdm845: Add I2C, SPI, and UART9 nodes
arm64: dts: qcom: Add pm8005 and pm8998 support
arm64: dts: qcom: Add pmu node to sdm845
Signed-off-by: Olof Johansson <olof@lixom.net>
Arnd reports the following arm64 randconfig build error with the PSI
patches that add another page flag:
/git/arm-soc/arch/arm64/mm/init.c: In function 'mem_init':
/git/arm-soc/include/linux/compiler.h:357:38: error: call to
'__compiletime_assert_618' declared with attribute error: BUILD_BUG_ON
failed: sizeof(struct page) > (1 << STRUCT_PAGE_MAX_SHIFT)
The additional page flag causes other information stored in
page->flags to get bumped into their own struct page member:
#if SECTIONS_WIDTH+ZONES_WIDTH+NODES_SHIFT+LAST_CPUPID_SHIFT <=
BITS_PER_LONG - NR_PAGEFLAGS
#define LAST_CPUPID_WIDTH LAST_CPUPID_SHIFT
#else
#define LAST_CPUPID_WIDTH 0
#endif
#if defined(CONFIG_NUMA_BALANCING) && LAST_CPUPID_WIDTH == 0
#define LAST_CPUPID_NOT_IN_PAGE_FLAGS
#endif
which in turn causes the struct page size to exceed the size set in
STRUCT_PAGE_MAX_SHIFT. This value is an an estimate used to size the
VMEMMAP page array according to address space and struct page size.
However, the check is performed - and triggers here - on a !VMEMMAP
config, which consumes an additional 22 page bits for the sparse
section id. When VMEMMAP is enabled, those bits are returned, cpupid
doesn't need its own member, and the page passes the VMEMMAP check.
Restrict that check to the situation it was meant to check: that we
are sizing the VMEMMAP page array correctly.
Says Arnd:
Further experiments show that the build error already existed before,
but was only triggered with larger values of CONFIG_NR_CPU and/or
CONFIG_NODES_SHIFT that might be used in actual configurations but
not in randconfig builds.
With longer CPU and node masks, I could recreate the problem with
kernels as old as linux-4.7 when arm64 NUMA support got added.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org
Fixes: 1a2db30034 ("arm64, numa: Add NUMA support for arm64 platforms.")
Fixes: 3e1907d5bf ("arm64: mm: move vmemmap region right below the linear region")
Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Since commit d3aec8a28b ("arm64: capabilities: Restrict KPTI
detection to boot-time CPUs") we rely on errata flags being already
populated during feature enumeration. The order of errata and
features was flipped as part of commit ed478b3f9e ("arm64:
capabilities: Group handling of features and errata workarounds").
Return to the orginal order of errata and feature evaluation to
ensure errata flags are present during feature evaluation.
Fixes: ed478b3f9e ("arm64: capabilities: Group handling of
features and errata workarounds")
CC: Suzuki K Poulose <suzuki.poulose@arm.com>
CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Dirk Mueller <dmueller@suse.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Add the SPDIF playback codec to the axg s400 board
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the es7154 digital to analog converter which supplies the
lienout jack of the s400
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the es7241 analog to digital converter which is fed by the
lienin jack of the s400
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the devices reponsible for managing the i2s/tdm clocks and pads
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the tdm devices responsible for serializing audio samples
for i2s/tdm interfaces
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the tdm devices responsible for decoding the data provided
through audio serial interface.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the SPDIF output device of the axg audio subsystem
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit adds led support for the Firefly-RK3399. The board has two
leds, this commit enables them.
Signed-off-by: Shohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit 0fbc47d9e4 ("phy: rockchip-typec: deprecate some DT properties
for various register fields.") deprecates some Rockchip Type-C
properties. As these are now not needed, remove from the device tree
file.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit adds power button support for the Firefly-RK3399.
Signed-off-by: Shohei Maruyama <cheat.sc.linux@outlook.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the audio memory arbiter which control the access of the audio
fifos to the DDR.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The usb power regulator is supplied by the vcc 5v regulator and
controlled by a GPIO. This will be needed to enable usb.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This regulator is controlled by a GPIO and supplies various devices
on the board, such as the lineout codec, the usb supply or the lcd
controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the parent supply of the s400 power supplies.
Also add 'regulator-always-on' property on the regulators which can't
be disabled
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Kconfig reports a warning on x86 builds after the ARM64 dependency
was added.
drivers/acpi/Kconfig:6:error: recursive dependency detected!
drivers/acpi/Kconfig:6: symbol ACPI depends on EFI
This rephrases the dependency to keep the ARM64 details out of the
shared Kconfig file, so Kconfig no longer gets confused by it.
For consistency, all three architectures that support ACPI now
select ARCH_SUPPORTS_ACPI in exactly the configuration in which
they allow it. We still need the 'default x86', as each one
wants a different default: default-y on x86, default-n on arm64,
and always-y on ia64.
Fixes: 5bcd44083a ("drivers: acpi: add dependency of EFI for arm64")
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This is a fix against the issue that crash dump kernel may hang up
during booting, which can happen on any ACPI-based system with "ACPI
Reclaim Memory."
(kernel messages after panic kicked off kdump)
(snip...)
Bye!
(snip...)
ACPI: Core revision 20170728
pud=000000002e7d0003, *pmd=000000002e7c0003, *pte=00e8000039710707
Internal error: Oops: 96000021 [#1] SMP
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.14.0-rc6 #1
task: ffff000008d05180 task.stack: ffff000008cc0000
PC is at acpi_ns_lookup+0x25c/0x3c0
LR is at acpi_ds_load1_begin_op+0xa4/0x294
(snip...)
Process swapper/0 (pid: 0, stack limit = 0xffff000008cc0000)
Call trace:
(snip...)
[<ffff0000084a6764>] acpi_ns_lookup+0x25c/0x3c0
[<ffff00000849b4f8>] acpi_ds_load1_begin_op+0xa4/0x294
[<ffff0000084ad4ac>] acpi_ps_build_named_op+0xc4/0x198
[<ffff0000084ad6cc>] acpi_ps_create_op+0x14c/0x270
[<ffff0000084acfa8>] acpi_ps_parse_loop+0x188/0x5c8
[<ffff0000084ae048>] acpi_ps_parse_aml+0xb0/0x2b8
[<ffff0000084a8e10>] acpi_ns_one_complete_parse+0x144/0x184
[<ffff0000084a8e98>] acpi_ns_parse_table+0x48/0x68
[<ffff0000084a82cc>] acpi_ns_load_table+0x4c/0xdc
[<ffff0000084b32f8>] acpi_tb_load_namespace+0xe4/0x264
[<ffff000008baf9b4>] acpi_load_tables+0x48/0xc0
[<ffff000008badc20>] acpi_early_init+0x9c/0xd0
[<ffff000008b70d50>] start_kernel+0x3b4/0x43c
Code: b9008fb9 2a000318 36380054 32190318 (b94002c0)
---[ end trace c46ed37f9651c58e ]---
Kernel panic - not syncing: Fatal exception
Rebooting in 10 seconds..
(diagnosis)
* This fault is a data abort, alignment fault (ESR=0x96000021)
during reading out ACPI table.
* Initial ACPI tables are normally stored in system ram and marked as
"ACPI Reclaim memory" by the firmware.
* After the commit f56ab9a5b7 ("efi/arm: Don't mark ACPI reclaim
memory as MEMBLOCK_NOMAP"), those regions are differently handled
as they are "memblock-reserved", without NOMAP bit.
* So they are now excluded from device tree's "usable-memory-range"
which kexec-tools determines based on a current view of /proc/iomem.
* When crash dump kernel boots up, it tries to accesses ACPI tables by
mapping them with ioremap(), not ioremap_cache(), in acpi_os_ioremap()
since they are no longer part of mapped system ram.
* Given that ACPI accessor/helper functions are compiled in without
unaligned access support (ACPI_MISALIGNMENT_NOT_SUPPORTED),
any unaligned access to ACPI tables can cause a fatal panic.
With this patch, acpi_os_ioremap() always honors memory attribute
information provided by the firmware (EFI) and retaining cacheability
allows the kernel safe access to ACPI tables.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reported-by and Tested-by: Bhupesh Sharma <bhsharma@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
There has been some confusion around what is necessary to prevent kexec
overwriting important memory regions. memblock: reserve, or nomap?
Only memblock nomap regions are reported via /proc/iomem, kexec's
user-space doesn't know about memblock_reserve()d regions.
Until commit f56ab9a5b7 ("efi/arm: Don't mark ACPI reclaim memory
as MEMBLOCK_NOMAP") the ACPI tables were nomap, now they are reserved
and thus possible for kexec to overwrite with the new kernel or initrd.
But this was always broken, as the UEFI memory map is also reserved
and not marked as nomap.
Exporting both nomap and reserved memblock types is a nuisance as
they live in different memblock structures which we can't walk at
the same time.
Take a second walk over memblock.reserved and add new 'reserved'
subnodes for the memblock_reserved() regions that aren't already
described by the existing code. (e.g. Kernel Code)
We use reserve_region_with_split() to find the gaps in existing named
regions. This handles the gap between 'kernel code' and 'kernel data'
which is memblock_reserve()d, but already partially described by
request_standard_resources(). e.g.:
| 80000000-dfffffff : System RAM
| 80080000-80ffffff : Kernel code
| 81000000-8158ffff : reserved
| 81590000-8237efff : Kernel data
| a0000000-dfffffff : Crash kernel
| e00f0000-f949ffff : System RAM
reserve_region_with_split needs kzalloc() which isn't available when
request_standard_resources() is called, use an initcall.
Reported-by: Bhupesh Sharma <bhsharma@redhat.com>
Reported-by: Tyler Baicar <tbaicar@codeaurora.org>
Suggested-by: Akashi Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: James Morse <james.morse@arm.com>
Fixes: d28f6df130 ("arm64/kexec: Add core kexec support")
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
CC: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Not all toolchains have the baremetal elf targets, RedHat/Fedora ones
in particular. So, probe for whether it's available and use the previous
(linux) targets if it isn't.
Reported-by: Laura Abbott <labbott@redhat.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
It's possible for userspace to control idx. Sanitize idx when using it
as an array index, to inhibit the potential spectre-v1 write gadget.
Found by smatch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Enable the Rockchip sound driver with MAX98357A/RT5514/DA7219 codecs,
Infineon TPM security chip (compliant with TCG TIS 1.2 TPM specification),
vctrl regulators for dynamic CPU voltages, UVC camera support and SBS-
compliant gas gauges needed for the Samsung Chromebook Plus.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There's one ARM, one x86_32 and one x86_64 version of efi_open_volume()
which can be folded into a single shared version by masking their
differences with the efi_call_proto() macro introduced by commit:
3552fdf29f ("efi: Allow bitness-agnostic protocol calls").
To be able to dereference the device_handle attribute from the
efi_loaded_image_t table in an arch- and bitness-agnostic manner,
introduce the efi_table_attr() macro (which already exists for x86)
to arm and arm64.
No functional change intended.
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20180720014726.24031-7-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAltSy5YRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMh2hAAqKkW9SbJJnPwFVafBn2W+mXsDG7wNq04
3dvMueGZ4S2wuTOcB4fZLFIAW4N5C3P/d66PL2f/dTZHGBr23Qk9LW5UIPp3A+A7
4jTXBSD2Hv6pLChuy3Mr6grGXKGXKfwptef04UZK2XLydQ/AJwEx6Lhj1nXXgT8x
92C1F/9v7hogO+Iz1uUk/AhNeim7DYA/J6AajVcDjj0TO6a2lnLLxO7mKvZgqgg8
2awuZ5aWuSvAOZ5GIAHksGyg8Z4yJslfM2lmTMZQZ5Wr/mO1Nl4LY9OrR+Cw9ctR
R8k+blJ3iB11eGZglArvEdLIRG88Qi2GHJ69WtAXaHdytrT7v1O3vLwAd3CeEQG4
GWX22X5qkIe6e66LLb/DKT799nZwwKnlH+mErDMF4ug/dbvLfvp6FztQ4URvd7dU
+qRUl8mOS6690/vFKef1vIuK7W4z7T1VxxYssR6eWGXtY4aXVRmU+zVl1J/ymrC+
5WDy9IihHgCYQtof3O/Drx5Go9xWVKrow4AF1onpnawM1N4g4QoPwUuL4bzsIqAk
JcxaAErW1/DLGspkWFNXv70U7/EDYhGKuNMc9SoOYcq3kj1QW86AUmcAWm3LMGYV
eYthnm1oTTD4AVyriMYEaRGhQICJ9zeivQO8dntCtBA4DTZ1MbrO2v+LhpQ45/hp
rsW/9t77QSw=
=pkLC
-----END PGP SIGNATURE-----
Merge tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
TI AM654 support for v4.19 merge window
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
* tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm64: dts: ti: Add support for AM654 EVM base board
soc: ti: Add Support for AM654 SoC config option
arm64: dts: ti: Add Support for AM654 SoC
arm64: Add support for TI's K3 Multicore SoC architecture
dt-bindings: arm: ti: Add bindings for AM654 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
* Enable BD9571MWV regulator in ARM64 defconfig
This is to allow wider testing of the BD9571 PMIC which is
present on boards with Renesas R-Car Gen3 SoCs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAltRsGwACgkQ189kaWo3
T74vfg//cAnaw8SDbrtUcyP2P3heQ76ggI6x1qIYIdIB7+z4dCSSc3N9UCNthdkN
vvu8jvcRfeHA1bxMC/6cey1W7FMwXy4cMnxQ2YxgxUHs7mEHLhpH20jmENsVoveW
EX7w5BR+Ahfy8XuHg+4rzrnB2wJ47QUex9gemeyb+eLBX998bu/+Q6IKsR133U1f
AFYrCOcPmu48kvybvplPIq7reohj6iIKueqjuRc1e3Wp7IWpbNcArIG8/52zDK8s
o+udlmIXyHsx1CxsQ+iDi3sUeyNLzJHyLOLDXLkNjVGBOEcP9ml6L9jExn4w7otV
EknlTBgYv8PNVWJmbjuK53PrPNcgWr3z0D/8lEF3M0hBCBVO8jcuL1/SGohG0ctk
akczeoGnvbZUqVxJQIYWm9gRg76F8rMIycaLwxut2eo4u0zG/kIMozXznOSiuKzI
PBU/X41rQKCXAYuaUwDOj6lRTVm9fm7r/x24KkqpGP4rX6EOInraMnV8GnnRDMw6
BTXC9sIjemiupYjetdcV/hI5iTOj8gp8o37htdnTOU4AF49mmtCFiAg8M9Xa8eZf
3VlyUAL914oPxUDbJ4u7TxsJC7magd5PS+LO/e4AX1VJ9U+Vb4r+YYaeeJkDfYGP
4eZrX3XZ2/kY9mnyHtB3W79yngixNxj1Mgegd9ikIxc2oqt6lA8=
=BkCA
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-defconfig-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Renesas ARM64 Based SoC Defconfig Updates for v4.19
* Enable BD9571MWV regulator in ARM64 defconfig
This is to allow wider testing of the BD9571 PMIC which is
present on boards with Renesas R-Car Gen3 SoCs
* tag 'renesas-arm64-defconfig-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: defconfig: Enable BD9571MWV regulator
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update device tree sources to use SPDX identifiers for license.
- Add cooling device property '#cooling-cells' for all CPUs of
a cluster.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbUpInAAoJEFBXWFqHsHzOVXAH/Rp2MvE/TQckMeB1HVUczu30
Lp3Q/SkdE8TRBdYmXscfMZtvzftZK127c+1NLb6Reo6HVvuGAnVIJgbkexj5Zq3N
BaPwsVO5GzVZn5IL6cWAyWerNpq/bQKRLkj/AkMtVDha1sAUK0Mudxjc1YJU1r7n
ZaIVxMNaaHK0gCVmK3PgQs8d/tHiszp2rWWuyoRFMMUlQFqHr5VseK8QLzk5dfUa
Ieva2igKpoL4TIyFfbVhUD9J9FJrve9W1TQZpreOZBgZmkSEGqj5vAmEVqDD4O4y
CwNKgemjQ9mfBCHH29lMl1xh1sPMSORVBVbzS5XUvVXypViOMNghGpL/I2OIk5o=
=2P5W
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale arm64 device tree update for 4.19:
- Update device tree sources to use SPDX identifiers for license.
- Add cooling device property '#cooling-cells' for all CPUs of
a cluster.
* tag 'imx-dt64-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: freescale: Add missing cooling device properties for CPUs
arm64: dts: freescale: Update to use SPDX identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>
Corrections:
* Remove non-existing STBE region from Ether-AVB node in DT of
R-Car E3 (r8a77990) SoC
This region does not exist on this SoC
Cleanups:
* Consistently use rwdt as label for Renesas Watchdog Timer devices
* Add second port to rcar_sound placeholder in DT of R-Car M3-N (r8a77965) SoC
Nodes with #address-cells/#size-cells should have more than one child node
* Fix adv7482 decimal unit addresses in DT of Salvator-X and -XS boards
Addresses are assumed to be hex by dtc, thus it is not valid to use
decimal
Enhancements:
* Describe in DT:
- INTC-EX of R-Car V3H (r8a77980) SoC
- USB3.0 of R-Car E3 (r8a77980) SoC
- All SCIF and HSCIF devices of R-Car D3 (r8a77995) SoC.
Previously only SCIF2, used as the debug consile, was described.
- All IPMMU devicesof R-Car M3-N (r8a77965), V3H (r8a77980) and
E3 (r8a77990) SoCs
* Enable USB3.0 in DT of R-Car E3 (r8a77980) based Ebisu board
* Prefer HSCIF1 over SCIF1 in DT of Salvator-X and -XS boards
HSCIF is superior to SCIF (larger FIFOs, more accurate and wider
supported range of bitrates).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAltRy/kACgkQ189kaWo3
T75YAw//dZT9bQPdLMGieRr72DbqjYKnje5BJJ+kou5qWY9Q4J1m0M6YIkMLUoWU
Aon0ohO2XKKfaiR9HS/rpsXeUqaOmYxVMXr5nlA9CloeGoZGlTudE4hxoR3sMRZu
/uJ/CiqrWchGp5XE9BZpN2NER0mW6Hwsha2nM5pWsO/zQix+X3nqJ+vcOQEvrO5L
CIQ0W+In1tHDrKQdsQwxRRwWq+UqqdHNEsuyHLa05RpPCrGE1un2Y7ijeNRsHRt6
TWsfZPWsnwz1skGRJRRtvSNu+0TFbza08qBv8ZMtxWzZjj1cVBFKWcH1gZL9JFhu
HHS1G9axWzwohyVcpTYb8sziJugsEBBAbq3CuCJXF2TRflfzMWGNuU3eh2PT4r/f
tqE4MUNio7xywhnWZObyKFxHQqjm/yBKfr///n7qw+VyJonVBoSdv3tluk9HGRQM
KxZ+tEHNRJSCYJTZrpwfITkvRhXvOo3+S3k3w5wqz4sn0UjXJacvzHd7E97nXKQE
7Mi0VZg4h2HDLzXwFRYKt7d1a7iwR1vpM3tVmmxaUviKs03739MtAJnNiSNDQm98
quCwGKIJxVXwXbzgQgXyud8n6xIHj++moTzoqG3NwEzMDX30w9jJ0EUmuAx2hMA5
DpIvBjRHt7ctSKcAAuondW/aAaTJOzlFzJbPjuG31vkA1CltBY0=
=yZLk
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM64 Based SoC DT Updates for v4.19
Corrections:
* Remove non-existing STBE region from Ether-AVB node in DT of
R-Car E3 (r8a77990) SoC
Cleanups:
* Consistently use rwdt as label for Renesas Watchdog Timer devices
* Add second port to rcar_sound placeholder in DT of R-Car M3-N (r8a77965) SoC
* Fix adv7482 decimal unit addresses in DT of Salvator-X and -XS boards
Enhancements:
* Describe in DT:
- INTC-EX of R-Car V3H (r8a77980) SoC
- USB3.0 of R-Car E3 (r8a77980) SoC
- All SCIF and HSCIF devices of R-Car D3 (r8a77995) SoC.
Previously only SCIF2, used as the debug consile, was described.
- All IPMMU devicesof R-Car M3-N (r8a77965), V3H (r8a77980) and
E3 (r8a77990) SoCs
* Enable USB3.0 in DT of R-Car E3 (r8a77980) based Ebisu board
* Prefer HSCIF1 over SCIF1 in DT of Salvator-X and -XS boards
* tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: r8a77980: add INTC-EX support
arm64: dts: renesas: r8a77990: Enable USB3.0 host for Ebisu board
arm64: dts: renesas: r8a77995: Add SCIF {0,1,3,4,5} and all HSCIF device nodes
arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes
arm64: dts: renesas: Unify the labels for RWDT
arm64: dts: renesas: salvator-common: Prefer HSCIF1 over SCIF1
arm64: dts: renesas: r8a77965: Add second port to rcar_sound placeholder
arm64: dts: renesas: salvator-common: Fix adv7482 decimal unit addresses
arm64: dts: renesas: r8a77990: Remove non-existing STBE region
Signed-off-by: Olof Johansson <olof@lixom.net>
- Tidy up MMC properties for hi3660
- Remove keep-power-in-suspend on hikey and hikey960 to
avoid keeping wifi power during suspend and let the
user enable it if required
- Update idle states for hikey960
- Add missing cooling device properties for cpus on hi6220
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJbUGAEAAoJEAvIV27ZiWZc85wQAKQkr3xovlKaFbFgRjo07qaN
+VV5/Fe0i6NQpvjg+dxwNqrUQHvgUEPNhLn70a5UM9/1CV3Iltx6DkImC50deIor
V3fy/IYi5Ud/qYRRTt/J498SPR1zSdLrDVt7gLrAjg3ipREh5MT9TYh6ADOSdfx5
SHLbzC6BTfAR9it5hTrZb2P2zKicA1LNHVfTzmJaHk5eOoqN2S9F0KXni7a9nv5q
LtZS7opR7Kx47iy++E1IOuorNQIFFCKQJWyNvKGzTBkCEKI9xa8pXlSyueKOPPuh
f6ClYSUZnHIM+s6Kly54aFPoPx00Y5djr0svh1j3hJ4IPGQ8nCF9gMYk3G5eO5Rf
/SuCgYhkkBZTXWg/L4I1jkRzfn99yFu+X6Uh/bafOrBVYEzehgucisgNi+T1urTY
oKBQdXaq7LYES3S/PLIVBTat7NkGBN+sbe4cLtBc4RBHcmzI1iy+hKxr+uruhoOC
lh10KCfpfQ3uazAi8kxAu8iJq6LEDfml2ymT5EMNSVKr8IQCxTLTcAJBR7HbFlY+
xSkOqcVj5pHu89UArF34Dwm9TFcujhqdjp6rI/OXIK1CbvWihgMU4/TvBcYu9yZv
TvOox4fQsGAzHAhDJZjTOBZ7IiU8hIVX+/irBP77LEyltczL8yM9PNsyIsgyLkGY
teK3K2epJUzpIMe30oZg
=070t
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-4.19v2' of git://github.com/hisilicon/linux-hisi into next/dt
ARM64: DT: Hisilicon SoC DT updates for 4.19v2
- Tidy up MMC properties for hi3660
- Remove keep-power-in-suspend on hikey and hikey960 to
avoid keeping wifi power during suspend and let the
user enable it if required
- Update idle states for hikey960
- Add missing cooling device properties for cpus on hi6220
* tag 'hisi-arm64-dt-for-4.19v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Add missing cooling device properties for CPUs
arm64: hikey960: update idle-states
arm64: dts: hikey: Remove keep-power-in-suspend property
arm64: dts: hikey960: Remove keep-power-in-suspend property
arm64: dts: hikey960: Clean up MMC properties and move to proper file
arm64: dts: hikey960: Remove deprecated MMC properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Current LED trigger, 'bt', is not known/used by any existing driver.
Fix this by renaming it to 'bluetooth-power' trigger which is
controlled by the Bluetooth subsystem.
Fixes: 9943230c88 ("arm64: dts: qcom: Add apq8016-sbc board LED's related device nodes")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In commit 8e4947ee477d ("arm64: dts: qcom: sdm845: Add I2C, SPI, and
UART9 nodes") I accidentally forgot to add the line:
status = "disabled";
to qupv3_id_0 to match qupv3_id_1. Add it now. NOTE: right now the
only sdm845 board with a device tree in mainline is MTP and that board
currently doesn't have any peripherals under qupv3_id_0. If any board
was currently using peripherals under qupv3_id_0 then that board would
need to add this snippet to their board dts file:
&qupv3_id_0 {
status = "okay";
};
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Drop legacy suffix for clocks used by MSM DRM driver.
The _clk suffix has been deprecated since commit 20c3bb80235 ("drm/msm:
drop _clk suffix from clk names").
Fixes: 720c3bb802 (drm/msm: drop _clk suffix from clk names)
The following warnings during boot have been seen since the referenced
fixes commit:
msm_dsi_phy 1a98300.dsi-phy: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm 1a00000.mdss: Using legacy clk name binding. Use "vsync" instead of "vsync_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "core" instead of "core_clk"
msm_mdp 1a01000.mdp: Using legacy clk name binding. Use "vsync" instead of "vsync_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "mdp_core" instead of "mdp_core_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "iface" instead of "iface_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "bus" instead of "bus_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "byte" instead of "byte_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "pixel" instead of "pixel_clk"
msm_dsi 1a98000.dsi: Using legacy clk name binding. Use "core" instead of "core_clk"
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
QCOM IPQ8074 boards contain NAND flash memory for which
this config needs to be enabled.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add gpio-line-names property for Dragonboard820c based on APQ8096 SoC.
There are 4 gpio-controllers present on this board, including the
APQ8096 SoC, PM8994 (GPIO and MPP) and PMI8994 (GPIO).
Lines names are derived from 96Boards CE Specification 1.0, Appendix
"Expansion Connector Signal Description". Line names for PMI8994 MPP
pins are not added due to the absence of the gpio-controller support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the rpmh-clk node to sdm845 based on the examples in the
bindings.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the rpmh-rsc node to sdm845 based on the examples in the
bindings.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The debug UART is very useful to have. I2C10 is enabled as an example
of a I2C port we can talk on for now. Eventually we'll want to put
peripherals under it.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
ports, and UART9. Note that I2C / SPI / UART are a bit strange on
sdm845 because each "serial engine" has 4 pins associated with it and
depending on which firmware has been loaded into the serial engine
(loaded by the BIOS) the serial engine can behave like an I2C port, a
SPI port, or a UART. As per the landed bindings that means that we
need to create one node for each possible mode that the port could be
in. With 16 serial engines that means 16 x 3 = 48 nodes.
We get away with only creating 33 nodes for now because it seems very
likely that SDM845-based boards will actually all use the same UART
(UART 9) for debug purposes. While another UART could be used for
something like Bluetooth communication we can cross that path when we
come to it. Some documentation that I saw implied that using a UART
for "high speed" communications actually needs yet another different
serial engine firmware anyway.
Note that quick measurements adding all these nodes adds <10k of extra
space per dtb that they're included with. If this becomes a problem
we may need to think of a different way to structure this so that
boards only get the nodes they need (or figure out how to get dtc to
strip 'disabled' nodes). For now it seems OK.
These nodes were programmatically generated with a fairly dumb python
script. See http://crosreview.com/1091631 for the source.
NOTE: at the moment SPI chip select doesn't appear to work in my tests
with the latest posted SPI driver. All testing of SPI with this patch
has been done by hacking SPI to GPIO chip select.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add basic support for the pm8005 and pm8998 PMICs. For now just support
the GPIO controllers.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The get/set events helpers to do some work to check reserved
and padding fields are zero. This is useful on 32bit too.
Move this code into virt/kvm/arm/arm.c, and give the arch
code some underscores.
This is temporarily hidden behind __KVM_HAVE_VCPU_EVENTS until
32bit is wired up.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Dongjiu Geng <gengdongjiu@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
For the arm64 RAS Extension, user space can inject a virtual-SError
with specified ESR. So user space needs to know whether KVM support
to inject such SError, this interface adds this query for this capability.
KVM will check whether system support RAS Extension, if supported, KVM
returns true to user space, otherwise returns false.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Reviewed-by: James Morse <james.morse@arm.com>
[expanded documentation wording]
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
For the migrating VMs, user space may need to know the exception
state. For example, in the machine A, KVM make an SError pending,
when migrate to B, KVM also needs to pend an SError.
This new IOCTL exports user-invisible states related to SError.
Together with appropriate user space changes, user space can get/set
the SError exception state to do migrate/snapshot/suspend.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Reviewed-by: James Morse <james.morse@arm.com>
[expanded documentation wording]
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
When running on a non-VHE system, we initialize tpidr_el2 to
contain the per-CPU offset required to reach per-cpu variables.
Actually, we initialize it twice: the first time as part of the
EL2 initialization, by copying tpidr_el1 into its el2 counterpart,
and another time by calling into __kvm_set_tpidr_el2.
It turns out that the first part is wrong, as it includes the
distance between the kernel mapping and the linear mapping, while
EL2 only cares about the linear mapping. This was the last vestige
of the first per-cpu use of tpidr_el2 that came in with SDEI.
The only caller then was hyp_panic(), and its now using the
pc-relative get_host_ctxt() stuff, instead of kimage addresses
from the literal pool.
It is not a big deal, as we override it straight away, but it is
slightly confusing. In order to clear said confusion, let's
set this directly as part of the hyp-init code, and drop the
ad-hoc HYP helper.
Reviewed-by: James Morse <james.morse@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add the CPU PMU on sdm845 to get perf support for hardware events.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset.
There are two variants:
- 1 GiB or 2 GiB of DDR3 memory
- 8 GB or 16 GB eMMC flash
Both variants come with:
- 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not
support Bluetooth)
- an LED 7 segment display with an FD628 controller
- HDMI and AV (CVBS) output
- 2x USB (utilizing both USB ports provided by the SoC)
- micro SD card slot
- serial console (uart_AO) has to be soldered after opening the case
The board seems to be very similar to the P23x and Q20x reference
boards, which is why it includes meson-gx-p23x-q20x.dtsi:
- eMMC reset routed to BOOT_9
- the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference
clock is 32.768KHz on PWM_E
- SD card detection is routed to CARD_6
- vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT)
- uart_AO can be accessed after opening the case and soldering RX, TX
and GND lines onto the exposed solder points (marked with RX, TX and
GND)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S905W is a new SoC from the GXL series. It is a cost-reduced version of
the S905X.
The P281 development board from Amlogic uses the same layout as the P231
(S905D development board). Thus the new P281 board inherits
meson-gx-p23x-q20x.dtsi to avoid code-duplication.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock controller. It provides the clocs for the all the devices of
the audio subsystem, such as tdms, spdif, pdm, etc.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add initial device tree support for Mediatek X20 Development Board
based on MT6797 Deca core SoC. This board is one of the 96Boards
Consumer Edition platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Spdif out in not multiplexed on gpio A7 (spdif in is)
Remove this entry to fix the problem.
Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Regulator should not be defined inside the SoC dtsi file.
vddio_ao18 is already defined in the S400 board dts anyway.
Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Jonathan Cameron
Herbert Xu
Arun Parameswaran
Amit Kucheria
David S. Miller
Linus Torvalds
Ingo Molnar
Christoph Hellwig
Olof Johansson
Masahiro Yamada
Ard Biesheuvel
Will Deacon
Bhupesh Sharma
Michael O'Farrell
Dave Kleikamp
Ben Hutchings
Eric Biggers
Kirill A. Shutemov
Laura Abbott
Baolin Wang
Johannes Weiner
Dirk Mueller
Jerome Brunet
Shohei Maruyama
Enric Balletbo i Serra
Arnd Bergmann
AKASHI Takahiro
James Morse
Mark Rutland
Lukas Wunner
Loic Poulain
Douglas Anderson
Niklas Cassel
Abhishek Sahu
Manivannan Sadhasivam
Stephen Boyd
Dongjiu Geng
Marc Zyngier
Martin Blumenstingl