Commit Graph

1011 Commits

Author SHA1 Message Date
Milo Kim be53e38f0d dt-bindings: mfd: Remove TPS65217 interrupts
Interrupt numbers are from the datasheet, so no need to keep them in
the ABI. Use the number in the DT file.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-12-27 10:06:00 -08:00
jbrunet 308d3165d8 dt: bindings: net: use boolean dt properties for eee broken modes
The patches regarding eee-broken-modes was merged before all people
involved could find an agreement on the best way to move forward.

While we agreed on having a DT property to mark particular modes as broken,
the value used for eee-broken-modes mapped the phy register in very direct
way. Because of this, the concern is that it could be used to implement
configuration policies instead of describing a broken HW.

In the end, having a boolean property for each mode seems to be preferred
over one bit field value mapping the register (too) directly.

Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-20 13:50:50 -05:00
Linus Torvalds 991688bfc6 ARM: SoC driver updates for v4.10
Driver updates for ARM SoCs, including a couple of newly added drivers:
 
 - A new driver for the power management controller on TI Keystone
 - Support for the prerelease "SCPI" firmware protocol that ended up
   being shipped by Amlogic in their GXBB SoC.
 - A soc_device can now be matched using a glob from inside the
   kernel, when another driver wants to know the specific chip
   it is running on and cannot find out from DT, firmware or hardware.
 - Renesas SoCs now support identification through the soc_device
   interface, both in user space and kernel.
 - Renesas r8a7743 and r8a7745 gain support for their system controller
 - A new checking module for the ARM "PSCI" (not to be confused
   with "SCPI" mentioned above) firmware interface.
 - A new driver for the Tegra GMI memory interface
 - Support for the Tegra firmware interfaces with their
   power management controllers
 
 As usual, the updates for the reset controller framework are merged
 here, as they tend to touch multiple SoCs as well, including a new
 driver for the Oxford (now Broadcom) OX820 chip and the Tegra
 bpmp interface.
 
 The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
 Rockchips SoCs see some further updates.
 
 Conflicts:
 - ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
 - drivers/soc/renesas/Makefile: multiple files got added, keep
   all in logical sorting
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMaGWCrR//JCVInAQLs5RAA3I1I8/R+pd5jfMaAB8Od3S4g8YSqIDjC
 EIOoDPx9GDV70+cGs4ea+L9bfGs3ePGivCtcbftNsLDAueQ2jKMa3ShqxA/MMbJE
 rWQi/ARaDFY0nHL8VPWq7XyYwwrah+/gKBr8UhkaKI0vy6DBqxyCknrS2kgF88rv
 DVs2wnRvDM7GVUax0JDzuySR7BXJIuUfS78jPMESASbTQktsZTFUyH+osiqHtptD
 M5bPC8rxOeZXljt3DOvXSdK9rVnji/A3nznY4r3tlt805eaOA7CzjVSsY27WQel0
 63uj+FgE+eM0sECIxpkNbH/HHq2V4QkUoy3fk0xPkzRbllBBpS+UieGamTnPJup8
 wf5uiH1IqLLLV9F/504S92fp0pgFPpOGYWZnBDlIbh3aGq4tMjIRqRYMTyCT02hN
 +b54v0SuImFiN6p8HMS1ugYQ+1m9TU40b5pZkzkTJbSQOMm6oi3j0A0orXU/TPKd
 FVMrlUyfh+yu+vs1hGWLs1+mBjFnxXzSc8yJeaCdX4MvCY5/aVJZ+cwq4Bk+1YU5
 9Qhkeo5JV/l9FlrjxomnEq3l/WV/pFmj7JRZsb1BM88m+5LYUf2lv11b5B4FvrTd
 yx8SSpe3+ofIijdNbJ8IywF6y0OXF6UnrlouOVdSIp+wPs+pibdU/5gQep16pvqd
 WW6sVWn6quA=
 =6dP8
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - A new driver for the power management controller on TI Keystone

   - Support for the prerelease "SCPI" firmware protocol that ended up
     being shipped by Amlogic in their GXBB SoC.

   - A soc_device can now be matched using a glob from inside the
     kernel, when another driver wants to know the specific chip it is
     running on and cannot find out from DT, firmware or hardware.

   - Renesas SoCs now support identification through the soc_device
     interface, both in user space and kernel.

   - Renesas r8a7743 and r8a7745 gain support for their system
     controller

   - A new checking module for the ARM "PSCI" (not to be confused with
     "SCPI" mentioned above) firmware interface.

   - A new driver for the Tegra GMI memory interface

   - Support for the Tegra firmware interfaces with their power
     management controllers

  As usual, the updates for the reset controller framework are merged
  here, as they tend to touch multiple SoCs as well, including a new
  driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
  interface.

  The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
  Rockchips SoCs see some further updates"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  misc: sram: remove useless #ifdef
  drivers: psci: Allow PSCI node to be disabled
  drivers: psci: PSCI checker module
  soc: renesas: Identify SoC and register with the SoC bus
  firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
  firmware: qcom: scm: Remove core, iface and bus clocks dependency
  dt-bindings: firmware: scm: Add MSM8996 DT bindings
  memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
  bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
  ARM: shmobile: Document DT bindings for Product Register
  soc: renesas: rcar-sysc: add R8A7745 support
  reset: Add Tegra BPMP reset driver
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
  ...
2016-12-15 16:03:25 -08:00
Linus Torvalds 786a72d791 ARM: DT updates for v4.10
Lots of changes as usual, so I'm trying to be brief here. Most of the
 new hardware support has the respective driver changes merged through
 other trees or has had it available for a while, so this is where things
 come together.
 
 We get a DT descriptions for a couple of new SoCs, all of them variants
 of other chips we already support, and usually coming with a new
 evaluation board:
 
 - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
 - Qualcomm MDM9615 LTE baseband
 - NXP imx6ull, the latest and smallest i.MX6 application processor variant
 - Renesas RZ/G (r8a7743 and r8a7745) application processors
 - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
 - Rockchip rk1108 single-core application processor
 - ST stm32f746 Cortex-M7 based microcontroller
 - TI DRA71x automotive processors
 
 These are commercially available consumer platforms we now support:
 - Motorola Droid 4 (xt894) mobile phone
 - Rikomagic MK808 Android TV stick based on Rockchips rx3066
 - Cloud Engines PogoPlug v3 based on OX820
 - Various Broadcom based wireless devices:
   - Netgear R8500 router
   - Tenda AC9 router
   - TP-LINK Archer C9 V1
   - Luxul XAP-1510 Access point
 - Turris Omnia open hardware router based on Armada 385
 
 And a couple of new boards targeted at developers, makers
 or industrial integration:
 - Macnica Sodia development platform for Altera socfpga (Cyclone V)
 - MicroZed board based on Xilinx Zynq FPGA platforms
 - TOPEET itop/elite based on exynos4412
 - WP8548 MangOH Open Hardware platform for IOT, based on
   Qualcomm MDM9615
 - NextThing CHIP Pro gadget
 - NanoPi M1 development board
 - AM571x-IDK industrial board based on TI AM5718
 - i.MX6SX UDOO Neo
 - Boundary Devices Nitrogen6_SOM2 (i.MX6)
 - Engicam i.CoreM6
 - Grinn i.MX6UL liteSOM/liteBoard
 - Toradex Colibri iMX6 module
 
 Other changes:
 - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
   mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
   mvebu, allwinner, broadcom, exynos, zynq
 
 - Continued fixes for W=1 dtc warnings
 
 - The old STiH415/416 SoC support gets removed, these never made it into
   products and have served their purpose in the kernel as a template
   for teh newer chips from ST
 
 - The exynos4415 dtsi file is removed as nothing uses it.
 
 - Intel PXA25x can now be booted using devicetree
 
 Conflicts:
 arch/arm/boot/dts/r8a*.dtsi: a node was added
 the clk tree, keep both sides and watch out for git
 dropping the required '};' at the end of each side.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMZHGCrR//JCVInAQKQ6A/+Og42qy1rhL3cfHiSsT7e5giQNVSFY7Cm
 Z06R83AEv6HDMTNzyiJr5udRGOhm40qIoe92fhVJSRF7F6o/GbCQ7YOyU4KdQELg
 caqRCe1Nq6RT0RYU0m6xVyv/ox0JTNEaB+TcvD1x4pgUQNo9sSBfiXpTzOKhLhqs
 zmsfpNpj8v188Iofoju3WtwN26riJ7P4QdYIaNaH4qNQgoQbMbQICDwnpSsNJY+x
 MSlNrbtYqfz6vc5fqa0mtfhF6wIFxuRnTgSLi9skWZ2l/fkn4ljF3RhN1Z86TYPv
 CYsqDu+DF0YNxFrht3BAK6WTe2PdCnMNLNnMhYC6NDQ8YG1tbwvXQFM1KVanRvxx
 hXP4Nt2sZYiqA4v8joFPgp9gnyBMdhtJEtWSmHwCY0RFObySJR4I1GY7igh02HUJ
 gxlmOYcmklzLiyXvfjdDvg0sCV1tBhaBKTLYxF7lVCzG2QaR22Le+p3o+SWm+e+V
 Ruc9l/iwHaeasNnbAkDEiEyi1FobtuEeTSZnKaXfKX8WuKVZLJrCEm7WiRIsj0Ww
 vJ9ABVft7PEv/Ov3fbKBWON4vxKTBBgHuEDcbIsp19w4BSH1WJf5bGXIm7QeA3Z9
 aD+DtA5W5ExIjMQR2+qgz/BBIzVVVVvG8DEcdcCtc3JGRJll5PadShLdqKjVIerc
 SpsxqCKoRCI=
 =wJt3
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "Lots of changes as usual, so I'm trying to be brief here. Most of the
  new hardware support has the respective driver changes merged through
  other trees or has had it available for a while, so this is where
  things come together.

  We get a DT descriptions for a couple of new SoCs, all of them
  variants of other chips we already support, and usually coming with a
  new evaluation board:

   - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
   - Qualcomm MDM9615 LTE baseband
   - NXP imx6ull, the latest and smallest i.MX6 application processor variant
   - Renesas RZ/G (r8a7743 and r8a7745) application processors
   - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
   - Rockchip rk1108 single-core application processor
   - ST stm32f746 Cortex-M7 based microcontroller
   - TI DRA71x automotive processors

  These are commercially available consumer platforms we now support:

   - Motorola Droid 4 (xt894) mobile phone
   - Rikomagic MK808 Android TV stick based on Rockchips rx3066
   - Cloud Engines PogoPlug v3 based on OX820
   - Various Broadcom based wireless devices:
      - Netgear R8500 router
      - Tenda AC9 router
      - TP-LINK Archer C9 V1
      - Luxul XAP-1510 Access point
   - Turris Omnia open hardware router based on Armada 385

  And a couple of new boards targeted at developers, makers or
  industrial integration:

   - Macnica Sodia development platform for Altera socfpga (Cyclone V)
   - MicroZed board based on Xilinx Zynq FPGA platforms
   - TOPEET itop/elite based on exynos4412
   - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
   - NextThing CHIP Pro gadget
   - NanoPi M1 development board
   - AM571x-IDK industrial board based on TI AM5718
   - i.MX6SX UDOO Neo
   - Boundary Devices Nitrogen6_SOM2 (i.MX6)
   - Engicam i.CoreM6
   - Grinn i.MX6UL liteSOM/liteBoard
   - Toradex Colibri iMX6 module

  Other changes:

   - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
     mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
     mvebu, allwinner, broadcom, exynos, zynq

   - Continued fixes for W=1 dtc warnings

   - The old STiH415/416 SoC support gets removed, these never made it
     into products and have served their purpose in the kernel as a
     template for teh newer chips from ST

   - The exynos4415 dtsi file is removed as nothing uses it.

   - Intel PXA25x can now be booted using devicetree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
  arm: dts: zynq: Add MicroZed board support
  ARM: dts: da850: enable high speed for mmc
  ARM: dts: da850: Add node for pullup/pulldown pinconf
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: artpec: add pcie support
  ARM: dts: add support for Turris Omnia
  devicetree: Add vendor prefix for CZ.NIC
  ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
  ARM: dts: berlin2q-marvell-dmp: fix regulators' name
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ...
2016-12-15 15:50:24 -08:00
Linus Torvalds ce38207f16 sound updates for 4.10-rc1
No dramatic changes are found in this development cycle, but as usual,
 many commits are applied in a wide range of drivers.
 
 Most of big changes are in ASoC, where a few bits of framework work
 and quite a lot of cleanups and improvements to existing code have
 been done.  The rest are usual stuff, a few HD-audio and USB-audio
 quirks and fixes, as well as the drop of kthread usages in the whole
 subsystem.
 
 Below are some highlights:
 
 ASoC:
 - Support for stereo DAPM controls
 - Some initial work on the of-graph sound card
 - regmap conversions of the remaining AC'97 drivers
 - A new version of the topology ABI; this should be backward compatible
 - Updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
   Intel skylake, atom-sst
 - New drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
   Realtek RT5665
 
 USB-audio:
 - Yet another race fix at disconnection
 - Tolerated packet size calculation for some Android devices
 - Quirks for Axe-Fx II, QuickCam, TEAC 501/503
 
 HD-audio:
 - Improvement of Dell pin fixup mapping
 - Quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic
 
 Misc:
 - Replace all kthread usages with simple works
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJYUGNQAAoJEGwxgFQ9KSmkc3kP/jS5EDPWb6dwqdlZomT0lumR
 flpvLLo6TWTi9CS8MkC1hPHbR+3LGPMUL8Wwf2cVb06dvKpUHa5P3Wq6lMm6T9wO
 1ExhnHeDEDfGXop3/EuADmpRsfsV+z/PpWYmGB0vkoyPTg7e3xQRA6Im6p6IMi45
 pnvEaSe18oEidqzAxaBgBFTdoNyaD9zrPL5J9Jh0/JCZ/kSmY6hhI+hlTjjOKCR6
 fs4ge2WreonAKbhfOE61eE2KDnQA4II/2JUoPA42wZOat9ukb8DiErgHoFgsWTtE
 h+/ZN5Qj3dweP3+NIKsWrmfC6qzTt9OnUNPB2O0A+UYmAMQBjBz9KVxW1FHyTqBp
 ewATtvCNIQs+uPMaO/Q/Qo3ZkKLf/W7o/Dt2u/orSrnQ2plKgIOiHJodhXlTrOWm
 szF+qJq0xRB7+/dZa+gDjGPAjirr6n3Fv7wrJmqfyF0hLaIEy4wa2Rd/IAZ9Ar46
 5S4prL2Ba1CKf1YV27DR1bjUTAonlApfczNp+urCGQJCfZ0kQOAhZJQ/mbMOgSDS
 KEC0vY6NLr88b19OETS4oQZ0ixxIAm8hwAle6z39GGhGZ8JWH5+JRzy8emVh2bss
 lpFLFHLwK+a+JHxmnOniJW9AlC8I7hVqfS63qaTXfvDnMMcRd5fMgniZt8bTWc2/
 F5hsE83JUlcA8Owfyoca
 =WZeb
 -----END PGP SIGNATURE-----

Merge tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "No dramatic changes are found in this development cycle, but as usual,
  many commits are applied in a wide range of drivers.

  Most of big changes are in ASoC, where a few bits of framework work
  and quite a lot of cleanups and improvements to existing code have
  been done. The rest are usual stuff, a few HD-audio and USB-audio
  quirks and fixes, as well as the drop of kthread usages in the whole
  subsystem.

  Below are some highlights:

  ASoC:
   - support for stereo DAPM controls
   - some initial work on the of-graph sound card
   - regmap conversions of the remaining AC'97 drivers
   - a new version of the topology ABI; this should be backward
     compatible
   - updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
     Intel skylake, atom-sst
   - new drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
     Realtek RT5665

  USB-audio:
   - yet another race fix at disconnection
   - tolerated packet size calculation for some Android devices
   - quirks for Axe-Fx II, QuickCam, TEAC 501/503

  HD-audio:
   - improvement of Dell pin fixup mapping
   - quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic

  Misc:
   - replace all kthread usages with simple works"

* tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (296 commits)
  ALSA: hiface: Fix M2Tech hiFace driver sampling rate change
  ALSA: usb-audio: Eliminate noise at the start of DSD playback.
  ALSA: usb-audio: Add native DSD support for TEAC 501/503 DAC
  ASoC: wm_adsp: wm_adsp_buf_alloc should use kfree in error path
  ASoC: topology: avoid uninitialized kcontrol_type
  ALSA: usb-audio: Add QuickCam Communicate Deluxe/S7500 to volume_control_quirks
  ALSA: usb-audio: add implicit fb quirk for Axe-Fx II
  ASoC: zte: spdif: correct ZX_SPDIF_CLK_RAT define
  ASoC: zte: spdif and i2s drivers are not zx296702 specific
  ASoC: rsnd: setup BRGCKR/BRRA/BRRB when starting
  ASoC: rsnd: enable/disable ADG when suspend/resume timing
  ASoC: rsnd: tidyup ssi->usrcnt counter check in hw_params
  ALSA: cs46xx: add a new line
  ASoC: Intel: update bxt_da7219_max98357a to support quad ch dmic capture
  ASoC: nau8825: disable sinc filter for high THD of ADC
  ALSA: usb-audio: more tolerant packetsize
  ALSA: usb-audio: avoid setting of sample rate multiple times on bus
  ASoC: cs35l34: Simplify the logic to set CS35L34_MCLK_CTL setting
  ALSA: hda - Gate the mic jack on HP Z1 Gen3 AiO
  ALSA: hda: when comparing pin configurations, ignore assoc in addition to seq
  ...
2016-12-14 11:14:28 -08:00
Linus Torvalds b8d2798f32 This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds another
 clk_get() variant. The rest of the changes are in drivers for various SoCs, and
 we have a few bits for ARM shmobile architecture code (dts and mach) due to the
 dependency we're breaking between shmobile architecture code and its clk
 driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
 summary:
 
 Core:
 
  - Support for devm_get_clk_from_child() used with DT bindings that have
    subnodes with the 'clocks' property
 
 New Drivers:
 
  - Allwinner A64 (sun50i)
  - i.MX imx6ull
  - Socionext's UniPhier SoC CPUs
  - Mediatek MT2701 SoCs
  - Rockchip rk1108 SoCs
  - Qualcomm MSM8994/MSM8992 SoCS
  - Qualcomm RPM Clocks
  - Hisilicon Hi3516CV300 and Hi3798CV200 CRG
  - Oxford Semiconductor OX820 and OX810SE SoCs
  - Renesas RZ/G1M and RZ/GIE SoCs
  - Renesas R-Car RST driver for mode pin states
 
 Updates:
 
  - Four Allwinner SoCs are migrated to the new style clk driver
  - Rockchip rk3399,rk3066 PLL optimizations
  - i.MX LVDS display glitch fixes and AV PLL precision improvements
  - Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
  - Explicit demodularization of always builtin drivers
  - Freescale Qoriq ls1012a and ls1046a support
  - Exynos 5433 parent typo fix and critical clock tagging
  - Renesas r8a7743/r8a7745 CPG
  - Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
  - stm32f4* LSI, LSE, RTC, and QSPI clocks
  - pxa27x and pxa25x cpufreq as clks
  - TI omap36xx sprz319 advisory 2.1 workaround
  - Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJYT1GXAAoJEK0CiJfG5JUlQ1QP/iOaWnE8TBLK/lOKPte2rw8U
 1rw2SDQ8gEJBGIVbZZsnOq6Pp1sVKrJ/7S9ybBeSHoOVb5iTCVAB4wG5uqdLLUGs
 4cHj4Vtge7xSxPLCh6YzawS0SjbtbYp1KXHBygGB2COIF53zphkmuM74gZ+l3dcz
 TMkfbIvwm8ISvNjc7tRpjhzf6+XUTIVRJ6UZPMnir08lTmDqHz7mouY7nUxlbWOy
 lOlF725RoBSa4LcBt+nZcNZ7Cu8eajFneeE87YiLdM4aS/VYm1Ajs9KzZYIRM3R6
 mznmiSDwCWTOzU4CsPSdcxGXePzyPrkDvRGWED2qHXNwWQ7Asbtm5pxDKEJ+rj8L
 LoB60z20d5PP0zJeiSwnr3XOgp95gW6vduAngu094O7FDZV7yY90wENIphQqgHaU
 5nVEPYWTK3lrxAShadpHvnyZI5A621QbNYzAoCAM/jf5xa3JW+AbkERmO/RyEsTO
 s6gAKX9H4WiQsEHrmBpJ+VsVVmlT5fhCtqskohaEqFg9CaVaxXvTPzN2fO9KtbDC
 M6JPycE9qgu08TWTyJr9xGDGBh0mKP+7ffxpj1x1gVT59HmCLAGTMEvMuHAfKCfW
 vz6qPjWW4KnqwAY0JvDZy1y37YQMytA5PVidV/XsEM7WLnmbutTCEbmwIx8eUNGv
 NaEpc4l2hvKLwCo4w0J+
 =RXZr
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is a fairly quiet release. We don't have any patches to the core
  framework. The only patch that can even be considered "core" adds
  another clk_get() variant. The rest of the changes are in drivers for
  various SoCs, and we have a few bits for ARM shmobile architecture
  code (dts and mach) due to the dependency we're breaking between
  shmobile architecture code and its clk driver. Those shmobile bits
  have also been pulled into arm-soc tree. Here's the summary:

  Core:

   - Support for devm_get_clk_from_child() used with DT bindings that
     have subnodes with the 'clocks' property

  New Drivers:

   - Allwinner A64 (sun50i)
   - i.MX imx6ull
   - Socionext's UniPhier SoC CPUs
   - Mediatek MT2701 SoCs
   - Rockchip rk1108 SoCs
   - Qualcomm MSM8994/MSM8992 SoCS
   - Qualcomm RPM Clocks
   - Hisilicon Hi3516CV300 and Hi3798CV200 CRG
   - Oxford Semiconductor OX820 and OX810SE SoCs
   - Renesas RZ/G1M and RZ/GIE SoCs
   - Renesas R-Car RST driver for mode pin states

  Updates:

   - Four Allwinner SoCs are migrated to the new style clk driver
   - Rockchip rk3399,rk3066 PLL optimizations
   - i.MX LVDS display glitch fixes and AV PLL precision improvements
   - Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
     support
   - Explicit demodularization of always builtin drivers
   - Freescale Qoriq ls1012a and ls1046a support
   - Exynos 5433 parent typo fix and critical clock tagging
   - Renesas r8a7743/r8a7745 CPG
   - Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
   - stm32f4* LSI, LSE, RTC, and QSPI clocks
   - pxa27x and pxa25x cpufreq as clks
   - TI omap36xx sprz319 advisory 2.1 workaround
   - Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
  clk: add devm_get_clk_from_child() API
  clk: st: clk-flexgen: Unmap region obtained by of_iomap
  clk: keystone: pll: Unmap region obtained by of_iomap
  clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
  clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
  clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
  clk: cdce925: Fix limit check
  clk: bcm: Make COMMON_CLK_IPROC into a library
  clk: qoriq: added ls1012a clock configuration
  clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
  clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
  clk: bcm: Support rate change propagation on bcm2835 clocks
  clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
  clk: ti: omap36xx: Work around sprz319 advisory 2.1
  clk: clk-wm831x: fix a logic error
  clk: uniphier: add cpufreq data for LD11, LD20 SoCs
  clk: uniphier: add CPU-gear change (cpufreq) support
  clk: qcom: Put venus core0/1 gdscs to hw control mode
  clk: qcom: gdsc: Add support for gdscs with HW control
  ...
2016-12-13 08:54:27 -08:00
Linus Torvalds 20d5ba4928 Bulk pin control changes for the v4.10 kernel cycle:
No core changes this time. Mainly gradual improvement and
 feature growth in the drivers.
 
 New drivers:
 
 - New driver for TI DA850/OMAP-L138/AM18XX pinconf
 
 - The SX150x was moved over from the GPIO subsystem and
   reimagined as a pin control driver with GPIO support
   in a joint effort by three independent users of this
   hardware. The result was amazingly good!
 
 - New subdriver for the Oxnas OX820
 
 Improvements:
 
 - The sunxi driver now supports the generic pin control
   bindings rather than the sunxi-specific. Add debouncing
   support to the driver.
 
 - Simplifications in pinctrl-single adding a generic parser.
 
 - Two downstream fixes and move the Raspberry Pi BCM2835 over
   to use the generic GPIOLIB_IRQCHIP.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJYTny8AAoJEEEQszewGV1zz0MP/2KLLiZtBaBo0hDfY2Oussjp
 JRO/VkjFIff/iDznkJJhMFPGwQ6ebp63vNRrwwOYwGa2GyZZrbeshul3oV89fyeL
 NYApweAFIOFnTI6TVb5k1cGoPJcck2OalSkwHNvPVEXYykf3xy6Jm0M81T9t8fsu
 xmSAfqvue9oYgDGN3jYVzsL9U6mGdWZV5fjFzwEfl/6oMA03/CMFdkDz6OBOj9ms
 addIx6fQEiS1XtIwEKnX6PS8Q78/vJ/Yl6IKow/5U5lTx5HR+nbECADdEM3jqper
 jifodSzJiN6fE3C55o9uupM8tVbu9lj18bb2UVOLiFB+IVlWYKekIzG+8Jg0YvJ7
 zEiLzXntNHGNM3Nvinf0AL42+Uz8Ar93AvhdZD2H4yqo6dA8ifojNnavuUa9piGR
 xlV8llwgSXZF8+b0ZodSFSS4R0zSGSXSimIlWDsdJ06UWHoJU2yijmkEJicXyS23
 Qlo+eK830F+e0FWHTEq+OsiFoCOrD3Zin3gfNtCKoLZpTf77YFOkF3aGMrrmoIRr
 MGahrssK+B6Hr8JzHWZDLpIEUL3VB+gHm6Vj4Tt5i2Ms7rw6hB60mu14PZ1pGlY0
 U9CFfYg9NSPqRrgkirlETI+l7rfvVHRxqgtMQSLE6uI1Nxw+6ubMRgB2uk92LQzv
 4F3H6v/5IBGqDRA5jr7a
 =Pkzu
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl updates from Linus Walleij:
 "Bulk pin control changes for the v4.10 kernel cycle:

  No core changes this time. Mainly gradual improvement and
  feature growth in the drivers.

  New drivers:

   - New driver for TI DA850/OMAP-L138/AM18XX pinconf

   - The SX150x was moved over from the GPIO subsystem and reimagined as
     a pin control driver with GPIO support in a joint effort by three
     independent users of this hardware. The result was amazingly good!

   - New subdriver for the Oxnas OX820

  Improvements:

   - The sunxi driver now supports the generic pin control bindings
     rather than the sunxi-specific. Add debouncing support to the
     driver.

   - Simplifications in pinctrl-single adding a generic parser.

   - Two downstream fixes and move the Raspberry Pi BCM2835 over to use
     the generic GPIOLIB_IRQCHIP"

* tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (92 commits)
  pinctrl: sx150x: use new nested IRQ infrastructure
  pinctrl: sx150x: handle missing 'advanced' reg in sx1504 and sx1505
  pinctrl: sx150x: rename 'reg_advance' to 'reg_advanced'
  pinctrl: sx150x: access the correct bits in the 4-bit regs of sx150[147]
  pinctrl: mt8173: set GPIO16 to usb iddig mode
  pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP
  pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconf
  devicetree: bindings: pinctrl: Add binding for ti,da850-pupd
  Documentation: pinctrl: palmas: Add ti,palmas-powerhold-override property definition
  pinctrl: intel: set default handler to be handle_bad_irq()
  pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
  pinctrl: sx150x: sort chips by part number
  pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
  pinctrl: imx: fix imx_pinctrl_desc initialization
  pinctrl: sx150x: support setting multiple pins at once
  pinctrl: sx150x: various spelling fixes and some white-space cleanup
  pinctrl: mediatek: use builtin_platform_driver
  pinctrl: stm32: use builtin_platform_driver
  pinctrl: sunxi: Testing the wrong variable
  pinctrl: nomadik: split up and comments MC0 pins
  ...
2016-12-13 07:59:10 -08:00
Stephen Boyd e3f4358e23 Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:

A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.

* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: add clock controller for rk1108
  dt-bindings: add documentation for rk1108 cru
  clk: rockchip: add dt-binding header for rk1108
  clk: rockchip: fix copy-paste error in rk3399 testclk
  clk: rockchip: validity should be checked prior to cpu clock rate change
2016-12-06 15:17:26 -08:00
Arnd Bergmann bb2d850778 A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
 
 And one new soc, the rk1108 combining a single-core Cortex-A7
 with a separate DSP core.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYNj8LEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYE3oggA
 j0b99/r3uGOavo9nun2yJTqq/bKhjAAupNhrEJtjKP9gdbR/1HOkjzRX/1g9ID36
 b5cMpOePpRN9xCg0IyK4/+0jgXJ1r41Fp1yEI51Z57jlo0WMzP10/E8hGwNQgW7Q
 QSAPrTZbwLcrDjq7cOHrF8WvuMnA+6ye77IcDFJ0ZjtU7PYwfO63VTIJ/37Ph3FE
 wlDb0YH57nrn13qUlK8UDJJysl1v2H8NP48/5qEfgF/swbyt6VKkaL2Q+Ua2aDys
 AaH2oTRUPBSPqqXj78OKrWfHB8U5WWfn7PvDYxyjYcnOnasvE7kEBlmw4P955QDM
 XzEEXkiEcQFMLoEiWim5Xw==
 =2VYn
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:

A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.

And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.

* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
  ARM: dts: rockchip: add rockchip RK1108 Evaluation board
  ARM: dts: rockchip: add basic support for RK1108 SOC
  clk: rockchip: add dt-binding header for rk1108
  dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
  ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
  ARM: dts: rockchip: fix TSADC reset node for rk3066a
2016-11-30 23:36:38 +01:00
Arnd Bergmann bb986384d1 This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
 
 - Rafal adds support for the Netgear R8500 routers, adds basic support
   for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
   A7). He also enables the UART on the Netgear R8000 and restructures the
   include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
   which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
   support for the TP-LINK Archer C9 V1 router.
 
 - Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
   the bcm958625k reference board to have it enabled
 
 - Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
   a BCM47094)
 
 - Scott fixes the pinctrl names in the Cygnus DTS files
 
 - Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
   SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
   the node for the OTP controller found on Cygnus SoCs
 
 - Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
 
 - Eric defines standard pinctrl groups in the BCM2835 GPIO node
 
 - Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
   to use their appropriate pinctrl functions
 
 - Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
 
 - Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
 
 - Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
   Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
   adds names for the Raspberry Zero GPIO lines
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYM9VyAAoJEIfQlpxEBwcEK48QAKj7Z2kedtsVvlMm86SIrI+U
 g6diaTaeEnH2v+ClUShRg65wtTrwHaBEQFnimTtfPIK+8jOZnAOIWBcO0vdZBEkb
 2cibGKN9SWXubUBjr5BdAhWXjzLvuryldi19Qr2Q3XYXSUOKI+ba+PL0rfFBiL8o
 5CzkqJucr6xUCRI2sbVxmEOBrJDMs2iygSQvhDiUWTg/2aZWckLQ+e0W7wX5++sM
 t0wVkTi0ba7X+pUshQa2qiBVYess6RTdsLYwjdPqIZ4O5zMBFC8kMqjVP4uZuqUz
 ytg+MWOUU3/+vTUH+UOB75iV6NFfLMpxn0GGucivwBjKhaIefUEHfjpqHipCgarC
 MJ899MQsA97srBWmW56td9yQvB7/ce3NgzqqV6sUM7fvkxL00c6LiWE2Uuuo3x18
 L24u6hiZA0qsnX5aLqw0hcibZVlKDY3p5IE+Y85fBsR0y5OCx9a39rPWA/RRQ3pA
 U86gnt1jyjqNcjk6Z839Y0PutLb9wt48C+hDrRvBEjM5uWCCJbO6AZkoD0IT5H50
 fHZBir3V5+UHu+6MpUrym4AKvAoYJ6wc6Rpx7b3a5uS3Z/n4hugBFOguRMLrAvEc
 /Td6/aiLJq9uruaQR7mehlRDvSsMr1vr7ji8FHOIs5cX17d03A5qTLQWUFO+St7b
 sgb9D1Orm2nXN0RsebKq
 =4GFQ
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux into next/dt

Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:

This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:

- Rafal adds support for the Netgear R8500 routers, adds basic support
  for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
  A7). He also enables the UART on the Netgear R8000 and restructures the
  include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
  which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
  support for the TP-LINK Archer C9 V1 router.

- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
  the bcm958625k reference board to have it enabled

- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
  a BCM47094)

- Scott fixes the pinctrl names in the Cygnus DTS files

- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
  SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
  the node for the OTP controller found on Cygnus SoCs

- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs

- Eric defines standard pinctrl groups in the BCM2835 GPIO node

- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
  to use their appropriate pinctrl functions

- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet

- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block

- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
  Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
  adds names for the Raspberry Zero GPIO lines

* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
  ARM: bcm2835: Add names for the RPi Zero GPIO lines
  ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
  ARM: dts: enable GPIO-b for Broadcom NSP
  ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
  ARM: dts: Add node for Broadcom OTP controller driver
  ARM: dts: Enable interrupt support for cygnus crmu gpio driver
  ARM: dts: Enable Broadcom iProc mailbox controller
  ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
  ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
  dt: bindings: add thermal device driver for bcm2835
  ARM: dts: bcm283x: fix typo in mailbox address
  DT: binding: bcm2835-mbox: fix address typo in example
  ARM: dts: cygnus: fix naming of pinctrl node
  ARM: BCM53573: Specify PMU and its ILP clock in the DT
  ARM: BCM5301X: Add DT for Luxul XWR-3100
  ARM: BCM5301X: Add DT for Luxul XAP-1510
  ARM: BCM5301X: Specify USB 3.0 PHY in DT
  ARM: BCM5301X: Enable UART on Netgear R8000
  ARM: BCM5301X: Add separated DTS include file for BCM47094
  ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
  ...
2016-11-30 17:53:03 +01:00
Arnd Bergmann 9de194ff11 Second Round of Renesas ARM Based SoC DT Updates for v4.10
Enhancements:
 * Add device nodes for PRR
 * Add r8a7745 SoC and sk-rzg1e board
 * Add r8a7743 SoC and sk-rzg1m board
 * Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards
 
 Corrections:
 * Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
 * Correct hsusb parent clock on r8a7794 SoC
 * Correct PFC names for DU on alt board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYNfQEAAoJENfPZGlqN0++jt8P+gLdkKlX5TdEzg0U5IDBGd/U
 UQ0hCxx7aDUibsS9Pad+0R74QZj0M10Je0E+TFFQ8UDIh7jZ087K4/6wYDjFWemU
 sGi9gO2eNG8nEkJ2yfeXGQp4e4KeUCRvlrrdWM7hJAdw9jnuSu+h2TdfHxOLasXr
 7iB1GOQtjpaCL93Iv+R1dql/r+xAtCYvf5aKSTYcdlQ3fV2vsErbEkyYm/wUcUSZ
 3geFhsZJLSYAIs0ucZjysLPWNtyWwc4F7BwUxS8yfXXnHZhzzr7W3kjt/bxpul9N
 f+0vRp7pwXvRZbzZh1pGH2/h5kbu4vRl3+WBSSGGNqnaKyXsI5beB0PVV8RGnUdq
 qgt6fdCFbFQ9bAAoWijn9fOPXDqhN5ZQXlOJjUPSW6AtJ6JwdDXiPwxn9YYpfb//
 aGQCYt/bzFoJyyEBnQNQd7Ay8xHRxEv3JvFKb8oxNsWSI1cWuLfemW6kBYcnaH3n
 I9DRe5TorLqHxfQEmdz68rhDuf3D9QWSYcrd5tBee72mnQD5HGn+AEKsjkelD0zU
 vKTWBykwX/XWSw13rIkUoMyI3ajRH5tM6BrwnQWILwikix29Zj1CrDnux7mFK16D
 UWm9f8vqn+yO2Gz9WGfsS+YUtPIuPIMNjzB9ZbeT5eMu82nkBqsgXx8lmb8YQIpJ
 soCYf2YgU+4WGZF8Tlqi
 =YQDm
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.10" from Simon Horman:

Enhancements:
* Add device nodes for PRR
* Add r8a7745 SoC and sk-rzg1e board
* Add r8a7743 SoC and sk-rzg1m board
* Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards

Corrections:
* Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
* Correct hsusb parent clock on r8a7794 SoC
* Correct PFC names for DU on alt board

* tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ARM: dts: r8a7745: add IRQC support
  ARM: dts: r8a7745: add Ether support
  ARM: dts: r8a7745: add [H]SCIF{|A|B} support
  ARM: dts: r8a7745: add SYS-DMAC support
  ARM: dts: r8a7745: initial SoC device tree
  ARM: dts: sk-rzg1m: add Ether support
  ARM: dts: sk-rzg1m: initial device tree
  ARM: dts: r8a7743: add IRQC support
  ARM: dts: r8a7743: add Ether support
  ARM: dts: r8a7743: add [H]SCIF{A|B} support
  ARM: dts: r8a7743: add SYS-DMAC support
  ...
2016-11-30 16:44:12 +01:00
Arnd Bergmann 0b4160976f Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYNYmtAAoJEEgEtLw/Ve779vQP/RFZKsVt50YSFTZxE8cMhBen
 /ASy/PrcJmd+AbhkyP6fS4M4GkryNu4E2JdlRxu0bbAc7dyRcqCB/YlE7AWVnGVI
 9hlbROKxY+rWbZiYtTnqH4J6HoNheZn0U96GJSfNrwrncF8TNjjgUYfqPnqpcnUI
 L4ApF1XKGFeuOFVJviz2q5C2WKrqajMDmNyiuGSmuZLIE1QkVX3XuHZq1/D5hbix
 /MOkctrNlSkcfmFUBWiXpgY0uNli5QdRzzcqf6vpERxgPukTncixI6R5/pUB9TAp
 4GdFQcHDjTbjPf9sGsqg0wNHMf5Vg/sLcFt18ocWad/ooh2++U/n8/TwnZhXcxZW
 DCCbrWz6l8KoP0ay6BJyzVxLsaqqzlIjPqvVo24VvB8PUpTtpnEDhEQiMPIwBlgi
 HTgVnOzJQAzNAkCPot7i+esDd3tCZnm7ZFTT5GzYp3SdEASZ75ZyBZnfStFrgyCO
 CSNKcLAWA9n7bR6mkgoOyZ2+V5NJycuWnpIAtc1428nvP0vntFnliffwQ+CWRUvo
 vLxLMtsc3MrMl2DvHPG0992Jm2UzaMeYKW/RsPB67mV5+PC5F/e7vM0AU9Ko74aO
 oH1FvV7vBHWLUWNvAmWLhR/tmE9tt5pLTuAsoprBUJ+40sY/o9RLkWO/1sB9169e
 DC5y40qcVHeDWCK/WHkR
 =vTIK
 -----END PGP SIGNATURE-----

Merge tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/dt

Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:

Shared by clock drivers, and DTS files.

* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
2016-11-30 16:43:10 +01:00
Arnd Bergmann d319fc6dc1 Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10
* Add support for the r8a7745 SoC to rcar-sysc
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYNfAfAAoJENfPZGlqN0++t14P/RukycPu2VgJ+F3G+OJoD2WS
 ltEYrhhZxIL9cjyLmiA7Mj7Ig9dMtzmiBC0W3HY5zvZN2OiOrzmNykfFdu9UN8rX
 iMZ6lDrq7o+Qsm1Q4Ab2miatqOqM7JPSacJPixLZFpvs6T79CCRMYaEeIB8AYD3O
 ij/tRDtxdvfY97iy5la9XvtA/63EmP6DZ2SxfqPXd6W0GaBg+QKBOLlcCR0yDrKh
 NosHdbiAbMapBSPbsnbhKLebpnPw159iu7VA73JbsrsFZ9IDRkwoA+wcgEEWnF8C
 b9S31TAglhL04AysUowlHjhEOU2hWPcF8rm3lisDghoUC6Rb/3gCPII+KnU6d5Z4
 QNCbY6IlWqya9wR3kavHmJHOowGt/LqrmLCnJSoTTbKgo6xPxN3kis6oRo2sY9w1
 KUJWgt9vfQ/H6ik2epkMg7sQbkBcsONUDUgVhFyaAqTKEgeIz5OggfNsYkQYYT37
 qlQkLgKweKYJmmr/ilCeVdmkdhPegII8aiYWdwb8N2cUY4I0nyUwnE+v9cdPRhxr
 LpONUZV+GtCz8O/Y2XtjxwhYoYUtHbUzSax+aw4qtBBmdyKcaQ1VIyn27gfofmht
 Q3itzk/eGp0GgnsadknYK9eOvWWjPf07/jvYgSVfL6rWGR+4/vcEht/kU+O9dnpP
 HMZ6/PrbmYoxWkY49sH7
 =pOb+
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:

* Add support for the r8a7745 SoC to rcar-sysc

* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: add R8A7745 support
  ARM: shmobile: r8a7745: add power domain index macros

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-11-30 16:39:48 +01:00
jbrunet 1fc31357ad dt-bindings: net: add EEE capability constants
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-29 19:38:31 -05:00
Simon Horman 028289536c Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYNYmtAAoJEEgEtLw/Ve779vQP/RFZKsVt50YSFTZxE8cMhBen
 /ASy/PrcJmd+AbhkyP6fS4M4GkryNu4E2JdlRxu0bbAc7dyRcqCB/YlE7AWVnGVI
 9hlbROKxY+rWbZiYtTnqH4J6HoNheZn0U96GJSfNrwrncF8TNjjgUYfqPnqpcnUI
 L4ApF1XKGFeuOFVJviz2q5C2WKrqajMDmNyiuGSmuZLIE1QkVX3XuHZq1/D5hbix
 /MOkctrNlSkcfmFUBWiXpgY0uNli5QdRzzcqf6vpERxgPukTncixI6R5/pUB9TAp
 4GdFQcHDjTbjPf9sGsqg0wNHMf5Vg/sLcFt18ocWad/ooh2++U/n8/TwnZhXcxZW
 DCCbrWz6l8KoP0ay6BJyzVxLsaqqzlIjPqvVo24VvB8PUpTtpnEDhEQiMPIwBlgi
 HTgVnOzJQAzNAkCPot7i+esDd3tCZnm7ZFTT5GzYp3SdEASZ75ZyBZnfStFrgyCO
 CSNKcLAWA9n7bR6mkgoOyZ2+V5NJycuWnpIAtc1428nvP0vntFnliffwQ+CWRUvo
 vLxLMtsc3MrMl2DvHPG0992Jm2UzaMeYKW/RsPB67mV5+PC5F/e7vM0AU9Ko74aO
 oH1FvV7vBHWLUWNvAmWLhR/tmE9tt5pLTuAsoprBUJ+40sY/o9RLkWO/1sB9169e
 DC5y40qcVHeDWCK/WHkR
 =vTIK
 -----END PGP SIGNATURE-----

Merge tag 'rzg-clock-defs-tag1'; commit '538321bd9718'; commit '97ca8402997c' into dt-for-v4.10

Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions

Shared by clock drivers, and DTS files.
2016-11-23 20:51:44 +01:00
Sergei Shtylyov 97ca840299 ARM: shmobile: r8a7745: add power domain index macros
Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23 14:06:21 +01:00
Olof Johansson e40719dd01 firmware: Add Tegra IVC and BPMP support
IVC is an inter-processor communication protocol that uses shared memory
 to exchange data between processors. The BPMP driver makes use of this
 to communicate with the Boot and Power Management Processor (BPMP) and
 uses an additional hardware synchronization primitive from the HSP block
 to signal availability of new data (doorbell).
 
 Firmware running on the BPMP implements a number of services such as the
 control of clocks and resets within the system, or the ability to ungate
 or gate power partitions.
 -----BEGIN PGP SIGNATURE-----
 
 iQIwBAABCAAaBQJYLyVYExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6F0
 bw//aunzLT9M38+PMRBYDhgY/ype3juarSMmDWT/25EpfJ6Eg862UYwFxpRwOi/z
 t5pTXfA6Ndwao6HhQp5UmqRAdZd2V0UcxJoJ+9vooAUutyJTkk4cd9tW1JBcTsyw
 LvqMplF6GXtDM/Qa2GGV+4N3zlastQGuv62ir9xHOBHs4MJAwcbr80N18k+WzuSE
 3OGRIjdsAReWVgcj+SL6XPKrF6PlKCWAe+nODmnnY8QkCb/icI1ryJtYEgT0PSkY
 Xw90udqaIuR80ZVRtgN3f3fQ6QBi7GTohFtDl05snBjPETF1aKFUX6w2JgUEXXdf
 +/eewfSy468SrkbppX2MbPxqDtEPLIjbjvNL/q/DdOXxjEnLnavn1BcFTvyiJ5Uo
 1u4B6uX+gW+xq8546XNNuCwmZ6zkDsRw3ksSWz3sMdpOtC72NAQ/YtAYu0+QUyUU
 vptXGK9LMoVzYtreayO37ql+MP8EFDYqsAIPLZzQ4PPCiZote0HN35IlVWZt+Koq
 jcMnU6EDZMA2mHINOLIzSbf39hw5zV6Skr0DW3PtPosf4vU488LHsRF5Fr11JBGi
 YAh/T8ZiEnv0qeBNk4irr3JEUuXCVDgxqwQB/FkGL/mKPV08djji3tMTl6fNetMk
 pH3fQB8yclKn3DRAIWSMrDDOGspOKSSmeu2/K4abIB6Po/o=
 =9jQK
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

firmware: Add Tegra IVC and BPMP support

IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).

Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.

* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 18:28:14 -08:00
Olof Johansson dd3eedd338 mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
 hardware block that provides hardware synchronization primitives and is
 the foundation for inter-processor communication between CPU and BPMP.
 -----BEGIN PGP SIGNATURE-----
 
 iQIwBAABCAAaBQJYLyMbExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6El
 gw/9FfJG4Ze7thnBHHVhDDuZaVF6U9gIKkEHfTKkUlU8fkOtF+xnTBCK3LRkHEsk
 X0zyQlKKa/lzUGB52Fsi9jpVjt1WXvyuVOgCaQ+Zg9GXCmfXxOrNquAIH9sLhHSk
 SpBsVHDsCk5UT4pINJrmdpGN2nSdQ4PvsRZM8wRkRs39C7+nf6wSHMrjURCt/DLT
 Cub94gLcFiLddmO+c1OUShUjnOcy7yBIWn/EycxrKOqMDxzY9JK2Q0n8Cc3f1UVN
 P5WYgjvLss5pGWZOBvPwefMVXru7BFBh1jOceabueD3DjNEP8nWb2/WQbXMUDVzq
 QQ/q/4MIEmQMc8B8Z0brEmpIMn870Y3IPDaUmG4F6soW9yRL1gyA9PiF4YlcTe53
 b0l0Y4/aehgHqCz1c9FulZW+qBe746fND/CNzTER7QfUe5CNotAtRUWG99v/8gGF
 gtVmwTVnC5jn4ytUbLHEM4JtghKUuoIHqAWhY7KdwTDOm70TLmdHmOTVKN0+Ej3V
 IgFCo+WIzleoHyK8GiUifOZSnLIJuctDznIUMnw2OmBlslvcdE90XbSQ00hlYC3N
 Z9N2X6747OhGZF6viHWdWOtFfH+LpRj4S0LIaoRkvU5GRUi0fOjuTIXfBhlPe+11
 wZ/AZAav1CHfaJk66H7Vq2rmRxdwe56t9fzy/xJM7ja+9m0=
 =Gojp
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

mailbox: Add Tegra HSP driver

This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.

* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  dt-bindings: mailbox: Add Tegra HSP binding
  soc/tegra: Add Tegra186 support

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 18:23:06 -08:00
Olof Johansson a90a6f9c3d Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
   power button, charger and usb and use them on am335x
 
 - Configure EEPROM, LEDs and USR1 button for omap5 boards
 
 - Add tscadc DMA properites for am33xx and am4372
 
 - Configure baltos-ir5221 both musb channels to host mode
 
 - Configure internal and external RTC clocks for am335x boards
 
 - Don't reset gpio3 block on baltos
 
 - Remove pinmux for dra72-evm for erratum i869, fix the regulators
   and seprate out tps65917 support
 
 - Add dra718-evm support
 
 - Add minimal droid 4 xt894 support
 -----BEGIN PGP SIGNATURE-----
 
 iQIuBAABCAAYBQJYK1YKERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vzd9AQ
 ANr+2RtDJw9vVf8SIhzwaZBCYJ9qifO1nUqTxGYDKVFYwkemrbYWQF9UnT7U+L4q
 DaVh4+5TJMB3EZz7lVHv28NJ3+dU4aFuRPGb/sOy5aAWxrVKJ361BmEcEiWDFuuM
 SxdqxucShKNmU848ehG1J6W5P1ESsBbYlSy7s1HRQ3n6Q9C1cu9z5RpoT5gU5/aR
 DQy0Wv9k+g8vzW/z5ovaqBTvtmDvROOUYE1Cbjfe2kLSmBgRTiyMBNSEPGAuRxq+
 e+ASMStTzmWotXTiLANa2RDz/xTaiKNzdG2YyUscKhhAeN9di23HcGlwk2JQszC6
 CtI/Pl0vsky647B9jwJdrjXD2i6zqrqVau6wR/Gm7zufiejSFnDONft7byD2EYlc
 o06XUHA+vl4UdGCS3Ik8pvDuclpqTNGHuAPumMovv9Q8mBlMdfyUxMWt4ZlZBpgl
 1oz4+ZNkDPl6ZMqc/RSe+PxT+iT55tTs6BIPSJ5+ooFunx2SzOsMPO9r785w54yp
 eP0scopmek8fpsFOWevJh1lyUbXB4o9t0joaxsPyDQd2zYvsomds+Lu7r0Bp8ocY
 ekCnU2fizKI8uo1WYJRhBwqk+p9qbAWOXQtLWXCNuuejxZya2iUwO900k/0tqxVt
 Yy5LQ+nuv7FKb0jVgptXYlWglOg1PUDSfpq4Zq/i8Awk
 =GYpd
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omaps for v4.10 merge window:

- A series of patches to configure tps65217 PMIC interrupts for
  power button, charger and usb and use them on am335x

- Configure EEPROM, LEDs and USR1 button for omap5 boards

- Add tscadc DMA properites for am33xx and am4372

- Configure baltos-ir5221 both musb channels to host mode

- Configure internal and external RTC clocks for am335x boards

- Don't reset gpio3 block on baltos

- Remove pinmux for dra72-evm for erratum i869, fix the regulators
  and seprate out tps65917 support

- Add dra718-evm support

- Add minimal droid 4 xt894 support

* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
  ARM: dts: Add minimal support for motorola droid 4 xt894
  ARM: dts: Add support for dra718-evm
  ARM: dts: dra72: Add separate dtsi for tps65917
  ARM: dts: dra72-evm: Fix modelling of regulators
  ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
  ARM: dts: am335x-baltos: don't reset gpio3 block
  ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
  ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
  ARM: dts: am4372: add DMA properties for tscadc
  ARM: dts: am33xx: add DMA properties for tscadc
  ARM: dts: omap5 uevm: add USR1 button
  ARM: dts: omap5 uevm: add LEDs
  ARM: dts: omap5 uevm: add EEPROM
  ARM: dts: am335x: Add the power button interrupt
  ARM: dts: am335x: Add the charger interrupt
  dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
  ARM: dts: am335x: Support the PMIC interrupt
  ARM: dts: tps65217: Add the power button device
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 16:43:19 -08:00
Olof Johansson 78d375b97e Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
 - add Oxford Semiconductor OX820 support
 - add reset index include files for OX810SE and OX820
 - make drivers with boolean Kconfig options explicitly
   non-modular
 - allow shared pulsed resets via reset_control_reset, which
   in this case means that the reset must have been triggered
   once, but possibly earlier, after the function returns, and
   is never triggered again for the lifetime of the reset
   control
 -----BEGIN PGP SIGNATURE-----
 
 iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlgrXr8YHHBoaWxpcHAu
 emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrP7UQAIVZfUCBUfc5PF6u/pWrUOtn
 Eg7SWvo1TYcJPJKoICwlRwKXmzLVfmivCsxW8my5Ddb66JQ5hMkoqsXALQl0sAZK
 U2xXiy76z+EsL9tvvJ2b9Yqx3BIbzPkZyv419RWMVldqUtdbtHe70xLjF7DVfaTs
 f9BTh0OAN55yWhYS7HQDQKm2bvUe3jy0XDzXlbPXgdy/roAReBFSFO4r80cbbAfv
 DZwhrzmGSAGF0fE/TQA65wkkuZMM/rE3cjOjieVC4ZaeX7OQ+eqIMwph25uHCEnS
 61g1J8GcwKvtP1iXAg5VdLAW2TTGTHztBR8UchrxZfySnKWR0rGee3LkQX8LVfih
 mVI2jtzpq6fGYSask9B/fGnObfjWF0kHcgy525kdcNbo8HVZ0vdgZI/yoCh3ZViT
 RHpuXk5cHYM6t7aNGOBvVvdKOL3wtuFUrJKYEpOL3BB//SLZXxCDCawMt7H2XHX5
 3EbLfKikQQbMNs8XzeSfTOQi9ITcdwnLdTqjBunAbf0aMiF+SOtDS/yb6BsG7zjv
 muz4LUtcMq5YfXnZbB11ngz+DSN/g7MHIjl9MXG8kMO9JsVb1R9VtmbxNQ87EU92
 oKGy4ix0vSIRl7/gmmFZt4iV8RQOvffkB4iIkOXlWXdnsUrqIj3V/YwEr+8leoWk
 MHr75XggJOUH9VaMUP/2
 =e7kp
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.10

- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
  non-modular
- allow shared pulsed resets via reset_control_reset, which
  in this case means that the reset must have been triggered
  once, but possibly earlier, after the function returns, and
  is never triggered again for the lifetime of the reset
  control

* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
  reset: allow using reset_control_reset with shared reset
  reset: lpc18xx: make it explicitly non-modular
  reset: zynq: make it explicitly non-modular
  reset: sunxi: make it explicitly non-modular
  reset: socfpga: make it explicitly non-modular
  reset: berlin: make it explicitly non-modular
  dt-bindings: reset: oxnas: Update for OX820
  dt-bindings: reset: oxnas: Add include file with reset indexes
  reset: oxnas: Add OX820 support
  reset: sti: softreset: Remove obsolete platforms from dt binding doc.
  reset: sti: Remove STiH415/6 reset support

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 16:17:45 -08:00
Stephen Warren ad7cb19824 dt-bindings: Add power domains to Tegra BPMP firmware
The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:33:43 +01:00
Joseph Lo d55865608f dt-bindings: firmware: Add bindings for Tegra BPMP
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).

The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:33:41 +01:00
Olof Johansson d2e7d59028 - Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
 - Add nodes needed by clock controller for mt2701
 - Use clocks from the clock controller for the uart of mt2701
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJYJdcrAAoJELQ5Ylss8dNDoJcP/2q1LuStbojWMWxFKexQBCIk
 8VEPzY8fyEckshbmgnz36qqp2MnecTLjb1ETesFIEGZWbEBnoAJC9hyIg6fFVZQi
 mFZC8/0I7uvaFZHa+a3fQZb3tCmLMcWbAaGvA0p28kNRKnRhTMVHhLa7Z0WmMrG+
 lQLlBBTP/xHErOakFJagkFIWYmmmMReS7x+X/tnVPienxkwODjpLYJQLL1wVmoqV
 lpSj/nSRRDg8CeeG8/x+Odtr77L56glDMwwieXVpBe2sd+CpRk3QSTTcuYLkUp46
 JBBKrr7TLLD6KEw6FgPjvjWDR3TH7S2wkbZVJN4B+8tmdEhpQhnle2MpJ6TYLKQb
 ENwZ9JP70UD8o6mWb5e/g9R82WxUq1KDpdlU71OeBsnqfJRn1sge8bsO6+qs4+6Z
 JapDW+Zwsewp9VZS12k4VdsCsYR0MZgX6XXj/NOOseJOMUXBFAoHj7vaC5Gj0UIT
 VFKndrzWjIaVbaLHA/2KyVvOpJsEVTwSURyEko6XnTRLg+E85SSx+r6Bp3rlSlCV
 Javet8M9YTLhPa1IeFMvf/1V4C4poX5tE4tvCiSZC1Wvxto5FSEgeGarq59Pgyi3
 UWnxao8FHBHi3NU8khTI+rnIYtw5WxkEpqU5UUTYMUwsQ3x83VnU0WzpCSKQSNdD
 Od24wmc/rrNKeU098abr
 =wFjD
 -----END PGP SIGNATURE-----

Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt

- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701

* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm: dts: mt2701: Use real clock for UARTs
  arm: dts: mt2701: Add clock controller device nodes
  arm64: dts: mt8173: Fix auxadc node
  soc: mediatek: Add MT2701 power dt-bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:45:25 -08:00
Olof Johansson 5589d62484 Qualcomm ARM Based Driver Updates for v4.10
* Fixup QCOM SCM to use devm_reset_controller_register
 * Add QCOM pinctrl to Qualcomm MAINTAINERS entry
 * Add PM8994 regulator definitions
 * Add stub for WCNSS_CTRL API
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYJ/oEAAoJEFKiBbHx2RXVU1gP/R7GzHttdlGHoq0A84UnI9FI
 OANdzjhcelwq2N5M2AiFEnCuB5jFomSmQqUXaK6ehzJktGGu6ZVM8jtg7RIatEVn
 4lnM79qoDNvbnv/O4ILZ8U/PPsTcFyIQiKKpmCLEoSoMpZMYWaUTWlWQ1swmqnI/
 o7HPUQykrkZyg7YmFxBiLEs/PQNMcje9aWOMzmk2ErDofXCBqXrB6xdKWqjMGvlP
 qNAWb6VDB6ehQ/b9V7Vew5JM2Nx3x2C/VAMff12MA102GN5eMTeM42uYZM6ifeyU
 ugfG0QVR0rdo7xaeBAyVjumOC5YETFH7+HF5UudhmsRkEJPx2g0SgEVIYTbPQhaa
 zrFm/wvoEGVGUECAH7FwAQmUjoq3HrSvDJt3Jivx9kW7DCcqcRHzrjnzBePb/YQW
 5DKdcYHsz2dA+aslyFpZbQpVyYjeLzsCrIrM+qnqkmsm2gHpxSDb1wKfMvqvcnYD
 RbEk4hFtF4aE33J2UxSOM7JE6qHvbeRJGsZnDQFawtq+lANVor3oiTJHUyQDRzz9
 QveZnCRHREK2fJY68+gvfi5hL8BU6ojIQcf5KZXntJrUXDBBl/qS5wkc+qrBvjTT
 5WvezqmmA27rBHyPuPqfI210ZzM5jNtVRkdB29TKUbUZFfOdZUIEL52bDL+hG9hT
 U0gaKLfv7guaWxYCiWMn
 =bw/l
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.10

* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API

* tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  firmware: qcom: scm: Use devm_reset_controller_register()
  MAINTAINERS: add drivers/pinctrl/qcom to ARM/QUALCOMM SUPPORT
  pinctrl: pm8994: add pad voltage regulator defines
  soc: qcom: wcnss_ctrl: Stub wcnss_ctrl API

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:38:27 -08:00
Olof Johansson e99b4c970b 32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
 optimizations allowing for better performance on rk3066, the usage of
 pin constants to bridge between the two numbering schemes used (gpio
 controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
 and UHS/HS modes for the mmc controllers on the popmetal board.
 
 Two new boards, the PX3-based evaluation board, with the PX3 being an
 industrial variant of the rk3188 soc and the Rikomagic MK808 board
 based around the rk3066 are also added.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYJzNfEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYGsQQf/
 WWYA4/oR4pT8HMns5coctc2zOyNU8KYmaeRl7TViUna+HA6/m2SGMqomTFV2AK0v
 Ha3M6A35dDUGJNmAbEB5oolGOwHh82gZKYxYIQiNX+zCxeb5JxKCXWSqAjC9Ndwu
 h600H1K/Qb26OzaVE/ICtlveduN+9BWrlzNseHsm99Z93FNsRLN0Z8s2Mn3jra6P
 2Pf1sJkOPuh47i/Y/gTDVcFSf6Srb4SM/26fiZjrRa8LaaO/0I2Ku34ne9FygGzi
 0GBHWh2SILM297MZMcrCDoJvTTqLT05tUrX1PDGmdunqP8vnsOAgvL9291G8d4sw
 PbYE3onlyoxHmeOSffAe5g==
 =AXPK
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.

Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.

* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
  ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
  ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
  include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
  ARM: dts: rockchip: Add rk3066 MK808 board
  devicetree: Add vendor prefix for Rikomagic
  ARM: dts: rockchip: initialize rk3066 PLL clock rate
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
  ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
  ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: add rockchip PX3 Evaluation board
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:31:55 -08:00
Olof Johansson a4a1fb15c5 STi dts update:
Change sound card name for B2120
 Enable sound card for B2260
 Remove stih415-clks.h
 Identify critical clocks for STiH407
 Fix typo in stih407-pinctrl.dtsi
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYJDWMAAoJEMrHeC97M/+maG4P/1Yd84g5fE8Wr4AoZzdXN6kP
 J8A/bB7cHQr84NHRTPwKSxuMVXA80ifpg68nbNjdy1GCEGG7APtVySVffBR+ddwg
 O76837cO1MezHieU6hBof+fiFmiHGA9bqEr6dw91+sD418gWVuStqm94W1p0P4bg
 i+IGwJdLGq/7KMFh5cIFUdqBdB2MINX1sfqzYg6mqmv/RidTg0EDspYg2rutBYuD
 ZBmEoQBHOLlFavlRZ7mcZ7dc4vuuLKiTWwzXJyfs1BmGrhNbBOvcXRvIJJi1vrfN
 GJuhIYErEDLq58/eKNCOpIhVzNcWg1MNvO0q04KDK+8QUt15rxO1kHoGt20Sj/fd
 X9AkRhvGPVBaHJT3IGX7lK4n52FVNPDmWi44vlEvWR8TcdgrOGWK3FbJDqPKJl+m
 QvFGkJ/d+pfpdl0PKA4gIP/YQK6taYeRczPr9Q+2ICSxqIyO8RqL04feMiFjqoae
 FMN0Q+1ehP5UfCRgJsNN8fWgm9d2cvFO47le/WBxrYyH/al8eRyGelonsfOu9+mI
 kqE8YZiG1KHv4v+Kc2pbOWi6bQcjGuSLrFb34Aux5xLU5a3kjMW+Ypz/Yp7rCdvQ
 wmqiP4V1NLnuk6y6AKrq9aToItPZSDSApRF2TIh1c4N3xLIVI/kH3BG7uSVpRNCo
 1Q5fyFEsrEov0wRXVXqZ
 =cIvM
 -----END PGP SIGNATURE-----

Merge tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt

STi dts update:

Change sound card name for B2120
Enable sound card for B2260
Remove stih415-clks.h
Identify critical clocks for STiH407
Fix typo in stih407-pinctrl.dtsi

* tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: dts: STiHxxx-b2120: change sound card name
  ARM: dts: STiH410-B2260: enable sound card
  ARM: dts: remove stih415-clks.h
  ARM: dts: stih407-clocks: Identify critical clocks
  ARM: dts: STiH407: DT fix s/interrupts-names/interrupt-names/

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:28:45 -08:00
Stephen Boyd 54fd1b3bc4 clk: renesas: Updates for v4.10 (take two)
- Add R-Car RST driver for obtaining mode pin state, and move the
     related functionality from platform code to DT,
   - Add r8a7743 and r8a7745 CPG Core Clock Definitions.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYIJj/AAoJEEgEtLw/Ve773fgP/3yhgJLa6zoYzFE4lS5q/+vk
 95DAqkGrc9D+QzCw1/YAb8w2zqr9kigwBcwc9xlv9wQ/5Nx63WN9jgccw1Kd2xhU
 OaKhgyHpeXpH9MM46TRVJ5Txu7xLVofxtgxGv4ED43sNwZinrH9PrC/ELgQWgbq+
 SQTVjE4bKqANNugt91UzPIzL5YPeJvX02SlFoDjbS3XNg5/cTjAaidVW24Ed8x5S
 OAUkC4chm81Jz4B7M5QcVy4vdfb9aE/m7d5a6iy6nE5EopH6Puu8RwL0SzvltDp4
 AxIj5ZslOKhvqCKvVlp2ALlBeZ1rOXr5KsOdHHN+rkMiaR8a8agv7y/H/gJSbwiZ
 x7oI0QDiS5/6tYDxx67KtGECMAcSK0b0p/rWziYw9C5BDuvuMe5HhxN9fesHLUOx
 Yq6f0GwveUgWfcHIjcEh6Htj4dUfXaxiTgZSF1Dgp5SvW9fPhg40Rz3+ahnT40rP
 8Ke/W5M5QZ2f+L51l3QiZ3NtX1kWLr1H8GExV15Cm08aBWx7p/8fvdqpv1EcVhiW
 dEnhtPBVf8O/LiZ6eS+0aBQS22fl9u06s3d/vXQoO9kaCcK+BWP9cB+5CsieTD6s
 D/3iOq4da3OnOjTcmIQEKEsnrtJq5qxBOZ52Fk422Wk/EX9Bwl+/ggmXhchiGn4V
 I28aLLIUHIfmOMb5H23E
 =Pd5n
 -----END PGP SIGNATURE-----

Merge tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geerty Uytterhoeven:

  - Add R-Car RST driver for obtaining mode pin state, and move the
    related functionality from platform code to DT,
  - Add r8a7743 and r8a7745 CPG Core Clock Definitions.

The commits here are intermingled with arm-soc material because
of the hard dependency we're breaking between mach code and
driver code. We're replacing that with a driver dependency
between the soc driver and the clk driver.

* tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (25 commits)
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
  clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init()
  clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()
  clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()
  ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7779: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7778: Stop passing mode pins state to clock driver
  clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins()
  clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driver
  clk: renesas: rcar-gen2: Obtain mode pin values using RST driver
  clk: renesas: r8a7779: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driver
  arm64: renesas: r8a7796 dtsi: Add device node for RST module
  arm64: renesas: r8a7795 dtsi: Add device node for RST module
  ARM: dts: r8a7794: Add device node for RST module
  ARM: dts: r8a7793: Add device node for RST module
  ARM: dts: r8a7792: Add device node for RST module
  ARM: dts: r8a7791: Add device node for RST module
  ...
2016-11-17 13:31:07 -08:00
Stephen Boyd 38320181c7 Allwinner clock changes for 4.10
The usual patches from us, but most notably the introduction of the A64
 clocks unit.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYK30lAAoJEBx+YmzsjxAgNqMP/A0eKZkzCWP8QXePS5OVTzjn
 Afnp85tpYGNrR5OTwJiM32IDAAU6mvb4813Z0MwQ5Wp+TM3APpiRzwnF3yjxeoGu
 Jgzsu+NLgPtp/CozaGC46IlacGRR0amyLhryq8cVOaEKTed4b0t2Xjmk4JsRj7Gp
 2ki5HVs4QSN63p4GixxhxVXgtYNoOBvm3qCgMbWa10j5DIDA2Wf//feudTeu98xa
 gR9uz08xBVHXtIlyjXfY72l/qcjmcRZDdAXPTItZWR4MREuLMh3jlwM2oxMn1nKY
 PLu7KfPail1ATv+6Pa5EJcAqvxCnW8mH8F0Tk/xqd/ZGuEwHW5rRPVl5NLO81iBe
 K4Pfh8DrEtMBhS2C5nY3qOYQP6XcE4d2OSN8zNCM50ATdXMx+6gX1Dep6cz6waKj
 Uo/v6GdkMhKgd1lBcH2CGJrWN7HQWb4wM/gctIa7T5uIQp/WBWEXACpOmRsD+4yt
 c83qtys3FTO5Iuj1UVETHm8tAIC58xvQ+ZYs3Z7wusMJVRMH2KMi7MiNXF0zBHDL
 cG/cQa9MrhIOJgd04TC8EDye/+Wn1rLFhMZWnbgcThpdKmd+MSPO/3ZeNKkCFJAh
 F3CD+5oeQA9mctJBirpsPCrGnKwtkEZycB7jymkEPptvad+TLfGHdkwE0U2FhaxE
 qN094vyPeAgceu9u9NyZ
 =7+Az
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock changes from Maxime Ripard:

The usual patches from us, but most notably the introduction of the A64
clocks unit.

* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: Add A64 clocks
  clk: sunxi-ng: Implement minimum for multipliers
  clk: sunxi-ng: Add minimums for all the relevant structures and clocks
  clk: sunxi-ng: Finish to convert to structures for arguments
  clk: sunxi-ng: Remove the use of rational computations
  clk: sunxi-ng: Rename the internal structures
  clk: sunxi: mod0: improve function-level documentation
2016-11-16 11:19:20 -08:00
Stephen Boyd c284a7ba72 i.MX clock updates for 4.10:
- A patch series to fix the long standing issue with glitchy parent
    mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
    is sourced from ldb_di_clk.
  - A patch to add imx6ull clock support on top of imx6ul clock driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJYKni2AAoJEFBXWFqHsHzOu+UIAKpiVKqacJYxD1wEJDh9Mtq2
 o9U10aGY6yl3ZEa5Ik8OTqg2Aa6ZT5kaV8h9i5uv7XIGqCSM6SUcWweF0KlRyJP4
 7bjz9rcir2/zXys+dVuRodUiF8uowoFxgw7wAHwHfzs1oA7ihQaUB4v6vBiNbADq
 zheCn2AqDWhIKAOFkLcyEid2IyIz0S/tlyzfElBmukSons+0zTrJ+e9QePzcuRZO
 TnhZAxc/FQwcPZ/a2kiwiOOfQXWQld5pIeIp1YHWD4+L4m0Yxb/WK1yaocTxox2O
 Ek8BPlkpNYdic8g3DRlwZGCHe5UaESSEQ3pyXlgYAdIOA2i+0tlnnCVCW0gNvQc=
 =DJo7
 -----END PGP SIGNATURE-----

Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX clock updates from Shawn Guo:

 - A patch series to fix the long standing issue with glitchy parent
   mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
   is sourced from ldb_di_clk.
 - A patch to add imx6ull clock support on top of imx6ul clock driver.

* tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: clk-imx6ul: add clk support for imx6ull
  clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK
  clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
  clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
2016-11-16 11:16:07 -08:00
Heiko Stuebner a6a1685346 Merge branch 'v4.10-shared/clkids' into v4.10-armsoc/dts32 2016-11-16 12:47:38 +01:00
Shawn Lin 5fababc161 clk: rockchip: add dt-binding header for rk1108
Add the dt-bindings header for the rk1108, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-16 12:18:58 +01:00
Joseph Lo e983940270 dt-bindings: mailbox: Add Tegra HSP binding
Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-15 15:52:58 +01:00
Stephen Boyd 09d5dc586b PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
 actually running at.
 As always also some additional and optimized PLL rates for rk3066 and
 rk3399, some additional clock ids for rk3066 and some additional clocks
 on rk3399 are now sucessfully handled inside their respective driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYJy9BEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEZMwf/
 XPnSVfSOSXSR3A6JOc7emX5vXVcXWq3xkt98l85qhiJO8yQg+vwFk2Ur7Q22cwJI
 ycg6K1EAokKt7/ZE48XZ0JYXQknxxSnO7ZU0MTVQVtQB7+oWr79VY+o+WylgsSZ7
 LApU2lGniYXJOnQBTfNl8Zqyrg+M+q6zTW9HwK47TH51xjUiY9K+/nyNlAuEqBWQ
 TR8EuOQGxIQWHzJ7HFxCO4DNGEszrRkQMOcDsp2b5rxKTF3+waQne6OhX95JZpX5
 PI12A1RC8+DNvYRZlhAnrmKHDycu6QYe18ZQADs5FPihMoxK4Eh/eXzZIIgXBkXd
 aOc4ljF03ry8mWyKtENVCg==
 =2Wr8
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk driver updates from Heiko Stuebner:

PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.

As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.

* tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
  clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
  clk: rockchip: add 400MHz to rk3066 clock rates table
  clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399
  clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  clk: rockchip: add 533.25MHz to rk3399 clock rates table
2016-11-14 18:38:35 -08:00
Bai Ping 73cd5e53ca clk: imx: clk-imx6ul: add clk support for imx6ull
imx6ull is the derived SoC from imx6ul

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-15 08:55:36 +08:00
Stephen Boyd c60df0a42b Merge branch 'clk-hisi' into clk-next
* clk-hisi:
  clk: hisilicon: add CRG driver for Hi3516CV300 SoC
  clk: hisilicon: add CRG driver for Hi3798CV200 SoC
2016-11-14 14:25:11 -08:00
Pan Wen c80dfd9bf5 clk: hisilicon: add CRG driver for Hi3516CV300 SoC
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-14 12:04:39 -08:00
Jiancheng Xue 707d33cb0b clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-11 15:43:49 -08:00
Stephen Boyd 81ab3279c5 Merge branch 'clk-qcom-rpm' into clk-next
* clk-qcom-rpm:
  clk: qcom: Add support for RPM Clocks
  clk: qcom: Add support for SMD-RPM Clocks
  clk: qcom: Always add factor clock for xo clocks
2016-11-10 16:50:16 -08:00
Georgi Djakov 872f91b5ea clk: qcom: Add support for RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:46:56 -08:00
Georgi Djakov 00f64b5887 clk: qcom: Add support for SMD-RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.

The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.

This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:37:55 -08:00
Stephen Boyd b0e031c94a Merge branch 'clk-qcom-8994' into clk-next
* clk-qcom-8994:
  clk: qcom: Add support for msm8994 global clock controller
  dt-bindings: qcom: clocks: Add msm8994 clock bindings
2016-11-10 15:47:56 -08:00
Jeremy McNicoll 49e2828243 dt-bindings: qcom: clocks: Add msm8994 clock bindings
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 14:27:29 -08:00
Patrice Chotard 226226994c ARM: dts: remove stih415-clks.h
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.

[1] https://patchwork.kernel.org/patch/9157571/

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-11-10 09:52:47 +01:00
Milo Kim 98af595804 dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
TPS65217 supports three interrupt sources. This patch enables assigning
each IRQ number in the charger and power button node. Then corresponding
IRQ will be requested by each driver.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-11-09 14:31:43 -07:00
James Schulman 2c394ca796 ASoC: Add support for CS42L42 codec
Add support for Cirrus Logic CS42L42 codec. SoundWire support
is not enabled. Features support for I2C control and I2S audio.

Signed-off-by: James Schulman <james.schulman@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-09 13:50:14 +00:00
Sergei Shtylyov 1fa8a875df clk: renesas: Add r8a7745 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:13:30 +01:00
Sergei Shtylyov 4e195933de clk: renesas: Add r8a7743 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:09:12 +01:00
Neil Armstrong 0f15f500ff pinctrl: meson: Add GXL pinctrl definitions
Add support for the Amlogic Meson GXL SoC, this is a partially complete
definition only based on the Amlogic Vendor tree.

This definition differs a lot from the GXBB and needs a separate entry.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04 23:05:06 +01:00
Sergei Shtylyov 68cc085a4d ARM: dts: r8a7794: remove Z clock
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454d5 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:47 +01:00
Chris Brandt 7c8522b704 ARM: dts: r7s72100: add sdhi clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:17 +01:00