Commit Graph

2734 Commits

Author SHA1 Message Date
Mark Brown c8b350424d Merge remote-tracking branches 'spi/fix/fsl-cpm', 'spi/fix/fsl-dspi' and 'spi/fix/fsl-espi' into spi-linus 2015-05-11 17:29:49 +01:00
Mark Brown bed5e4d829 spi: Fixes for v4.1
A few driver fixes plus two changes for the core, one to make the
 setup_transfer() callback optional which fixes crashes in some drivers
 which were updated to use new interfaces without apparent testing and
 one to ensure we don't expose the data buffers we use for dummy
 transfers to drivers which avoids potential issues with multiple
 accesses to them or reuse.
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Merge tag 'spi-v4.1-rc1' into spi-linus

spi: Fixes for v4.1

A few driver fixes plus two changes for the core, one to make the
setup_transfer() callback optional which fixes crashes in some drivers
which were updated to use new interfaces without apparent testing and
one to ensure we don't expose the data buffers we use for dummy
transfers to drivers which avoids potential issues with multiple
accesses to them or reuse.

# gpg: Signature made Sat 25 Apr 2015 10:59:47 BST using RSA key ID 5D5487D0
# gpg: key CD7BEEBC: no public key for trusted key - skipped
# gpg: key CD7BEEBC marked as ultimately trusted
# gpg: key AF88CD16: no public key for trusted key - skipped
# gpg: key AF88CD16 marked as ultimately trusted
# gpg: key 16005C11: no public key for trusted key - skipped
# gpg: key 16005C11 marked as ultimately trusted
# gpg: key 5621E907: no public key for trusted key - skipped
# gpg: key 5621E907 marked as ultimately trusted
# gpg: key 5C6153AD: no public key for trusted key - skipped
# gpg: key 5C6153AD marked as ultimately trusted
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
2015-05-11 17:29:46 +01:00
Jonatas Rech 2000058e89 spi: fsl-espi: fix behaviour for full-duplex xfers
This patch makes possible for protocol drivers to do full-duplex SPI
transfers properly. Until now this driver could only be used for
half-duplex transfers, since it always expected an spi_transfer with
non-null tx_buf to be only used for TX, and those with non-null rx_buf
to be only used for RX.

The fix consists in correcting the fsl_espi_transfer length by taking
into consideration duplex spi_transfers, and not just by adding n_tx
and n_rx.

Furthermore, this correction has exposed an inconsistency in the
protocol driver <-> controller driver interaction. The spi-fsl-espi
driver artificially inserts TX bytes when message fragmentation is
necessary (due to SPCOM_TRANLEN_MAX) instead of informing the
protocol driver of the hardware limitation. This was tested with the
m25p80 NOR flash protocol driver. Since fixing this issue may cause
other client drivers to malfunction, it was left as is.

Signed-off-by: Jonatas Rech <jonatas.rech@datacom.ind.br>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-25 14:00:09 +01:00
Linus Torvalds d6a4c0e5d3 Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul:

 - new drivers for:
        - Ingenic JZ4780 controller
        - APM X-Gene controller
        - Freescale RaidEngine device
        - Renesas USB Controller

  - remove device_alloc_chan_resources dummy handlers

  - sh driver cleanups for peri peri and related emmc and asoc patches
    as well

  - fixes and enhancements spread over the drivers

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (59 commits)
  dmaengine: dw: don't prompt for DW_DMAC_CORE
  dmaengine: shdmac: avoid unused variable warnings
  dmaengine: fix platform_no_drv_owner.cocci warnings
  dmaengine: pch_dma: fix memory leak on failure path in pch_dma_probe()
  dmaengine: at_xdmac: unlock spin lock before return
  dmaengine: xgene: devm_ioremap() returns NULL on error
  dmaengine: xgene: buffer overflow in xgene_dma_init_channels()
  dmaengine: usb-dmac: Fix dereferencing freed memory 'desc'
  dmaengine: sa11x0: report slave capabilities to upper layers
  dmaengine: vdma: Fix compilation warnings
  dmaengine: fsl_raid: statify fsl_re_chan_probe
  dmaengine: Driver support for FSL RaidEngine device.
  dmaengine: xgene_dma_init_ring_mngr() can be static
  Documentation: dma: Add documentation for the APM X-Gene SoC DMA device DTS binding
  arm64: dts: Add APM X-Gene SoC DMA device and DMA clock DTS nodes
  dmaengine: Add support for APM X-Gene SoC DMA engine driver
  dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver
  dmaengine: renesas,usb-dmac: Add device tree bindings documentation
  dmaengine: edma: fixed wrongly initialized data parameter to the edma callback
  dmaengine: ste_dma40: fix implicit conversion
  ...
2015-04-24 09:49:37 -07:00
Christophe Leroy 73ee39a4c9 spi: fsl-spi: fix devm_ioremap_resource() error case
devm_ioremap_resource() doesn't return NULL but an ERR_PTR on error.

Reported-by: Jonas Gorsky <jogo@openwrt.org>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-24 13:27:53 +01:00
Haikun Wang 50574dd2f6 spi: Kconfig: Add SOC_LS1021A to SPI_FSL_DSPI dependence
LS1021A chip also has the DSPI module.
Add it to the dependence.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-24 13:25:36 +01:00
Mark Brown 5a1b11cbcc Merge remote-tracking branches 'spi/fix/bcm2835', 'spi/fix/bcm2835-code', 'spi/fix/bitbang', 'spi/fix/fsl-cpm' and 'spi/fix/omap2-mcspi' into spi-linus 2015-04-24 11:10:46 +01:00
Fionn Cleary c5a06e75f3 spi/omap2-mcpsi: Always call spi_finalize_current_message()
The spi queue waits forever for spi_finalize_current_message() to be
called, blocking the bus.  Ensure that all error paths from
omap2_mcspi_transfer_one_message() call spi_finalize_current_message().

Signed-off-by: Fionn Cleary <fionn.cleary@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-24 10:55:24 +01:00
Christophe Leroy 575bec5318 spi: fsl-spi: use devm_ioremap_resource() to map parameter ram on CPM1
On CPM2, the SPI parameter RAM is dynamically allocated in the
dualport RAM whereas in CPM1, it is statically allocated to a default
address with capability to relocate it somewhere else via the use of
CPM micropatch. The address of the parameter RAM is given by the boot
loader and expected to be mapped via devm_ioremap_resource()

In the current implementation, in function fsl_spi_cpm_get_pram()
there is a confusion between the SPI_BASE register and the base of the
SPI parameter RAM. Fortunatly, it is working properly with MPC866 and
MPC885 because they do set SPI_BASE, but on MPC860 and other old
MPC8xx that doesn't set SPI_BASE, pram_ofs is not properly set.
Also, the parameter RAM is not properly mapped with
devm_ioremap_resource() as it should but still gets accessible by
chance through the full RAM which is mapped from somewhere else.

This patch applies to the SPI driver the same principle as for the
CPM UART: when the CPM is of type CPM1, we simply do an
devm_ioremap_resource() of the area provided via the device tree.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-22 20:46:45 +01:00
Pelle Nilsson 7d0ec8b6f4 spi: bitbang: Make setup_transfer() callback optional
Some controller drivers have no need of this callback (spi-altera even
causes a NULL pointer dereference because it doesn't register the callback,
falsely assuming that it is already optional).

Fixes: 30af9b558a ("spi/bitbang: Drop empty setup() functions")
Signed-off-by: Pelle Nilsson <per.nilsson@xelmo.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@vanguardiasur.com.ar>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-18 12:01:03 +01:00
Robin Gong f8bb820da4 spi: check tx_buf and rx_buf in spi_unmap_msg
Some spi device drivers use the same tx_buf and rx_buf repeatly for better
performance such as driver/input/touchsreen/ads7846.c, but spi core grab tx_buf
/rx_buf of transfer and set them as dummy_tx/dummy_rx once they are NULL. Thus,
in the second time the tx_buf/rx_buf will be replaced by dummy_tx/dummy_rx and
the data which produced by the last tx or rx may be wrongly sent to the device
or handled by the upper level protocol. This patch just keep the orignal value
of tx_buf/rx_buf if they are NULL after this transfer processed.

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-16 18:58:05 +01:00
Martin Sperl 145367baa4 spi: bcm2835: change timeout of polling driver to 1s
The way that the timeout code is written in the polling function
the timeout does also trigger when interrupted or rescheduled while
in the polling loop.

This patch changes the timeout from effectively 20ms (=2 jiffies) to
1 second and removes the time that the transfer really takes out of
the computation, as - per design - this is <30us and the jiffie resolution
is 10ms so that does not make any difference what so ever.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-16 18:57:07 +01:00
Guenter Roeck 8844d0f1cb spi: bcm2835: Add GPIOLIB dependency
Fix:

drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:356:21: error:
			dereferencing pointer to incomplete type
drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
drivers/spi/spi-bcm2835.c:382:2: error:
	`		implicit declaration of function 'gpiochip_find'
drivers/spi/spi-bcm2835.c:387:21: error:
			dereferencing pointer to incomplete type

by adding the now mandatory GPIOLIB dependency.

Fixes: a30a555d74 ("spi: bcm2835: transform native-cs to gpio-cs
	on first spi_setup")
Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-14 21:08:18 +01:00
Mark Brown 56afdb70ca Merge remote-tracking branches 'spi/topic/spidev' and 'spi/topic/spidev-test' into spi-next 2015-04-11 23:09:31 +01:00
Mark Brown 165f2288e1 Merge remote-tracking branches 'spi/topic/qup', 'spi/topic/rockchip', 'spi/topic/rspi', 'spi/topic/s3c64xx' and 'spi/topic/sc18is602' into spi-next 2015-04-11 23:09:25 +01:00
Mark Brown 8afba181b9 Merge remote-tracking branches 'spi/topic/omap-100k', 'spi/topic/omap-uwire', 'spi/topic/pl022', 'spi/topic/pm' and 'spi/topic/pxa2xx' into spi-next 2015-04-11 23:09:18 +01:00
Mark Brown 35fbf8452c Merge remote-tracking branches 'spi/topic/fsl-cspi', 'spi/topic/fsl-dspi', 'spi/topic/imx' and 'spi/topic/of-id' into spi-next 2015-04-11 23:09:14 +01:00
Mark Brown 431959c079 Merge remote-tracking branches 'spi/topic/blackfin', 'spi/topic/cadence', 'spi/topic/dw' and 'spi/topic/err' into spi-next 2015-04-11 23:09:09 +01:00
Mark Brown f9de73426c Merge remote-tracking branches 'spi/topic/atmel', 'spi/topic/bcm2385', 'spi/topic/bcm2835', 'spi/topic/bcm53xx' and 'spi/topic/bitbang' into spi-next 2015-04-11 23:09:03 +01:00
Mark Brown 19655dd083 Merge remote-tracking branch 'spi/topic/img-spfi' into spi-next 2015-04-11 23:09:01 +01:00
Mark Brown e897f795a9 Merge remote-tracking branch 'spi/topic/core' into spi-next 2015-04-11 23:09:00 +01:00
Mark Brown 31d25e5cda Merge remote-tracking branches 'spi/fix/fsl-dspi', 'spi/fix/imx' and 'spi/fix/rockchip' into spi-linus 2015-04-11 23:08:56 +01:00
Mark Brown 68a595c775 Merge remote-tracking branch 'spi/fix/img-spfi' into spi-linus 2015-04-11 23:08:54 +01:00
Martin Sperl 704f32d48a spi: bcm2835: enabling polling mode for transfers shorter than 30us
In cases of short transfer times the CPU is spending lots of time
in the interrupt handler and scheduler to reschedule the worker thread.

Measurements show that we have times where it takes 29.32us to between
the last clock change and the time that the worker-thread is running again
returning from wait_for_completion_timeout().

During this time the interrupt-handler is running calling complete()
and then also the scheduler is rescheduling the worker thread.

This time can vary depending on how much of the code is still in
CPU-caches, when there is a burst of spi transfers the subsequent delays
are in the order of 25us, so the value of 30us seems reasonable.

With polling the whole transfer of 4 bytes at 10MHz finishes after 6.16us
(CS down to up) with the real transfer (clock running) taking 3.56us.
So the efficiency has much improved and is also freeing CPU cycles,
reducing interrupts and context switches.

Because of the above 30us seems to be a reasonable limit for polling.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-10 19:50:52 +01:00
Martin Sperl a30a555d74 spi: bcm2835: transform native-cs to gpio-cs on first spi_setup
Transforms the bcm-2835 native SPI-chip select to their gpio-cs equivalent.

This allows for some support of some optimizations that are not
possible due to HW-gliches on the CS line - especially filling
the FIFO before enabling SPI interrupts (by writing to CS register)
while the transfer is already in progress (See commit: e3a2be3030)

This patch also works arround some issues in bcm2835-pinctrl which does not
set the value when setting the GPIO as output - it just sets up output and
(typically) leaves the GPIO as low.  When a fix for this is merged then this
gpio_set_value can get removed from bcm2835_spi_setup.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-10 19:50:52 +01:00
Ezequiel Garcia 8c2c8c03cd spi: img-spfi: Control CS lines with GPIO
When the CONTINUE bit is set, the interrupt status we are polling to
identify if a transaction has finished can be sporadic.  Even though
the transfer has finished, the interrupt status may erroneously
indicate that there is still data in the FIFO.  This behaviour causes
random timeouts in large PIO transfers.

Instead of using the CONTINUE bit to control the CS lines, use the SPI
core's CS GPIO handling.  Also, now that the CONTINUE bit is not being
used, we can poll for the ALLDONE interrupt to indicate transfer
completion.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-08 21:04:51 +01:00
Mark Brown a25202b04f Merge branch 'fix/img-spfi' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-img-spfi 2015-04-08 21:04:43 +01:00
Andrew Bresticker ba33d8ac0c spi: img-spfi: Reset controller after each message
Imagination has recommended that the SPFI controller be reset after
each message, regardless of success or failure.  Do this in an
unprepare_message() callback.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-08 21:04:28 +01:00
Ezequiel Garcia 824ab37df0 spi: img-spfi: Implement a handle_err() callback
The driver can be greatly simplified by moving the transfer timeout
handling to a handle_err() callback.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-08 21:04:28 +01:00
Mark Brown 89cda06d7f Linux 4.0-rc7
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Merge tag 'v4.0-rc7' into spi-img-spfi

Linux 4.0-rc7
2015-04-08 21:04:25 +01:00
Sifan Naeem ede8342bf6 spi: img-spfi: Setup TRANSACTION register before CONTROL register
Setting the transfer length in the TRANSACTION register after the
CONTROL register is programmed causes intermittent timeout issues in
SPFI transfers when using the SPI framework to control the CS GPIO
lines.  To avoid this issue, set transfer length before programming
the CONTROL register.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-08 11:35:54 +01:00
Geert Uytterhoeven ff61eb4220 spi: Make master->handle_err() callback optional to avoid crashes
If a driver doesn't implement the master->handle_err() callback and an
SPI transfer fails, the kernel will crash with a NULL pointer
dereference:

    Unable to handle kernel NULL pointer dereference at virtual address 00000000
    pgd = c0003000
    [00000000] *pgd=80000040004003, *pmd=00000000
    Internal error: Oops: 80000206 [#1] SMP ARM
    Modules linked in:
    CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.0.0-rc7-koelsch-05861-g1fc9fdd4add4f783 #1046
    Hardware name: Generic R8A7791 (Flattened Device Tree)
    task: eec359c0 ti: eec54000 task.ti: eec54000
    PC is at 0x0
    LR is at spi_transfer_one_message+0x1cc/0x1f0

Make the master->handle_err() callback optional to avoid the crash.

Also fix a spelling mistake in the callback documentation while we're at
it.

Fixes: b716c4ffc6 ("spi: introduce master->handle_err() callback")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-07 19:41:32 +01:00
Andrew Bresticker 8543d0e72d spi: img-spfi: Limit bit clock to 1/4th of input clock
Although the SPFI BITCLK divider supports a value of up to 255, only
values up to 128 are usable.  This results in a maximum possible bit
clock rate of 1/4th the input clock rate.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-07 12:19:10 +01:00
Ezequiel Garcia b6fe39770a spi: img-spfi: Implement a prepare_message() callback
In preparation for switching to using the SPI core's CS GPIO handling,
move setup of the PORT_STATE register, which must be configured before
CS is asserted, to a prepare_message() callback.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-07 12:17:54 +01:00
Mark Brown 63031ed6b8 Merge branch 'fix/fsl-dspi' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi
Conflicts:
	drivers/spi/spi-fsl-dspi.c
2015-04-07 11:54:40 +01:00
Aaron Brice 95bf15f386 spi: fsl-dspi: Add ~50ns delay between cs and sck
Add delay between chip select and clock signals, before clock starts and
after clock stops.

Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-06 18:12:25 +01:00
Aaron Brice e689d6df82 spi: fsl-dspi: Fix clock rate scale values
Previous algorithm had an outer loop with the values {2,3,5,7} and an
inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first
value over the required scaling value (where the total scale was the two
numbers multiplied).

Since the inner loop went up to 32768 it would always pick a value of 2
for PBR and a much higher than necessary value for BR.  The desired
scale factor was being divided by two I believe to compensate for the
much higher scale factors (the divide by two not specified in the
reference manual).

Updated to check all values and find the smallest scale factor possible
without going over the desired clock rate.

Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-06 18:11:19 +01:00
Dan Carpenter c9bc3e8bf0 spi: signedness bug in qspi_trigger_transfer_out_int()
We need "ret" to be unsigned for the error handling to work.  The
signedness of "i" and "n" don't matter but qspi_set_send_trigger()
returns an int so I've changed them to int as well.

Fixes: 4b6fe3edcb ('spi: Using Trigger number to transmit/receive data')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-06 17:20:07 +01:00
Lucas Stach f511ab09df spi: imx: read back the RX/TX watermark levels earlier
They are used to decide if the controller can do DMA on a buffer
of a specific length and thus are needed before any transfer is attempted.

This fixes a memory leak where the SPI core uses the drivers can_dma()
callback to determine if a buffer needs to be mapped. As the watermark
levels aren't correct at that point the driver falsely claims to be able to
DMA the buffer when it fact it isn't.
After the transfer has been done the core uses the same callback to
determine if it needs to unmap the buffers. As the driver now correctly
claims to not being able to DMA the buffer the core doesn't attempt to
unmap the buffer which leaves the SGT leaking.

Fixes: f62caccd12 (spi: spi-imx: add DMA support)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2015-04-01 21:32:38 +01:00
Chen Gang 057f6061a1 spi: spi-bfin5xx: Initialize cr_width in bfin_spi_pump_transfers()
cr_width may be not initialized before using by cr, the related warning
(with defconfig under blackfin by gcc5):

    CC      drivers/spi/spi-bfin5xx.o
  drivers/spi/spi-bfin5xx.c: In function 'bfin_spi_pump_transfers':
  drivers/spi/spi-bfin5xx.c:655:5: warning: 'cr_width' may be used uninitialized in this function [-Wmaybe-uninitialized]
    cr |= cr_width;
       ^

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-01 21:28:56 +01:00
Michael Grzeschik 232a5adc51 spi: bitbang: only toggle bitchanges
The current implementation of bitbang_txrx_be_cpha0 and
bitbang_txrx_be_cpha1 always call setmosi. That runs into several
unnecessary calls into the gpiolib when the level of the GPIO actually
has not to be changed.

This patch changes the routines to remember the last GPIO level
and only calls setmosi if an change has to be made. This
way it improves the transfer throughput.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-31 17:20:36 +01:00
Dan Carpenter eecacf73a4 spi: pxa2xx: missing break in pxa2xx_ssp_get_clk_div()
We refactored this code but accidentally left out a break statement so
QUARK_X1000_SSP isn't handled correctly.

Fixes: 025ffe88ee ('spi: pxa2xx: shift clk_div in one place')
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-31 15:05:43 +01:00
Aaron Brice 6fd63087d8 spi: fsl-dspi: Fix clock rate scale values
Previous algorithm had an outer loop with the values {2,3,5,7} and an
inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first
value over the required scaling value (where the total scale was the two
numbers multiplied).

Since the inner loop went up to 32768 it would always pick a value of 2
for PBR and a much higher than necessary value for BR.  The desired
scale factor was being divided by two I believe to compensate for the
much higher scale factors (the divide by two not specified in the
reference manual).

Updated to check all values and find the smallest scale factor possible
without going over the desired clock rate.

Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-31 12:13:03 +01:00
Hiep Cao Minh 4b6fe3edcb spi: Using Trigger number to transmit/receive data
In order to transmit and receive data when have 32 bytes of data that
ready has prepared on Transmit/Receive Buffer to transmit or receive.
Instead transmits/receives a byte data using Transmit/Receive Buffer
Data Triggering Number will improve the speed of transfer data.

Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-29 21:29:35 -07:00
Martin Sperl e3a2be3030 spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/message
To reduce the number of interrupts/message we fill the FIFO before
enabling interrupts - for short messages this reduces the interrupt count
from 2 to 1 interrupt.

There have been rare cases where short (<200ns) chip-select switches with
native CS have been observed during such operation, this is why this
optimization is only enabled for GPIO-CS.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-29 09:53:30 -07:00
Martin Sperl 1e4df62d46 spi: bcm2835: fix code formatting issue
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-29 09:51:53 -07:00
Mark Brown 956b200a84 spi: spidev: Warn loudly if instantiated from DT as "spidev"
Since spidev is a detail of how Linux controls a device rather than a
description of the hardware in the system we should never have a node
described as "spidev" in DT, any SPI device could be a spidev so this
is just not a useful description.

In order to help prevent users from writing such device trees generate a
warning if spidev is instantiated as a DT node without an ID in the match
table.

Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-27 16:43:03 -07:00
Martin Sperl e34ff011c7 spi: bcm2835: move to the transfer_one driver model
This also allows for GPIO-CS to get used removing the limitation of
2/3 SPI devises on the SPI bus.

Fixes: spi-cs-high with native CS with multiple devices on the spi-bus
resetting the chip selects to "normal" polarity after a finished
transfer.

No other functionality/improvements added.

Tested with the following 4 devices on the spi-bus:
* mcp2515 with native CS
* mcp2515 with gpio CS
* fb_st7735r with native CS
    (plus spi-cs-high via transistor inverting polarity)
* enc28j60 with gpio-CS
Tested-by: Martin Sperl <kernel@martin.sperl.org>

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-26 18:28:44 -07:00
Mark Brown 1be38e041f Linux 4.0-rc5
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Merge tag 'v4.0-rc5' into spi-bcm2835

Linux 4.0-rc5
2015-03-26 17:50:42 -07:00
Julius Werner 76b17e6e49 spi/rockchip: Add device tree property to configure Rx Sample Delay
We have found that we can sometimes see read failures on boards with
high-capacitance SPI lines. It seems that the controller samples the Rx
data line too early, and its register interface has an "Rx Sample Delay"
setting to fine-tune against this issue.

This patch adds a new optional device tree entry that can configure this
delay in terms of nanoseconds. The kernel will calculate the
best-fitting amount of parent clock ticks to program the controller with
based on that.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-26 17:42:21 -07:00