Commit Graph

4 Commits

Author SHA1 Message Date
Fabio Estevam 191f162c40 ARM: mach-imx: clk-pllv2: Staticize clk_pllv2_ops
Fix the following sparse warning:

rch/arm/mach-imx/clk-pllv2.c:232:16: warning: symbol 'clk_pllv2_ops' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:17:50 +08:00
Sascha Hauer 9ca41bccc3 ARM i.MX pllv2: make round_rate accurate
in round_rate we made the assumption that we can set arbitrary
frequencies and thus returned the input rate. This is not correct,
for certain frequencies after setting a frequency with set_rate,
recalc_rate will return different values. To fix this, introduce
set_rate/recalc_rate functions which work on variables instead
of registers directly. This way we can call these in round_rate
to get the exact rate which we would get if we call set_rate
with this value.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-04 15:23:47 +02:00
Sascha Hauer 6cc90d6de1 ARM i.MX pllv2: use standard register set unconditionally
The i.MX5 PLL has two different register sets for setting the
rate. One is used for the standard case and and is used for
DVFS. Which one of them is used depends on a hardware input
of the PLL. Current implementation reads back from the hardware
which setting is used. This is bogus: If we ever want to implement
DVFS we have to program both register sets and not only the one
which happens to be used at the moment. For now, just use the
standard register set uncondionally.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-04 15:23:41 +02:00
Sascha Hauer a547b816a8 ARM i.MX: Add common clock support for pllv2
This PLL is found on i.MX51 and i.MX53

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02 12:07:59 +02:00