Commit Graph

561 Commits

Author SHA1 Message Date
Ralf Baechle
de61b542b8 [MIPS] Rename PC speaker code
While the PC speaker is wired up to the i8254 there is more to the i8254
than just the PC speaker so this code was getting in the way under its
current name.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:23 +01:00
Atsushi Nemoto
28fc582cc9 [MIPS] Sparse: Use NULL for pointer
This fixes a sparse warning:

arch/mips/kernel/traps.c:376:44: warning: Using plain integer as NULL pointer

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:20 +01:00
Kevin D. Kissell
0db34215c7 [MIPS] SMTC: Interrupt mask backstop hack
To support multiple TC microthreads acting as "CPUs" within a VPE,
VPE-wide interrupt mask bits must be specially manipulated during
interrupt handling. To support legacy drivers and interrupt controller
management code, SMTC has a "backstop" to track and if necessary restore
the interrupt mask. This has some performance impact on interrupt service
overhead. Disable it only if you know what you are doing.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:17 +01:00
Ralf Baechle
3bd3966448 [MIPS] Fix resume for 64K page size on R4000 class processors.
Problem reported by Peter Watkins <pwatkins@sicortex.com> but this is
a different fix.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:05 +01:00
Ralf Baechle
688b3d7208 [MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Atsushi Nemoto
6312e0ee45 [MIPS] Add some debugfs files to debug unaligned accesses
Currently a number of unaligned instructions is counted but not used.
Add /debug/mips/unaligned_instructions file to show the value.

And add /debug/mips/unaligned_action to control behavior upon an
unaligned access.  Possible actions are:

0: silently fixup the unaligned access.
1: send SIGBUS.
2: dump registers, process name, etc. and fixup.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Ralf Baechle
295cbf6d63 [MIPS] Move FPU affinity code into separate file.
Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Marc St-Jean
9267a30d1d [MIPS] PMC MSP71xx mips common
Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Fuxin Zhang
2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
a36920200c [MIPS] Enable support for the userlocal hardware register
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
d223a86154 [MIPS] FP affinity: Coding style cleanups
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
e7c4782f92 [MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:01 +01:00
Atsushi Nemoto
b63e804459 [MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Ralf Baechle
f6e2373ad6 [MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.
It shares no code at all.  While at it also fix up the beginning bitrot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Robert P. J. Day
b3f6df9f21 [MIPS] Transform old-style macros to newer "__noreturn"
Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the
newer standard of "__noreturn" as defined in compiler-gcc.h.

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
8f8771a057 [MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ingo Molnar
0437e109e1 sched: zap the migration init / cache-hot balancing code
the SMP load-balancer uses the boot-time migration-cost estimation
code to attempt to improve the quality of balancing. The reason for
this code is that the discrete priority queues do not preserve
the order of scheduling accurately, so the load-balancer skips
tasks that were running on a CPU 'recently'.

this code is fundamental fragile: the boot-time migration cost detector
doesnt really work on systems that had large L3 caches, it caused boot
delays on large systems and the whole cache-hot concept made the
balancing code pretty undeterministic as well.

(and hey, i wrote most of it, so i can say it out loud that it sucks ;-)

under CFS the same purpose of cache affinity can be achieved without
any special cache-hot special-case: tasks are sorted in the 'timeline'
tree and the SMP balancer picks tasks from the left side of the
tree, thus the most cache-cold task is balanced automatically.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-07-09 18:51:57 +02:00
Ralf Baechle
4b3e975e4a [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Chris Dearman
c3e838a2cb [MIPS] Fix timer/performance interrupt detection
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
6fb88ce04f [MIPS] AP/SP: Avoid triggering the 34K E125 performance issue
C0_status doesn't need to be initialized at this point anyway; the register
will be initialized later.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:10 +01:00
Ralf Baechle
8c976e3451 [MIPS] VSMP: Fix initialization ordering bug.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04 15:53:16 +01:00
Chris Dearman
8e15a0e35f [MIPS] Count timer interrupts correctly.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:34 +02:00
Pavel Kiryukhin
a76f3a417a [MIPS] use compat_siginfo in rt_sigframe_n32
Signed-off-by: Pavel Kiryukhin <vksavl@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
c8eae71dc8 [MIPS] 20K: Handle WAIT related bugs according to errata information
We used to avoid the WAIT entirely on the 20K but really only need to do
this on early revs of the 20K.  Without this a 20K was a bit of a
power hog.  Well, in the lower power power hog category ;-)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
3b1d4ed535 [MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict.  So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-20 22:27:10 +01:00
Chris Dearman
ffe9ee4709 [MIPS] Separate performance counter interrupts
Support for performance counter overflow interrupt that is on a separate
interrupt from the timer.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:15 +01:00
Ralf Baechle
4ebd5233f0 [MIPS] Fix modpost warnings by making start_secondary __cpuinit
WARNING: arch/mips/kernel/built-in.o(.text+0x9a58): Section mismatch: reference to .init.text:cpu_report (between 'start_secondary' and 'smp_prepare_boot_cpu')
WARNING: arch/mips/kernel/built-in.o(.text+0x9a60): Section mismatch: reference to .init.text:per_cpu_trap_init (between 'start_secondary' and 'smp_prepare_boot_cpu')
WARNING: arch/mips/kernel/built-in.o(.text+0x9adc): Section mismatch: reference to .init.text:cpu_probe (between 'start_secondary' and 'smp_prepare_boot_cpu')
mipsel-linux-objcopy -S -O srec --remove-section=.reginfo --remove-section=.mdebug --remove-section=.comment --remove-section=.note --remove-section=.pdr --remove-section=.options --remove-section=.MIPS.options vmlinux arch/mips/boot/vmlinux.srec

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
6a05888d71 [MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
8e8a52ed87 [MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
ef36fc3c5b [MIPS] SMTC: Fix warning.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Atsushi Nemoto
7a6d4f3874 [MIPS] Wire up utimensat, signalfd, timerfd, eventfd
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Chris Dearman
acaec427bc [MIPS] Always install the DSP exception handler.
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they
are actually expected to produce a reserved instruction exception.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Ralf Baechle
da9bc7263d [MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.
This did corrupt register s0 which the caller of self_ipi expects to
be unchanged.  This is a kernel bug which will only be triggered with
the compilers which compile __smtc_ipi_replay to use s0 across the
invocation of self_ipi. Gcc 4.1.2 does this, for example.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Atsushi Nemoto
6ba07e590d [MIPS] Fix warning by moving do_default_vi into CONFIG_CPU_MIPSR2_SRS
This fixes the warning:

arch/mips/kernel/traps.c:931: warning: 'do_default_vi' defined but not used

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:33 +01:00
Atsushi Nemoto
8676d2e024 [MIPS] Fix some system calls with long long arguments
* O32 fadvise64() pass long long arguments by register pairs.  Add
  sys32 version for 64 bit kernel.
* N32 readahead() can pass a long long argument by one register.  No
  need to use sys32_readahead.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:32 +01:00
Chris Dearman
f9509c84d8 [MIPS] Remove duplicate fpu enable hazard code.
Use common code from hazards.h instead.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:31 +01:00
Linus Torvalds
080e89270a Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fix
* git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fix:
  mm/slab: fix section mismatch warning
  mm: fix section mismatch warnings
  init/main: use __init_refok to fix section mismatch
  kbuild: introduce __init_refok/__initdata_refok to supress section mismatch warnings
  all-archs: consolidate .data section definition in asm-generic
  all-archs: consolidate .text section definition in asm-generic
  kbuild: add "Section mismatch" warning whitelist for powerpc
  kbuild: make better section mismatch reports on i386, arm and mips
  kbuild: make modpost section warnings clearer
  kconfig: search harder for curses library in check-lxdialog.sh
  kbuild: include limits.h in sumversion.c for PATH_MAX
  powerpc: Fix the MODALIAS generation in modpost for of devices
2007-05-21 12:03:04 -07:00
Alexey Dobriyan
e8edc6e03a Detach sched.h from mm.h
First thing mm.h does is including sched.h solely for can_do_mlock() inline
function which has "current" dereference inside. By dealing with can_do_mlock()
mm.h can be detached from sched.h which is good. See below, why.

This patch
a) removes unconditional inclusion of sched.h from mm.h
b) makes can_do_mlock() normal function in mm/mlock.c
c) exports can_do_mlock() to not break compilation
d) adds sched.h inclusions back to files that were getting it indirectly.
e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were
   getting them indirectly

Net result is:
a) mm.h users would get less code to open, read, preprocess, parse, ... if
   they don't need sched.h
b) sched.h stops being dependency for significant number of files:
   on x86_64 allmodconfig touching sched.h results in recompile of 4083 files,
   after patch it's only 3744 (-8.3%).

Cross-compile tested on

	all arm defconfigs, all mips defconfigs, all powerpc defconfigs,
	alpha alpha-up
	arm
	i386 i386-up i386-defconfig i386-allnoconfig
	ia64 ia64-up
	m68k
	mips
	parisc parisc-up
	powerpc powerpc-up
	s390 s390-up
	sparc sparc-up
	sparc64 sparc64-up
	um-x86_64
	x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig

as well as my two usual configs.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21 09:18:19 -07:00
Sam Ravnborg
ca967258b6 all-archs: consolidate .data section definition in asm-generic
With this consolidation we can now modify the .data
section definition in one spot for all archs.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-05-19 09:11:57 +02:00
Sam Ravnborg
7664709b44 all-archs: consolidate .text section definition in asm-generic
Move definition of .text section to asm-generic.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-05-19 09:11:57 +02:00
Atsushi Nemoto
f543110da7 [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno()
This fix these warnings:

WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:free_irqno from __ksymtab_gpl between '__ksymtab_free_irqno' (at offset 0x0) and '__ksymtab_allocate_irqno'
WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:allocate_irqno from __ksymtab_gpl after '__ksymtab_allocate_irqno' (at offset 0x8)

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Franck Bui-Huu
55d0b4e3f6 [MIPS] clocksource: use CLOCKSOURCE_MASK() macro
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Chris Dearman
d725cf3818 [MIPS] MT: Reenable EIC support and add support for SOCit SC.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:31 +01:00
Ralf Baechle
ef300e4223 [MIPS] Define and use vi_handler_t for vectored interrupt handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:30 +01:00
Ralf Baechle
856a514b40 [MIPS] Fix do_default_vi to use get_irq_regs to get the irq register ptr.
Harmless bug because this function is only called in case of another
kernel bug anyway which is also why this was missed for so long.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:30 +01:00
Ralf Baechle
99af900aef [MIPS] Make do_default_vi static
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:30 +01:00
Franck Bui-Huu
36ea1d57a4 [MIPS] early_printk: allow the early console to run earlier
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:30 +01:00
Franck Bui-Huu
ca4437d4a5 [MIPS] early_printk: use init section
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11 14:28:30 +01:00
Roman Zippel
f7e4217b00 rename thread_info to stack
This finally renames the thread_info field in task structure to stack, so that
the assumptions about this field are gone and archs have more freedom about
placing the thread_info structure.

Nonbroken archs which have a proper thread pointer can do the access to both
current thread and task structure via a single pointer.

It'll allow for a few more cleanups of the fork code, from which e.g.  ia64
could benefit.

Signed-off-by: Roman Zippel <zippel@linux-m68k.org>
[akpm@linux-foundation.org: build fix]
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
Cc: Andi Kleen <ak@muc.de>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-09 12:30:56 -07:00
Roman Zippel
c9f4f06d31 wrap access to thread_info
Recently a few direct accesses to the thread_info in the task structure snuck
back, so this wraps them with the appropriate wrapper.

Signed-off-by: Roman Zippel <zippel@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-09 12:30:56 -07:00