Commit Graph

25 Commits

Author SHA1 Message Date
Ulrich Hecht c6d67fb037 clk: shmobile: div6: support selectable-input clocks
Support for setting the parent at initialization time based on the current
hardware configuration in DIV6 clocks with selectable parents as found in
the r8a73a4, r8a7740, sh73a0, and other SoCs.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-11-12 14:24:08 +01:00
Linus Torvalds c0fa2373f8 The clk tree changes for 3.18 are dominated by clock drivers. Mostly
fixes and enhancements to existing drivers as well as new drivers. This
 tag contains a bit more arch code than I usually take due to some OMAP2+
 changes. Additionally it contains the restart notifier handlers which
 are merged as a dependency into several trees.
 
 The PXA changes are the only messy part. Due to having a stable tree I
 had to revert one patch and follow up with one more fix near the tip of
 this tag. Some dead code is introduced but it will soon become live code
 after 3.18-rc1 is released as the rest of the PXA family is converted
 over to the common clock framework.
 
 Another trend in this tag is that multiple vendors have started to push
 the complexity of changing their CPU frequency into the clock driver,
 whereas this used to be done in CPUfreq drivers.
 
 Changes to the clk core include a generic gpio-clock type and a
 clk_set_phase() function added to the top-level clk.h api. Due to some
 confusion on the fbdev mailing list the kernel boot parameters
 documentation was updated to further explain the clk_ignore_unused
 parameter, which is often required by users of the simplefb driver.
 Finally some fixes to the locking around the clock debugfs stuff was
 done to prevent deadlocks when interacting with other subsystems.
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Merge tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux

Pull clock tree updates from Mike Turquette:
 "The clk tree changes for 3.18 are dominated by clock drivers.  Mostly
  fixes and enhancements to existing drivers as well as new drivers.
  This tag contains a bit more arch code than I usually take due to some
  OMAP2+ changes.  Additionally it contains the restart notifier
  handlers which are merged as a dependency into several trees.

  The PXA changes are the only messy part.  Due to having a stable tree
  I had to revert one patch and follow up with one more fix near the tip
  of this tag.  Some dead code is introduced but it will soon become
  live code after 3.18-rc1 is released as the rest of the PXA family is
  converted over to the common clock framework.

  Another trend in this tag is that multiple vendors have started to
  push the complexity of changing their CPU frequency into the clock
  driver, whereas this used to be done in CPUfreq drivers.

  Changes to the clk core include a generic gpio-clock type and a
  clk_set_phase() function added to the top-level clk.h api.  Due to
  some confusion on the fbdev mailing list the kernel boot parameters
  documentation was updated to further explain the clk_ignore_unused
  parameter, which is often required by users of the simplefb driver.

  Finally some fixes to the locking around the clock debugfs stuff was
  done to prevent deadlocks when interacting with other subsystems."

* tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux: (99 commits)
  clk: pxa clocks build system fix
  Revert "arm: pxa: Transition pxa27x to clk framework"
  clk: samsung: register restart handlers for s3c2412 and s3c2443
  clk: rockchip: add restart handler
  clk: rockchip: rk3288: i2s_frac adds flag to set parent's rate
  doc/kernel-parameters.txt: clarify clk_ignore_unused
  arm: pxa: Transition pxa27x to clk framework
  dts: add devicetree bindings for pxa27x clocks
  clk: add pxa27x clock drivers
  arm: pxa: add clock pll selection bits
  clk: dts: document pxa clock binding
  clk: add pxa clocks infrastructure
  clk: gpio-gate: Ensure gpiod_ APIs are prototyped
  clk: ti: dra7-atl-clock: Mark the device as pm_runtime_irq_safe
  clk: ti: LLVMLinux: Move __init outside of type definition
  clk: ti: consider the fact that of_clk_get() might return an error
  clk: ti: dra7-atl-clock: fix a memory leak
  clk: ti: change clock init to use generic of_clk_init
  clk: hix5hd2: add I2C clocks
  clk: hix5hd2: add watchdog0 clocks
  ...
2014-10-15 07:05:03 +02:00
Linus Torvalds f33a3faa25 Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
Pull kbuild changes from Michal Marek:
 - fix for handling dependencies of *-objs targets by Masahiro Yamada
 - lots of cleanups in the kbuild machinery, also by Masahiro
 - fixes for the kconfig build to use an UTF-8 capable ncurses library
   if possible and to build on not-so-standard installs
 - some more minor fixes

* 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
  kbuild: Do not reference *-n variables in the Makefile
  kbuild: simplify build, clean, modbuiltin shorthands
  kbuild: arm: Do not define "comma" twice
  kbuild: remove obj-n and lib-n handling
  kbuild: remove unnecessary variable initializaions
  kbuild: remove unnecessary "obj- := dummy.o" trick
  kbuild: handle C=... and M=... after entering into build directory
  kbuild: use $(Q) for sub-make target
  kbuild: fake the "Entering directory ..." message more simply
  kconfig/lxdialog: get ncurses CFLAGS with pkg-config
  kconfig: nconfig: fix multi-byte UTF handling
  kconfig: lxdialog: fix spelling
  kbuild: Make scripts executable
  kbuild: remove redundant clean-files from scripts/kconfig/Makefile
  kbuild: refactor script/kconfig/Makefile
  kbuild: handle the dependency of multi-objs hostprogs appropriately
  kbuild: handle multi-objs dependency appropriately
2014-10-14 09:22:26 +02:00
Masahiro Yamada 895ed4e895 kbuild: remove unnecessary "obj- := dummy.o" trick
In these Makefiles, at least one of "obj-y" and "obj-" is non-empty,
hence built-in.o is always created without such a trick.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Peter Foley <pefoley2@pefoley.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au> [shmobile]
Acked-by: David S. Miller <davem@davemloft.net> [networking]
Signed-off-by: Michal Marek <mmarek@suse.cz>
2014-10-02 13:55:02 +02:00
Kuninori Morimoto 4abe240878 clk: shmobile: add missing 0x0100 for SDCKCR
10cdfe9f32
(clk: shmobile: Add R-Car Gen2 clocks support)
added R-Car Gen2 clock support via DT for v3.14.

But, cpg_sd01_div_table is missing
"0x0100: x 1/8" division ratio.
This patch fixes hidden bug.
It is based on R-Car H2 v0.7, R-Car M2 v0.9.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-02 15:03:16 -07:00
Hisashi Nakamura 8de078f189 clk: shmobile: Add r8a7794 support
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-27 08:40:54 +09:00
Ulrich Hecht 1923ca92a6 clk: shmobile: Add R8A7740-specific clock support
Driver for the R8A7740's clocks that are too specific to be supported by a
generic driver.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-23 13:38:25 -07:00
Laurent Pinchart bb178da701 clk: shmobile: mstp: Fix the is_enabled() operation
The MSTP[SC]R registers have clock stop bits, not clock enable bits. The
bit value should thus be inverted in the is_enabled() operation.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-22 19:03:03 -07:00
Simon Horman 7b42a997bf clk: shmobile: r8a7779: Add clocks support
The R8A7779 SoC has several clocks that are too custom to be supported in a
generic driver. Those clocks are all fixed rate clocks with multiplier and
divisor set according to boot mode configuration.

Based on work for R-Car Gen2 SoCs by Laurent Pinchart.

Cc: devicetree@vger.kernel.org
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 23:07:40 -07:00
Ben Dooks 8e33f91a0b clk: shmobile: clk-mstp: change to using clock-indices
With the addition of clock-indices, we need to change the renesas
clock implementation to use these instead of the local definition
of "renesas,clock-indices".

Since this will break booting with older device trees, we add a
simple auto-detection of which properties are present.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-12 16:53:37 -07:00
Linus Torvalds 19bc2eec3c The clock framework changes for 3.15 look similar to past pull requests.
Mostly clock driver updates, more Device Tree support in the form of
 common functions useful across platforms and a handful of features and
 fixes to the framework core.
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Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework changes from Mike Turquette:
 "The clock framework changes for 3.15 look similar to past pull
  requests.  Mostly clock driver updates, more Device Tree support in
  the form of common functions useful across platforms and a handful of
  features and fixes to the framework core"

* tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
  clk: shmobile: fix setting paretn clock rate
  clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1
  clk: Fix minor errors in of_clk_init() function comments
  clk: reverse default clk provider initialization order in of_clk_init()
  clk: sirf: update copyright years to 2014
  clk: mmp: try to use closer one when do round rate
  clk: mmp: fix the wrong calculation formula
  clk: mmp: fix wrong mask when calculate denominator
  clk: st: Adds quadfs clock binding
  clk: st: Adds clockgen-vcc and clockgen-mux clock binding
  clk: st: Adds clockgen clock binding
  clk: st: Adds divmux and prediv clock binding
  clk: st: Support for A9 MUX clocks
  clk: st: Support for ClockGenA9/DDR/GPU
  clk: st: Support for QUADFS inside ClockGenB/C/D/E/F
  clk: st: Support for VCC-mux and MUX clocks
  clk: st: Support for PLLs inside ClockGenA(s)
  clk: st: Support for DIVMUX and PreDiv Clocks
  clk: support hardware-specific debugfs entries
  clk: s2mps11: Use of_get_child_by_name
  ...
2014-04-05 18:39:18 -07:00
Ben Dooks e44df332f3 clk: shmobile: fix setting paretn clock rate
If the driver needs to change a clock rate, then it must be propogated
through the MSTP clock to the parent clock (such as shdi0 -> sd0). Without
this we cannot up-rate default clocks which are really slow (such as the
mmcif1 which defaults to 12MHz where it could be running at 97MHz)

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-04-02 11:31:05 -07:00
Ben Dooks 365b01869b clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1
The clock generator for rcar-gen2 has the lb, sdh, sd0 and sd1 clocks
parented to pll1_div2 where the hardware diagram shows these to be
directly fed from pll1.

This fixes the initial rate for sdh0 clock to be 97.5MHz instead of
the reported 48MHz where the manual says the default register values
are for 97.5MHz.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-31 17:06:28 -07:00
Wolfram Sang a665962e8f clk: shmobile: add CPG driver for rz-platforms
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-20 18:22:36 -07:00
Linus Torvalds 7bffc48177 Single fix for a clock driver merged in 3.14-rc1. Without this fix the
CPU frequency cannot be scaled.
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Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux

Pull clk driver fix from Mike Turquette:
 "Single fix for a clock driver merged in 3.14-rc1.  Without this fix
  the CPU frequency cannot be scaled"

* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
  clk: shmobile: rcar-gen2: Use kick bit to allow Z clock frequency change
2014-03-08 10:51:30 -08:00
Benoit Cousson d9120198dd clk: shmobile: rcar-gen2: Use kick bit to allow Z clock frequency change
The Z clock frequency change is effective only after setting the kick
bit located in the FRQCRB register.
Without that, the CA15 CPUs clock rate will never change.

Fix that by checking if the kick bit is cleared and enable it to make
the clock rate change effective. The bit is cleared automatically upon
completion.

Signed-off-by: Benoit Cousson <bcousson+renesas@baylibre.com>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-05 22:41:15 -08:00
Wolfram Sang 95aa4f9b5f clk: shmobile: div6: use proper description in kernel doc
These variable clocks have nothing to do with MSTP gating, probably a
copy&paste leftover.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-25 00:26:37 -08:00
Laurent Pinchart 8510e7263a clk: shmobile: rcar-gen2: Fix qspi divisor
The qspi clock divisor is incorrectly set to twice the value it should
have, possibly because it has been computed based on PLL1 as the clock
parent instead of PLL1 / 2 (the datasheets specifies the qspi nominal
frequencies, not the divisor values). Fix it.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-18 21:41:03 -08:00
Laurent Pinchart 995a9190ac clk: shmobile: rcar-gen2: Fix clock parent all non-PLL clocks
The lb, qspi, sdh, sd0 and sd1 clocks have the PLL1 (divided by 2) as
their parent, not the main clock. Fix it.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-18 21:41:01 -08:00
Valentine Barshak 209f4fedcf clk: shmobile: Fix MSTP clock array initialization
The clks member of the clk_onecell_data structure should
point to a valid clk array (no NULL entries allowed),
and the clk_num should be equal to the number
of elements in the clks array.

The MSTP driver fails to satisfy the above conditions.
The clks array may contain NULL entries if not all
clock-indices are initialized in the device tree.
Thus, if the clock indices are interleaved we end up
with NULL pointers in-between.

The other problem is the driver uses maximum clock index
as the number of clocks, which is incorrect (less than
the actual number of clocks by 1).

Fix the first issue by pre-setting the whole clks array
with ERR_PTR(-ENOENT) pointers instead of zeros; and
use maximum clkidx + 1 as the number of clocks to fix
the other one.

This should make of_clk_src_onecell_get() return the following:
* valid clk pointers for all clocks registered;
* ERR_PTR(-EINVAL) if (idx >= clk_data->clk_num);
* ERR_PTR(-ENOENT) if the clock at the selected index was not
  initialized in the device tree (and was not registered).

Changes in V2:
* removed brackets from the one-line for loop

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-14 11:35:57 -08:00
Valentine Barshak 6413b090de clk: shmobile: Fix MSTP clock index
Use clkidx when registering MSTP clocks instead of loop counter
since the value is then used to access the specific clock index bit
in the mstp register.

The issue was introduced by the following commit:
f94859c215 "clk: shmobile: Add MSTP clock support"

Changes in V2:
* none

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-14 11:35:45 -08:00
Takashi Yoshii 92ca6a8ce9 clk: emev2: Add support for emev2 SMU clocks with DT
Device tree clock binding document for EMMA Mobile EV2 SMU,
And Common clock framework based implementation of it.
Following nodes are defined to describe clock tree.
- renesas,emev2-smu
- renesas,emev2-smu-clkdiv
- renesas,emev2-smu-gclk

These bindings are designed manually based on
 19UH0037EJ1000_SMU : System Management Unit User's Manual

So far, reparent is not implemented, and is fixed to index #0.
Clock tree description is not included, and should be provided
by device-tree.

Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-14 13:17:55 +09:00
Laurent Pinchart f94859c215 clk: shmobile: Add MSTP clock support
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.

Those clocks are found on Renesas ARM SoCs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12 19:23:59 -08:00
Laurent Pinchart abe844aa5b clk: shmobile: Add DIV6 clock support
DIV6 clocks are divider gate clocks controlled through a single
register. The divider is expressed on 6 bits, hence the name, and can
take values from 1/1 to 1/64.

Those clocks are found on Renesas ARM SoCs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12 19:23:58 -08:00
Laurent Pinchart 10cdfe9f32 clk: shmobile: Add R-Car Gen2 clocks support
The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
too custom to be supported in a generic driver. Those clocks can be
divided in two categories:

- Fixed rate clocks with multiplier and divisor set according to boot
  mode configuration

- Custom divider clocks with SoC-specific divider values

This driver supports both.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-12 19:23:58 -08:00