Commit Graph

15 Commits

Author SHA1 Message Date
Ludovic Desroches dcce6ce802 ARM: at91: dt: remove unit-address part for memory nodes
Because of the inclusion of skeleton.dtsi, the memory node is
named "memory" we where not modifying the already included one
but creating a new one. It caused bad memory node detection during
early_init_dt_scan_memory() so we modify them.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-04-04 18:35:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD 62c5553ab7 ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5
make the ECHI depends on ARCH_AT91

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-03-16 00:40:59 +08:00
Jean-Christophe PLAGNIOL-VILLARD 6a06245990 ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-03-16 00:40:55 +08:00
Jean-Christophe PLAGNIOL-VILLARD 82015c4eae ARM: at91: add Shutdown Controller (SHDWC) DT support
Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:38:02 +08:00
Jean-Christophe PLAGNIOL-VILLARD a7776ec625 ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:37:56 +08:00
Jean-Christophe PLAGNIOL-VILLARD c8082d344a ARM: at91: add RSTC (Reset Controller) dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:22 +08:00
Jean-Christophe PLAGNIOL-VILLARD eb5e76ffd4 ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:14 +08:00
Jean-Christophe PLAGNIOL-VILLARD 8f24bdaac9 ARM: at91: sam9g45 add i2c DT support
For now on use i2c-gpio driver on the same pin as the hardware IP.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:29:43 +08:00
Jean-Christophe PLAGNIOL-VILLARD d6a016616b atmel/nand: add DT support
Use a local copy of board informatin and fill with DT data.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:29:12 +08:00
Nicolas Ferre 3a61a5dae4 ARM: at91/tc: add device tree support to atmel_tclib
Device tree support added to atmel_tclib: the generic Timer Counter
library. This is used by the clocksource/clockevent driver tcb_clksrc.

The current DT enabled platforms are also modified to use it:
- .dtsi files are modified to add Timer Counter Block entries
- alias are created to allow identification of each block
- clkdev lookup tables are added for clocks identification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-03-01 13:38:48 +01:00
Jean-Christophe PLAGNIOL-VILLARD 23fa648fd3 ARM: at91: pit add DT support
Retreive registers address and IRQ from device tree entry.
Called from at91_dt_init_irq() so that timers are up-n-running
when timers initialization will occur.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: change error path and interrupts property handling]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01 13:38:36 +01:00
Nicolas Ferre 21f8187278 ARM: at91/gpio: add irqdomain and DT support
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.

Original idea and code by Jean-Christophe Plagniol-Villard.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01 13:29:01 +01:00
Nicolas Ferre e261501d05 ARM: at91/aic: add irq domain and device tree support
Add an irqdomain for the AIC interrupt controller.
The device tree support is mapping the registers and
is using the irq_domain_add_legacy() to manage hwirq
translation.
The documentation is describing the meaning of the
two cells required for using this "interrupt-controller"
in a device tree node.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01 13:29:00 +01:00
Nicolas Ferre 0d4f99d8b7 ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT
Add the Cadence macb ethernet controller in at91sam9g45 and at91sam9g20
.dtsi and enable it in at91sam9m10g45ek and usb_a9g20 board device tree file.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-12-16 13:11:09 +01:00
Nicolas Ferre 49fe2ba313 ARM: at91: dt: at91sam9g45 family and board device tree files
Create a new device tree source file for Atmel at91sam9g45 SoC family.
The Evaluation Kit at91sam9m10g45ek includes it.
This first basic support will be populated as drivers and boards will be
converted to device tree.
Contains serial, dma and interrupt controllers.

The generic board file still takes advantage of platform data for early serial
init. As we need a storage media and the NAND flash driver is not converted to
DT yet, we keep old initialization for it.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
2011-10-25 13:08:21 +02:00