Commit Graph

11 Commits

Author SHA1 Message Date
Michal Simek
3765d6958d microblaze: Use instruction with delay slot
Sync labels.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:23 +02:00
Michal Simek
bd1637d63e microblaze: Remove additional resr and rear loading
RESR and REAR uses the same regs in whole file.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:23 +02:00
Michal Simek
b175bcfe31 microblaze: Change register usage for ESR and EAR
This change synchronize register usage in code.
ESR = R4
EAR = R3

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:23 +02:00
Michal Simek
7a6bbdc930 microblaze: Prepare work for optimization in exception code
Any sync branch must follow mts instructions not mfs.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:23 +02:00
Michal Simek
708e7153d6 microblaze: Add DEBUG option
Disable debug option in asm code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:23 +02:00
Michal Simek
131e4e97bf microblaze: Clear sticky FSR register after saving it to func parametr
Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear
it for noMMU kernel. This one do it for MMU.

Correct noMMU version

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-05 11:37:47 +02:00
John Williams
71b23d547b microblaze: Clear sticky FSR register after generating exception signals
FSR is sticky, so after the userspace exception/signal generation, clear
it ready for next time.

Signed-off-by: John Williams <john.williams@petalogix.com>
2009-09-22 10:00:42 +02:00
Michal Simek
ac854ff1fc microblaze: Save and restore msr in hw exception
I thought that this part of code could be removed because just
save and restore MSR but any code can't change it. But seems to
that any part of code works with this information.

This patch solved problem with allocation.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-09-22 08:50:15 +02:00
Michal Simek
3863dbceac microblaze: Support unaligned address for put/get_user macros
This patch add support for cases where load/store instruction
in put/get_user macro gets unaligned pointer to data and this
address is not valid. I prevent all cases which can failed.
I had to disable first stage of unaligned handler which is used
only for noMMU kernel and the whole work is done when interrupt
is enabled.
You have enable HW support for detect unaligned access in Microblaze.

This patch fixed three LTP tests:
getpeername01, getsockname01, socketpair01

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27 09:03:15 +02:00
Michal Simek
7db29dde73 microblaze_mmu_v2: Update exception handling - MMU exception
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-05-26 16:45:20 +02:00
Michal Simek
c4df4bc155 microblaze_v8: exception handling
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:13 +01:00