Commit Graph

21 Commits

Author SHA1 Message Date
Stanimir Varbanov b182cc4d59 firmware: qcom_scm: add two scm calls for iommu secure page table
Those two new SCM calls are needed from qcom-iommu driver in order
to initialize secure iommu page table.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:03:21 -05:00
Rob Clark a2c680c6ce firmware/qcom: add qcom_scm_restore_sec_cfg()
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:03:21 -05:00
Andy Gross a811b420b6 firmware: qcom_scm: Add set remote state API
This patch adds a set remote state SCM API.  This will be used by the
Venus and GPU subsystems to set state on the remote processors.

This work was based on two patch sets by Jordan Crouse and Stanimir
Varbanov.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-16 23:45:04 -06:00
Andy Gross b58a2d31f9 firmware: qcom: scm: Mask APQ8064 core clk dependency
This patch masks the core clk requirement for the APQ8064.  Until the
other peripherals correctly describe their clock dependencies or the
bus driver is put in place to handle the RPM dependencies, this bit
will remain masked.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-16 23:07:41 -06:00
spjoshi@codeaurora.org ed19b86e81 firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
When devm_clk_get fails for core clock, the failure was ignored
and the core_clk was explicitly set to NULL so that other
remaining clocks can be queried. However, now that we have a
cleaner way of expressing the clock dependency, return failure
when devm_clk_get fails for core clock.

Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-23 11:03:00 -06:00
spjoshi@codeaurora.org ab0822d57d firmware: qcom: scm: Remove core, iface and bus clocks dependency
Core, iface and bus clocks are not required to be voted from SCM
driver for some of the Qualcomm chipsets. Remove dependency on
these clocks from driver.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-23 11:02:51 -06:00
Wei Yongjun bd4760ca03 firmware: qcom: scm: Use devm_reset_controller_register()
Use devm_reset_controller_register() for the reset controller
registration and fixes the memory leak when unload the module.

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 23:24:51 -06:00
Paul Gortmaker dea8524218 firmware: qcom_scm: make it explicitly non-modular
The Kconfig currently controlling compilation of this code is:

drivers/firmware/Kconfig:config QCOM_SCM
drivers/firmware/Kconfig:       bool

...meaning that it currently is not being built as a module by anyone.

Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.

Since module_init was not in use by this code, the init ordering
remains unchanged with this commit.

Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-23 15:46:32 -05:00
Andy Gross 6c8e99d874 firmware: qcom: scm: Change initcall to subsys
The patch changes the initcall for SCM to use subsys_initcall
instead of arch_initcall.  This corrects the order so that we don't
probe defer when trying to get clks which causes issues later when
the spm driver makes calls to qcom_set_warm_boot_addr().

The order became an issue due to the changes to use arch_initcall_sync
for of_platform_default_populate_init().

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-07-05 16:29:25 -05:00
Andy Gross 72d4341940 firmware: qcom_scm: Add missing is_available API
Add back function that was dropped when reworking the SCM code.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-07-05 16:29:24 -05:00
Bjorn Andersson dd4fe5b292 firmware: qcom: scm: Expose PAS command 10 as reset-controller
PAS command 10 is used to assert and deassert the MSS reset via
TrustZone, expose this as a reset-controller to mimic the direct
access case.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24 22:53:52 -05:00
Bjorn Andersson f01e90fe34 firmware: qcom: scm: Peripheral Authentication Service
This adds the Peripheral Authentication Service (PAS) interface to the
Qualcomm SCM interface. The API is used to authenticate and boot a range
of external processors in various Qualcomm platforms.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24 22:53:50 -05:00
Kumar Gala 6b1751a86c firmware: qcom: scm: Add support for ARM64 SoCs
Add an implementation of the SCM interface that works on ARM64 SoCs.  This
is used by things like determine if we have HDCP support or not on the
system.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
2016-06-24 13:34:00 -05:00
Andy Gross 16e59467a4 firmware: qcom: scm: Convert to streaming DMA APIS
This patch converts the Qualcomm SCM driver to use the streaming DMA APIs
for communication buffers.  This is being done so that the
secure_flush_area call can be removed.  Using the DMA APIs will also make
the SCM32 symmetric to the coming SCM64 code.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
2016-06-24 13:34:00 -05:00
Andy Gross d0f6fa7ba2 firmware: qcom: scm: Convert SCM to platform driver
This patch converts the Qualcomm SCM firmware driver into a platform
driver.  It also adds clock management for firmware calls which require
clocks to be enabled during the duration of their execution.  Rate
setting of the core clock is also in place for higher performance.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
2016-06-24 13:33:59 -05:00
jilai wang 9626b6993b firmware: qcom: scm: Add HDCP Support
HDCP driver needs to check if secure environment supports HDCP.  If it's
supported, then it requires to program some registers through SCM.
Add qcom_scm_hdcp_available and qcom_scm_hdcp_req to support these
requirements.

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-05-28 10:47:45 -05:00
Kumar Gala b6a1dfbc7d firmware: qcom: scm: Split out 32-bit specific SCM code
Split out the 32-bit SCM implementation into its own file to prep for
supporting a 64-bit/ARM64 implementation as well.  We create a simple shim
to ensure both versions conform to the same interface.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-04-28 14:20:40 -05:00
Lina Iyer 767b0235dd firmware: qcom: scm: Support cpu power down through SCM
Support powering down the calling cpu, by trapping into SCM. This
termination function triggers the ARM cpu to execute WFI instruction,
causing the power controller to safely power the cpu down.

Caches may be flushed before powering down the cpu. If cache controller
is set to turn off when the cpu is powered down, then the flags argument
indicates to the secure mode to flush its cache lines before executing
WFI.The warm boot reset address for the cpu should be set before the
calling into this function for the cpu to resume.

The original code for the qcom_scm_call_atomic1() comes from a patch by
Stephen Boyd [1]. The function scm_call_atomic1() has been cherry picked
and renamed to match the convention used in this file. Since there are
no users of scm_call_atomic2(), the function is not included.

[1]. https://lkml.org/lkml/2014/8/4/765

Signed-off-by: Stephen Boyd <sboyd@codeauraro.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11 15:15:11 -05:00
Lina Iyer 2ce76a6ad3 firmware: qcom: scm: Add qcom_scm_set_warm_boot_addr function
A core can be powered down for cpuidle or when it is hotplugged off. In
either case, the warmboot return address would be different. Allow
setting the warmboot address for a specific cpu, optimize and write to
the firmware, if the address is different than the previously set
address.

Export qcom_scm_set_warm_boot_addr function move the warm boot flags to
implementation.

Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11 15:15:07 -05:00
Lina Iyer a353e4a06f firmware: qcom: scm: Clean cold boot entry to export only the API
We dont need to export the SCM specific cold boot flags to the platform
code. Export only a function to set the cold boot address.

Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11 15:15:05 -05:00
Kumar Gala 916f743da3 firmware: qcom: scm: Move the scm driver to drivers/firmware
Architectural changes in the ARM Linux kernel tree mandate the eventual
removal of the mach-* directories. Move the scm driver to
drivers/firmware and the scm header to include/linux to support that
removal.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11 15:06:38 -05:00