Commit Graph

4 Commits

Author SHA1 Message Date
Sebastien Requiem c499546f43 [ARM] MV78xx0: Support for Buffalo WXL (Terastation Duo)
* Modification of Kconfig to add the Option
* 1 new file : buffalo-wxl-setup.c
This file is inspired from the db-78xx0-setup.c already present.
The following is done:
  - Configure MPP Lines for the plateform (see my patch for MPP)
This is taken from the stock kernel provided by buffalotech (the vendor)
  - GigaBit Ethernet
  - Sata
  - Uart are initiallized in a different way than on the dev board as we
have one core only.
  - USB

The kernel has been running for some days now on my plateform.

Signed-off-by: Sebastien Requiem <sebastien@kolios.dk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-02-23 17:10:08 -05:00
Sebastien Requiem ee40ceab23 [ARM] MV78XX0: MPP routines and definitions
This patch is composed of two new files :

- mpp.c which is mainly inspired by the same file as in mach-kirkwood

- mpp.h that is written from the documentation provided by Marvell
http://www.marvell.com/products/processors/embedded/discovery_innovation/HW_MV78100_OpenSource.pdf

Moreover, due to some implementation problem, I have
defined some MPPX_UNUSED that offer developers the possibility
to SET MPP to some unused value (such as for Buffalo WXL).

Note: This patch doesn't support MV78200 yet (only 78100 MPP lines have
been written)

Signed-off-by: Sebastien Requiem <sebastien@kolios.dk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-02-23 16:44:01 -05:00
Lennert Buytenhek 569106c70e [ARM] mv78xx0: Add Marvell RD-78x00-mASA Reference Design support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:21:25 -04:00
Stanislav Samsonov 794d15b25d [ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:10 +02:00