Commit Graph

31 Commits

Author SHA1 Message Date
Olof Johansson b3ebd1d862 [POWERPC] powerpc: PA6T cputable entry, PVR value
Introduce PWRficient PA6T cputable entries and feature bits.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-13 18:39:52 +10:00
Olof Johansson 0024300000 [POWERPC] powerpc: Divorce CPU_FTR_CTRL from CPU_FTR_PPCAS_ARCH_V2_BASE
The performance monitor implementation (including CTRL register behaviour)
is just included in PPC v2 as an example, it's not truly part of the base.

It's actually a somewhat misleading feature, but I'll leave that be for
now: The presence of the register is not what the feature bit is used
for, but instead it's used to determine if it contains the runlatch
bit for idle reporting of the performance monitor. For alternative
implementations, the register might still exist but the bit might have
different meaning (or no meaning at all).

For now, split it off and don't include it in CPU_FTR_PPCAS_ARCH_V2_BASE.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-13 18:39:52 +10:00
Olof Johansson f39b7a55a8 [POWERPC] Cleanup CPU inits
Cleanup CPU inits a bit more, Geoff Levand already did some earlier.

* Move CPU state save to cpu_setup, since cpu_setup is only ever done
  on cpu 0 on 64-bit and save is never done more than once.
* Rename __restore_cpu_setup to __restore_cpu_ppc970 and add
  function pointers to the cputable to use instead. Powermac always
  has 970 so no need to check there.
* Rename __970_cpu_preinit to __cpu_preinit_ppc970 and check PVR before
  calling it instead of in it, it's too early to use cputable.
* Rename pSeries_secondary_smp_init to generic_secondary_smp_init since
  everyone but powermac and iSeries use it.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-08-25 13:27:35 +10:00
Paul Mackerras 3965f8c597 [POWERPC] Simplify the code defining the 64-bit CPU features
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-28 15:19:03 +10:00
Linus Torvalds 45c091bb2d Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits)
  [POWERPC] re-enable OProfile for iSeries, using timer interrupt
  [POWERPC] support ibm,extended-*-frequency properties
  [POWERPC] Extra sanity check in EEH code
  [POWERPC] Dont look for class-code in pci children
  [POWERPC] Fix mdelay badness on shared processor partitions
  [POWERPC] disable floating point exceptions for init
  [POWERPC] Unify ppc syscall tables
  [POWERPC] mpic: add support for serial mode interrupts
  [POWERPC] pseries: Print PCI slot location code on failure
  [POWERPC] spufs: one more fix for 64k pages
  [POWERPC] spufs: fail spu_create with invalid flags
  [POWERPC] spufs: clear class2 interrupt status before wakeup
  [POWERPC] spufs: fix Makefile for "make clean"
  [POWERPC] spufs: remove stop_code from struct spu
  [POWERPC] spufs: fix spu irq affinity setting
  [POWERPC] spufs: further abstract priv1 register access
  [POWERPC] spufs: split the Cell BE support into generic and platform dependant parts
  [POWERPC] spufs: dont try to access SPE channel 1 count
  [POWERPC] spufs: use kzalloc in create_spu
  [POWERPC] spufs: fix initial state of wbox file
  ...

Manually resolved conflicts in:
	drivers/net/phy/Makefile
	include/asm-powerpc/spu.h
2006-06-22 22:11:30 -07:00
Arnd Bergmann ce221982e0 [PATCH] powerpc: enable CPU_FTR_CI_LARGE_PAGE for cell
Reflect the fact that the Cell Broadband Engine supports 64k
pages by adding the bit to the CPU features.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-17 10:56:24 -07:00
Anton Blanchard 227318bbde [POWERPC] Remove stale 64bit on 32bit kernel code
Remove some stale POWER3/POWER4/970 on 32bit kernel support.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-15 19:31:26 +10:00
Paul Mackerras fab5db97e4 [PATCH] powerpc: Implement support for setting little-endian mode via prctl
This adds the PowerPC part of the code to allow processes to change
their endian mode via prctl.

This also extends the alignment exception handler to be able to fix up
alignment exceptions that occur in little-endian mode, both for
"PowerPC" little-endian and true little-endian.

We always enter signal handlers in big-endian mode -- the support for
little-endian mode does not amount to the creation of a little-endian
user/kernel ABI.  If the signal handler returns, the endian mode is
restored to what it was when the signal was delivered.

We have two new kernel CPU feature bits, one for PPC little-endian and
one for true little-endian.  Most of the classic 32-bit processors
support PPC little-endian, and this is reflected in the CPU feature
table.  There are two corresponding feature bits reported to userland
in the AT_HWCAP aux vector entry.

This is based on an earlier patch by Anton Blanchard.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-09 21:24:15 +10:00
Michael Neuling e78dbc800c [PATCH] powerpc: oprofile support for POWER6
POWER6 moves some of the MMCRA bits and also requires some bits to be
cleared each PMU interrupt.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Acked-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-09 21:24:05 +10:00
Anton Blanchard 03054d51a7 [PATCH] powerpc: Add cputable entry for POWER6
Add a cputable entry for the POWER6 processor.

The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable
support for that until oprofile is fixed.

Also tell firmware that we know about POWER6.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-04-29 10:56:58 +10:00
Stephen Rothwell 7c92943c7b [PATCH] powerpc: work around sparse warnings in cputable.h
Christoph noticed that sparse warned about all the enum tags in cuptable.h
that had values that required them to be type log. (enum tags are ints
according to the standard.)

This patch attempts to fix them in the least intrusive way possible by
turning them all into #defines except for the 32 bit CPU_FTRS_POSSIBLE and
CPU_FTRS_ALWAYS which are hard to construct that way.  This works because
these last two contain no bits above 2^31.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-27 14:48:06 +11:00
Michael Ellerman 3d15910bfb [PATCH] powerpc: trivial: Cleanup whitespace in cputable.h
Remove redundant whitespace in include/asm-powerpc/cputable.h

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-22 15:04:15 +11:00
Paul Mackerras 5164501794 Merge ../linux-2.6 2006-03-09 14:32:05 +11:00
Benjamin Herrenschmidt aa5cb02143 [PATCH] powerpc: Expose SMT and L1 icache snoop userland features
This patch makes userland aware of the icache snoop capability of the
POWER5 (and possibly others in the future) and of SMT capabilities.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-03 22:00:23 +11:00
Paul Mackerras c6622f63db powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels.  Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode.  We
also count the time spent processing hardware and software interrupts
accurately.  This is conditional on CONFIG_VIRT_CPU_ACCOUNTING.  If
that is not set, we do tick-based approximate accounting as before.

To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on

* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
  context in kernel mode
* context switches.

On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time).  Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.

This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.

This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc.  Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace.  Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 14:05:56 +11:00
Kumar Gala 1775dbbcd0 [PATCH] powerpc: Enable coherency for all pages on 83xx to fix PCI data corruption
On the 83xx platform to ensure the PCI inbound memory is handled properly we
have to turn on coherency for all pages in the MMU.  Otherwise we see
corruption if inbound "prefetching/streaming" is enabled on the PCI controller.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 11:36:25 +11:00
Andy Whitcroft 7a45fb19ce [PATCH] powerpc: oprofile cpu type names clash with other code
In 2.6.15-git6 a change was commited in the oprofile support in
the powerpc architecture.  It introduced the powerpc_oprofile_type
which contains the define G4.  This causes a name clash with the
existing wacom usb tablet driver.

      CC [M]  drivers/usb/input/wacom.o
    drivers/usb/input/wacom.c:98: error: conflicting types for `G4'
    include/asm/cputable.h:37: error: previous declaration of `G4'
      CC [M]  drivers/usb/mon/mon_text.o
    make[3]: *** [drivers/usb/input/wacom.o] Error 1
    make[2]: *** [drivers/usb/input] Error 2

The elements of an enum declared in global scope are effectivly
global identifiers themselves.  As such we need to ensure the names
are unique.  This patch updates the later oprofile support to use
unique names.

Signed-off-by: Andy Whitcroft <apw@shadowen.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-14 11:12:16 +11:00
Paul Mackerras 80f15dc703 powerpc: Provide a suitable AT_PLATFORM value
The glibc folks want to use AT_PLATFORM to select between possible
alternative versions of shared libraries.  This commit makes the kernel
supply an AT_PLATFORM string that indicates what class of processor
we are running on.  Processors with the same set of user-level
instructions and roughly the same instruction scheduling characteristics
are given the same AT_PLATFORM value; for example, 821, 823 and 860
are all reported as "ppc823", and 7447, 7447A, 7448, 7450, 7451, 7455
are all called "ppc7450".

The intention is that the AT_PLATFORM values match the values that
gcc accepts for the -mcpu= option.  For values which are numeric
(e.g. -mcpu=750), "ppc" has been prepended.

This also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value and sets
it for the 440 family and the Freescale 85xx family.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-14 10:11:39 +11:00
Anton Blanchard 32a33994d5 [PATCH] ppc64: Fix oprofile when compiled as a module
My recent changes to oprofile broke it when built as a module. Fix it by
using an enum instead of a function pointer. This way we still retain
the oprofile configuration in the cputable.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 16:02:52 +11:00
Arnd Bergmann c902be71dc [PATCH] cell: enable pause(0) in cpu_idle
This patch enables support for pause(0) power management state
for the Cell Broadband Processor, which is import for power efficient
operation. The pervasive infrastructure will in the future enable
us to introduce more functionality specific to the Cell's
pervasive unit.

From: Maximino Aguilar <maguilar@us.ibm.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 15:44:32 +11:00
Arnd Bergmann 88ced03149 [PATCH] powerpc: sanitize header files for user space includes
include/asm-ppc/ had #ifdef __KERNEL__ in all header files that
are not meant for use by user space, include/asm-powerpc does
not have this yet.

This patch gets us a lot closer there. There are a few cases
where I was not sure, so I left them out. I have verified
that no CONFIG_* symbols are used outside of __KERNEL__
any more and that there are no obvious compile errors when
including any of the headers in user space libraries.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 15:13:08 +11:00
Anton Blanchard 2406f6063a [PATCH] powerpc: Dont set 32bit cputable bits on 64bit
Milton and I were looking at the cputable code and it looks like we can
set spurious bits on 64bit.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 14:53:41 +11:00
Benjamin Herrenschmidt 5daf9071b5 [PATCH] powerpc: merge align.c
This patch merges align.c, the result isn't quite what was in ppc64 nor
what was in ppc32 :) It should implement all the functionalities of both
though. Kumar, since you played with that in the past, I suppose you
have some test cases for verifying that it works properly before I dig
out the 601 machine ? :)

Since it's likely that I won't be able to test all scenario, code
inspection is much welcome.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-18 14:39:23 +11:00
Paul Mackerras a7ddc5e853 powerpc: Add user CPU features for POWER4, POWER5, POWER5+ and Cell.
This is at the request of the glibc folks, who want to use these bits
to select libraries optimized for the microarchitecture and new
instructions in these processors.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 14:29:18 +11:00
David Gibson 3ddfbcf19b [PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs.  A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros.  It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files.  Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.

ppc_asm.h is now for use in .S files *only*, and a #error enforces
that.  As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.

While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.

Built and booted on pSeries, Maple and iSeries (ARCH=powerpc).  Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 13:10:38 +11:00
Benjamin Herrenschmidt 3c726f8dee [PATCH] ppc64: support 64k pages
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
base page size to 64K.  The resulting kernel still boots on any
hardware.  On current machines with 4K pages support only, the kernel
will maintain 16 "subpages" for each 64K page transparently.

Note that while real 64K capable HW has been tested, the current patch
will not enable it yet as such hardware is not released yet, and I'm
still verifying with the firmware architects the proper to get the
information from the newer hypervisors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-06 16:56:47 -08:00
Paul Mackerras 985990137e Merge changes from linux-2.6 by hand 2005-10-22 16:51:34 +10:00
Stephen Rothwell 4920960f57 powerpc: consolidate cputable.c
Also simplify arch/ppc64/kernel/Makefile

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-10-13 09:49:45 +10:00
Paul Mackerras 9b6b563c0d powerpc: Merge in the ppc64 version of the prom code.
This brings in the ppc64 version of prom_init.c, prom.c and btext.c
and makes them work for ppc32.  This also brings in the new calling
convention, where the first entry to the kernel (with r5 != 0) goes
to the prom_init code, which then restarts from the beginning (with
r5 == 0) after it has done its stuff.

For now this also brings in the ppc32 version of setup.c.  It also
merges lmb.h.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-06 12:06:20 +10:00
Kumar Gala 400d221274 [PATCH] ppc32: make cur_cpu_spec a single pointer instead of an array
Changed ppc32 so that cur_cpu_spec is just a single pointer for all CPUs.
Additionally, made call_setup_cpu check to see if the cpu_setup pointer
is NULL or not before calling the function.  This lets remove the dummy
cpu_setup calls that just return.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-28 15:42:54 +10:00
Kumar Gala 10b35d9978 [PATCH] powerpc: merged asm/cputable.h
Merged cputable.h between ppc32 and ppc64.  In doing this removed support
for the BEGIN_FTR_SECTION/END_FTR_SECTION macros in C code since they
dont compile correctly.  C code should use cpu_has_feature().  This is
based on Arnd Bergmann's initial patch.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-28 15:42:53 +10:00