Commit Graph

71 Commits

Author SHA1 Message Date
Ralf Baechle 8bfc245f9a Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next 2013-02-21 12:51:33 +01:00
Steven J. Hill f8fa4811db MIPS: Add support for the M14KEc core.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle 241738bd51 Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next 2012-12-13 19:40:13 +01:00
Ralf Baechle bdf20507da MIPS: PMC-Sierra Yosemite: Remove support.
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-13 18:15:30 +01:00
Madhusudan Bhat c783390a0e MIPS: oprofile: Support for XLR/XLS processors
Add support for XLR and XLS processors in MIPS Oprofile code. These
processors are multi-threaded and have two counters per core. Each
counter can track either all the events in the core (global mode),
or events in just one thread.

We use the counters in the global mode, and use only the first thread
in each core to handle the configuration etc.

Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4471
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Ralf Baechle 68d8848567 Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', 'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next 2012-07-25 16:37:46 +02:00
Kelvin Cheung 2fa36399e6 MIPS: Add CPU support for Loongson1B
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
(ICT) and the Chinese Academy of Sciences (CAS), which implements the
MIPS32 release 2 instruction set.

[ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
which also is why it identifies itself with the Legacy Vendor ID in the
PrID register.  When applying the patch I shoveled some code around to
keep things in alphabetical order and avoid forward declarations.]

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: To: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3976/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:57:04 +01:00
Steven J. Hill 2244f12865 MIPS: Remove dead code related to 1004K oprofile support.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3854/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:16 +01:00
Steven J. Hill 113c62d984 MIPS: Add support for the M14Kc core.
[ralf@linux-mips.org: Fixed whitespace damage.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3773/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06 23:56:00 +02:00
Ralf Baechle c819baf31f Merge branches 'fixes-for-linus', 'generic', 'cavium', 'module.h-fixes', 'next/ath79' and 'next/lantiq' into mips-for-linux-next 2012-05-26 19:55:48 +01:00
Ralf Baechle 39faa24688 MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-21 15:09:36 +01:00
Felix Fietkau 3572a2c37f MIPS: make oprofile use cp0_perfcount_irq if it is set
Make the oprofile code use the performance counters irq.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3723/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:19 +02:00
Daniel Kalmar 5f307491f3 MIPS: oprofile: Add callgraph support
Stack unwinding is done by code examination. For kernelspace, the
already existing unwind function is utilized that uses kallsyms to
quickly find the beginning of functions. For userspace a new function
was added that examines code at and before the pc.

Signed-off-by: Daniel Kalmar <kalmard@homejinni.com>
Signed-off-by: Gergely Kis <gergely@homejinni.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
2011-06-15 14:35:34 +02:00
matt mooney e3726304a2 mips: change to new flag variable
Replace EXTRA_CFLAGS with ccflags-y.

Signed-off-by: matt mooney <mfm@muteddisk.com>
Acked-by: WANG Cong <xiyou.wangcong@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
2011-03-17 14:02:56 +01:00
Wu Zhangjin 1d84267480 MIPS: Oprofile: Fixup of loongson2_exit()
When exiting from loongson2_exit(), we need to reset the counter
register too, this patch adds a function reset_counters() to do it, by
the way, this function will be shared by Perf.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1199/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:31 +01:00
Wu Zhangjin 893556e602 MIPS: Oprofile: Loongson: Cleanup the comments
Removes some out-of-date comments and empty lines.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1204/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:19 +01:00
Wu Zhangjin 852151bdb9 MIPS: Oprofile: Loongson: Cleanup of the macros
The _EXL, _KERNEL etc. bits are in the performance control register so
use _PERFCTRL prefix instead of _PERFCNT.  While at it make the macro
more readable, use _ENABLE instead of _INT_EN suffix to describe the
interrupt enable bit.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1203/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:19 +01:00
Wu Zhangjin 6d8c2873e0 MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1202/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:19 +01:00
Wu Zhangjin c838abc511 MIPS: Oprofile: Loongson: Remove useless parentheses
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1201/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:18 +01:00
Wu Zhangjin 86e5a52021 MIPS: Oprofile: Loongson: Unify macro for setting events
Unified macro for counter0 and counter1 to set the event in the control
register.  This will be needed by Perf.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1200/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:18 +01:00
Wu Zhangjin 4e73238d16 MIPS: Oprofile: Fix Loongson irq handler
The interrupt enable bit for the performance counters is in the Control
    Register $24, not in the counter register.
    loongson2_perfcount_handler(), we need to use
    
    Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn>
    Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1198/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2010-05-15 21:59:54 +01:00
Ralf Baechle f1d39e6ed7 MIPS: Loongson: Remove pointless sample_lock from oprofile code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:39 +01:00
Ralf Baechle 4a8a738de6 MIPS: Make various locks static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:30 +01:00
Wu Zhangjin e52dd9fc6b MIPS: Simplify the weak annotation with __weak
Found by

$ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak

[Ralf: Made this bulletproof by including <linux/compiler.h>]

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:17 +01:00
Wu Zhangjin f7a904dffe MIPS: Loongson: Change the Email address of Wu Zhangjin
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/829/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:12 +01:00
Wu Zhangjin 937893cf5b MIPS: oprofile: Only do performance counter handling for counter interrupts
In Loongson2f IP6 is shared by bonito and perfcounters so we need to avoid
do_IRQ for perfcounter when the interrupt is from bonito.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:10 +00:00
Wu Zhangjin 55f4e1d4fe MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
Unify the naming method between kernel and the user-space oprofile tool.
Because loongson is used instead of godson in most of the places, we agreed
to use loongson instead, which will simplify future maintenance.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Uwe Kleine-König 8813d33ee0 MIPS: Loongson2: Fix typo "enalbe" -> "enable"
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Yanhua <yanh@lemote.com>
Cc: Robert Richter <robert.richter@amd.com>
Acked-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-30 21:46:59 +02:00
Wu Zhangjin 67b35e5d01 MIPS: Loongson: Add oprofile support
This kernel support is needed by the user-space tool:oprofile to profile
linux kernel or applications via loongson2 performance counters. you can
enable this driver via CONFIG_OPROFILE = y or m.

On Loongson2 there are two performance counters, each one can count 16
events respectively. when anyone of the performance counter overflows, an
interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6.

Signed-off-by: Yanhua <yanh@lemote.com>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Robert Richter 25ad2913ca oprofile: more whitespace fixes
Signed-off-by: Robert Richter <robert.richter@amd.com>
2008-10-15 20:55:51 +02:00
Ingo Molnar f6f88e9bfb generic-ipi: more merge fallout
fix more API change fallout in recently merged upstream changes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-15 22:08:52 +02:00
Jens Axboe 15c8b6c1aa on_each_cpu(): kill unused 'retry' parameter
It's not even passed on to smp_call_function() anymore, since that
was removed. So kill it.

Acked-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-06-26 11:24:38 +02:00
Thiemo Seufer 005ca9a3f1 [MIPS] Fix build failure in mips oprofile code
This patch fixes a warning-as-error induced build failure of 64bit MIPS
kernels.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-05-12 16:46:56 +01:00
Dmitri Vorobiev 46684734dd [MIPS] unexport null_perf_irq() and make it static
This patch unexports the null_perf_irq() symbol, and simultaneously
makes this function static.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:31 +01:00
Ralf Baechle 39b8d52542 [MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:26 +01:00
Ralf Baechle 39a51109dd [MIPS] Extend performance counter event field.
The latest draft version of the MIPS Architecture Specification extends the
6 bit event field by adding a directly adjacent 4-bit EventExt field for a
total of 10 bits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Ralf Baechle 5e2862eb5a [MIPS] Oprofile: Fix computation of number of counters.
VSMP kernels will split the available performance counters between the two
processors / cores.  But don't do this when we're not on a VSMP system ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06 17:15:58 +00:00
Mathieu Desnoyers 09cadedbdc Combine instrumentation menus in kernel/Kconfig.instrumentation
Quoting Randy:

"It seems sad that this patch sources Kconfig.marker, a 7-line file,
20-something times.  Yes, you (we) don't want to put those 7 lines into
20-something different files, so sourcing is the right thing.

However, what you did for avr32 seems more on the right track to me: make
_one_ Instrumentation support menu that includes PROFILING, OPROFILE, KPROBES,
and MARKERS and then use (source) that in all of the arches."

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19 11:53:54 -07:00
Ralf Baechle 49a89efbbb [MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle 10cc352907 [MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Dajie Tan c8f4ff9f3f [MIPS] Oprofile: Fix rm9000 performance counter handler
The new type of irq handler remove a parameter (struct pt_regs *),but
someone forgot to supply it.

Signed-off-by: Dajie Tan <jiankemeng@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:33 +01:00
Chris Dearman ffe9ee4709 [MIPS] Separate performance counter interrupts
Support for performance counter overflow interrupt that is on a separate
interrupt from the timer.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:15 +01:00
Ralf Baechle 6f4c5bdef2 [MIPS] Fix oprofile logic to physical counter remapping
This did cause oprofile to fail on non-multithreaded systems with more
than 2 processors such as the BCM1480.

Reported by Manish Lachwani (mlachwani@mvista.com).

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-24 22:10:18 +01:00
Chris Dearman 795a22583b [MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configs
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-13 16:59:31 +00:00
Ralf Baechle 148171b2ac [MIPS] Oprofile: Add missing break statements.
This was causing oprofile to fail on R10000, R12000, R14000.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04 19:02:34 +00:00
Ralf Baechle a9b69d0c0c [MIPS] Fix Kconfig typo bug
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-20 17:11:55 +00:00
Ralf Baechle 06396094b2 [MIPS] Do not allow oprofile to be enabled on SMTC.
Oprofile cannot work on SMTC due to the limited number of counters.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:17 +00:00
Ralf Baechle 714cfe7865 [MIPS] Oprofile: kernel support for the R10000.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:45 +00:00
Ralf Baechle ea3df4ac7d [MIPS] Oprofile: Fix MIPSxx counter number detection.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30 21:41:27 +00:00