Commit Graph

18 Commits

Author SHA1 Message Date
Masahiro Yamada 9697509e3f pinctrl: uniphier: add suspend / resume support
Save registers lost in the sleep when suspending, and restore them
when resuming.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-14 15:01:00 +02:00
Masahiro Yamada 7f6ee0a579 pinctrl: uniphier: clean up GPIO port muxing
There are a bunch of GPIO muxing data, but most of them are actually
unneeded because GPIO-to-pin mapping can be specified by "gpio-ranges"
DT properties.

Tables that contain a set of GPIO pins are still needed for the named
mapping by "gpio-ranges-group-names".  This is a much cleaner way for
UniPhier SoC family where GPIO numbers are not straight mapped to pin
numbers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-14 15:01:00 +02:00
Masahiro Yamada 2afd450d78 pinctrl: uniphier: make drivers non-modular
At first these drivers were written as tristate, but the module
usecases are actually not tested.  Make all of them boolean.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:09:51 +01:00
Masahiro Yamada 8ef364b3ce pinctrl: uniphier: remove obsoleted compatibles
Since commit 3e030b0b4e ("pinctrl: uniphier: allow to have pinctrl
node under syscon node"), this driver has kept compatibility for the
old DT files.  Several releases have passed since then, so remove
the obsoleted compatibles and clean up the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:09:43 +01:00
Masahiro Yamada 1e359ab128 pinctrl: uniphier: add Ethernet pin-mux settings
Add the following Ethernet interfaces:

  PH1-LD4: MII, RMII
  PH1-Pro4: MII, RMII, RGMII
  PH1-sLD8: MII, RMII (Built-in PHY is also supported)
  ProXstream2: MII, RMII, RGMII
  PH1-LD6b: RMII, RGMII
  PH1-LD11: RMII (Built-in PHY is also supported)
  PH1-LD20: RMII, RGMII

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-11 09:53:25 +02:00
Masahiro Yamada 3e030b0b4e pinctrl: uniphier: allow to have pinctrl node under syscon node
Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node.

To allow to migrate to the new DT structure, this commit adds new
compatible strings to not disturb the existing DT.  After a while,
the old binding will be removed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:54:14 +02:00
Masahiro Yamada a2456a77ab pinctrl: uniphier: add System Bus pin-mux settings
This is needed to get access to UniPhier System Bus (external bus).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:53:06 +02:00
Masahiro Yamada 1e359ebe33 pinctrl: uniphier: add dedicated pins to pin tables of PH1-LD4/sLD8
These pins do not support pin-muxing, but it is useful to support
pin configuration for them.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:52:09 +02:00
Masahiro Yamada 39ec9ace7a pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.

Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function.  The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:50:47 +02:00
Masahiro Yamada c2ebf4754b pinctrl: uniphier: introduce capability flag
The core part of the UniPhier pinctrl driver needs to support a new
capability for upcoming UniPhier ARMv8 SoCs.  This sometimes happens
because pinctrl drivers include really SoC-specific stuff.

This commit intends to tidy up SoC-specific parameters of the existing
drivers before adding the new one.  Having just one flag would be
better than adding a new struct member every time a new SoC-specific
capability comes up.

At this time, there is one flag, UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE.
This capability (I'd say rather quirk) was added for PH1-Pro4 and
PH1-Pro5 as requirement from a customer.  For those SoCs, one pin-mux
setting is controlled by the combination of two separate registers; the
LSB bits at register offset (8 * N) and the MSB bits at (8 * N + 4).
Because it is impossible to update two separate registers atomically,
the LOAD_PINCTRL register should be set in order to make the pin-mux
settings really effective.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:48:28 +02:00
Masahiro Yamada 9eaa98a63c pinctrl: uniphier: rename macros for drive strength control
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control.  Some of the configuration registers on it have
3-bit width.

The feature will be supported in the next commit, but a problem is
that macro names are getting longer and longer in the current naming
scheme.

Before moving forward, this commit renames macros as follows:

  UNIPHIER_PIN_DRV_4_8        -> UNIPHIER_PIN_DRV_1BIT
  UNIPHIER_PIN_DRV_8_12_16_20 -> UNIPHIER_PIN_DRV_2BIT
  UNIPHIER_PIN_DRV_FIXED_4    -> UNIPHIER_PIN_DRV_FIXED4
  UNIPHIER_PIN_DRV_FIXED_5    -> UNIPHIER_PIN_DRV_FIXED5
  UNIPHIER_PIN_DRV_FIXED_8    -> UNIPHIER_PIN_DRV_FIXED8

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:42:04 +02:00
Masahiro Yamada fc78a56631 pinctrl: uniphier: allocate struct pinctrl_desc in probe function
Currently, every SoC driver defines struct pinctrl_desc statically,
i.e. it consumes memory footprint even if it is not probed.

In multi-platform, many pinctrl drivers are linked (generally as
built-in objects), although only one of them is actually used.
So, it is reasonable to allocate memory dynamically where possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:40:38 +02:00
Masahiro Yamada 4109508a85 pinctrl: uniphier: set pinctrl_desc name in common probe function
Every SoC driver sets the same name for struct pinctrl_desc and
platform_driver.  The common probe function can set desc->name
instead of duplicating strings in each SoC driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:39:31 +02:00
Masahiro Yamada 7d36b2451a pinctrl: uniphier: set pinctrl_desc owner in common probe function
The owner of the struct pinctrl_desc matches that of platform_driver.
Set it in the common probe function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:38:30 +02:00
Masahiro Yamada 4725774f59 pinctrl: uniphier: fix register offsets for drive strength control
These pin tables were generated by parsing hardware documents with
a script, but the script had a bug.  Fix the register offsets.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:37:34 +02:00
Masahiro Yamada a4c6052bc1 pinctrl: uniphier: rename function and variable names
Make function/variable names match the file names for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:36:12 +02:00
Laxman Dewangan 1ac471edd9 pinctrl: uniphier: Use devm_pinctrl_register() for pinctrl registration
Use devm_pinctrl_register() for pin control registration and remove
need of .remove callback.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-21 00:03:35 +02:00
Masahiro Yamada 1233a1fbb0 pinctrl: uniphier: rename CONFIG options and file names
The current "CONFIG_PINCTRL_UNIPHIER_PH1_*" is too long.  It would
not hurt to drop "PH1_" because "UNIPHIER_" already well specifies
the SoC family.  Also, rename files for consistency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09 10:39:30 +07:00