Commit Graph

7 Commits

Author SHA1 Message Date
Lars-Peter Clausen 43bcad2bb4 devicetree: Add bindings documentation for Analog Devices AXI-DMAC
Add the devicetree descriptor for the Analog Devices AXI-DMAC DMA
controller. This is a soft peripheral used in FPGAs and the bindings
describe how it is connected to the system (clock, interrupt, memory map)
as well as the configuration options that were used when the peripheral was
instantiated.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-23 18:55:10 +05:30
Alex Smith d3597236fd dmaengine: jz4780: Remove request type number definitions header
The header just includes definitions of hardware-specific numbers which
can be written directly in the device tree, there's no need for a public
header containing these definitions.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith d894fc6046 dmaengine: jz4780: add driver for the Ingenic JZ4780 DMA controller
This patch adds a driver for the DMA controller found in the Ingenic
JZ4780.

It currently does not implement any support for the programmable firmware
feature of the controller - this is not necessary for most uses. It also
does not take priority into account when allocating channels, it just
allocates the first available channel. This can be implemented later.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
[Updated for dmaengine api changes, Add residue support, couple of minor fixes]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-04-01 08:43:49 +05:30
Maxime Ripard 1f9f6a7873 ARM: sunxi: DT: Convert the DTs to use a header for the DMA arguments
The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.

Add a dt-bindings header, and convert the device trees to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:56 +01:00
Ludovic Desroches e1f7c9eee7 dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver
New atmel DMA controller known as XDMAC, introduced with SAMA5D4
devices.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06 11:00:08 +05:30
Guennadi Liakhovetski 94c7b6fc7c dmaengine: add device tree binding documentation for the nbpfaxi driver
The nbpfaxi dmaengine driver doesn't define any new bindings, it only
uses standard dmaengine bindings and defines 3 flags for the 3rd parameter
of the "dmas" property.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-08-04 13:27:35 +05:30
Ludovic Desroches ca79522c3f ARM: at91: dt: add header to define at_hdmac configuration
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.

The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-06-15 00:12:30 +02:00