Commit Graph

14 Commits

Author SHA1 Message Date
Linus Torvalds 5c73cc4b6c ARM: DT updates for v4.1
As always, this tends to be one of our bigger branches. There are lots of
 updates this release, but not that many jumps out as something that needs
 more detailed coverage. Some of the highlights are:
 
 - DTs for the new Annapurna Labs Alpine platform
 - More graphics DT pieces falling into place on Exynos, bridges, clocks.
 - Plenty of DT updates for Qualcomm platforms for various IP blocks
 - Some churn on Tegra due to switch-over to tool-generated pinctrl data
 - Misc fixes and updates for Atmel at91 platforms
 - Various DT updates to add IP block support on Broadcom's Cygnus platforms
 - More updates for Renesas platforms as DT support is added for various IP
   blocks (IPMMU, display, audio, etc).
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As always, this tends to be one of our bigger branches.  There are
  lots of updates this release, but not that many jumps out as something
  that needs more detailed coverage.  Some of the highlights are:

   - DTs for the new Annapurna Labs Alpine platform

   - more graphics DT pieces falling into place on Exynos, bridges,
     clocks.

   - plenty of DT updates for Qualcomm platforms for various IP blocks

   - some churn on Tegra due to switch-over to tool-generated pinctrl
     data

   - misc fixes and updates for Atmel at91 platforms

   - various DT updates to add IP block support on Broadcom's Cygnus
     platforms

   - more updates for Renesas platforms as DT support is added for
     various IP blocks (IPMMU, display, audio, etc)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
  ARM: dts: alpine: add internal pci
  Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
  ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
  ARM: dts: qcom: Add idle state device nodes for 8064
  ARM: dts: qcom: Add idle states device nodes for 8084
  ARM: dts: qcom: Add idle states device nodes for 8974/8074
  ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
  devicetree: bindings: Document qcom,idle-states
  devicetree: bindings: Update qcom,saw2 node bindings
  dt-bindings: Add #defines for MSM8916 clocks and resets
  arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
  arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
  arm: dts: qcom: Add LCC nodes
  arm: dts: qcom: Add TCSR support for MSM8960
  arm: dts: qcom: Add TCSR support for MSM8660
  arm: dts: qcom: Add TCSR support for IPQ8064
  ...
2015-04-22 09:09:46 -07:00
Gaku Inami a8caad6690 ARM: shmobile: Consolidate the pm code for R-Car Gen2
The pm code for R-Car Gen2 is scatterd in each SoC. These files
(pm-r8a7790.c/pm-r8a7791.c) have some overlap code. This change
consolidate the pm code for R-Car Gen2 into one.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-03-17 08:05:13 +09:00
Wolfram Sang 98f60f8600 ARM: shmobile: r8a7791: smp: remap whole apmu region
Documentation says the last register is at 0x184 (CAxCPUCMCR), so use
proper length. Current APMU code accesses CAxCPUnCR which is currently
outside of the remapped area.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:51 +09:00
Hisashi Nakamura 7466c52e17 ARM: shmobile: r8a7791: Correct number of CPU cores
The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4  CA7 cores.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-04 09:31:27 +09:00
Hisashi Nakamura a8d2ff39c7 ARM: shmobile: Separate APMU resource data into CPU dependant part
APMU resources are not common to all R-Car SoCs so don't share this data.
A subsequent patch will correct the CPU cores for the r8a7791.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-04 09:31:23 +09:00
Magnus Damm bfe4cfa8ae ARM: shmobile: Allow r8a7791 to build non-SMP APMU code
Build the APMU for r8a7791 even though SMP is
disabled in the kernel config. Also initialize
Suspend-to-RAM from pm-r8a7791.c to in the future
cover both UP and SMP use cases of the APMU.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-26 16:01:34 +09:00
Magnus Damm 8e26118d44 ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c
Move r8a7791 specific reset vector setup code from the
SMP glue code to PM code. This makes the code one step
closer to allow PM operations such as Suspend-to-RAM
in the case when SMP is disabled in the kernel config.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[horms+renesas@verge.net.au: updated for recent header file changes]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-26 16:01:27 +09:00
Geert Uytterhoeven 5201b5a792 ARM: shmobile: Move r8a7791.h
Change location of r8a7791.h so it can be included as "r8a7791.h"
instead of the old style <mach/r8a7791.h>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-25 16:53:34 +09:00
keita kobayashi 7f6234013a ARM: shmobile: r8a7791: Support Core-Standby for Suspend to RAM
Add r8a7791 Core-Standby state for Suspend to RAM support.

Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 19:33:21 +09:00
keita kobayashi 5f6108bb96 ARM: shmobile: r8a7791 SYSC setup code
Add r8a7791 SYSC power management support.

Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
[horms+renesas@verge.net.au: rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 17:51:50 +09:00
Magnus Damm 62872989bd ARM: shmobile: Move rcar-gen2.h, cleanup r8a7790 case
Change location of rcar-gen2.h so it can be used as #include "rcar-gen2.h"
instead of the old style #include <mach/rcar-gen2.h>. Also clean up
the r8a7790 case to follow the same style as r8a7791.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 17:09:40 +09:00
Magnus Damm fd44aa5e57 ARM: shmobile: Move common.h
Change location for common.h so it can be used as #include "common.h"
instead of the old style #include <mach/common.h>.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 17:09:39 +09:00
Magnus Damm 277efd30cf ARM: shmobile: Check r8a7791 MD21 at SMP boot
On r8a7791 the hardware boot mode bit MD21 indicates if hardware
debug mode is enabled or not. In case hardware debug mode is enabled
print a warning and refrain from booting secondary CPU cores.

Without this patch Koelsch with SW8-4 set to OFF will hang at SMP boot.

Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:28:43 +09:00
Magnus Damm 687c27b070 ARM: shmobile: r8a7791 SMP support
Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-10-08 09:53:02 +09:00