Commit Graph

2608 Commits

Author SHA1 Message Date
Tero Kristo a0d54c3899 clk: ti: omap3+: dpll: use non-locking version of clk_get_rate
As the code in this file is being executed within irq context in some
cases, we must avoid the clk_get_rate which uses mutex internally.
Switch the code to use clk_hw_get_rate instead which is non-locking.

This fixes an issue where PM runtime will hang the system if enabled
with a serial console before a suspend-resume cycle.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Fixes: a53ad8ef3d ("clk: ti: Convert to clk_hw based provider APIs")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-22 14:03:02 -08:00
Stephen Boyd 4462b4bbfc clk: gpio: Really allow an optional clock= DT property
We mis-merged the original patch from Russell here and so the
patch went almost all the way, except that we still failed to
probe when there wasn't a clocks property in the DT node. Allow
that case by making a negative value from
of_clk_get_parent_count() into "no parents", like the original
patch did.

Fixes: 7ed88aa2ef ("clk: fix clk-gpio.c with optional clock= DT property")
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-18 19:10:22 -08:00
Stephen Boyd c430daf951 Revert "clk: qcom: Specify LE device endianness"
This reverts commit 329cabcecf.

The commit that caused us to specify LE device endianness here,
29bb45f25f (regmap-mmio: Use native endianness for read/write,
2015-10-29), has been reverted in mainline so now when we specify
LE it actively breaks big endian kernels because the byte
swapping in regmap-mmio is incorrect. Let's revert this change
because it will 1) fix the big endian kernels and 2) be redundant
to specify LE because that will become the default soon.

Cc: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-12 14:24:24 -08:00
Linus Walleij df9cd56421 clk: versatile: mask VCO bits before writing
The Versatile syscon ICST driver OR:s the bits into place but
forgets to mask the previous value, making the code only work
if the register is zero or giving haphazard results. Mask the
19 bits used by the Versatile syscon interface register.

Regression caused and now fixed by yours truly.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Fixes: 179c8fb3c2 ("clk: versatile-icst: convert to use regmap")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-10 09:56:31 -08:00
Stephen Boyd 0e954fea5b clk: tegra: Fixes for v4.5-rc3
This set contains a bunch of miscellaneous fixes that have accumulated
 over the past couple of weeks, primarily for the Tegra210 support added
 in v4.5-rc1.
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Merge tag 'tegra-for-4.5-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-fixes

Pull tegra fixes from Thierry Reding:

clk: tegra: Fixes for v4.5-rc3

This set contains a bunch of miscellaneous fixes that have accumulated
over the past couple of weeks, primarily for the Tegra210 support added
in v4.5-rc1.

* tag 'tegra-for-4.5-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: super: Fix sparse warnings for functions not declared as static
  clk: tegra: Fix sparse warnings for functions not declared as static
  clk: tegra: Fix sparse warning for pll_m
  clk: tegra: Use definition for pll_u override bit
  clk: tegra: Fix warning caused by pll_u failing to lock
  clk: tegra: Fix clock sources for Tegra210 EMC
  clk: tegra: Add the APB2APE audio clock on Tegra210
  clk: tegra: Add missing of_node_put()
  clk: tegra: Fix PLLE SS coefficients
  clk: tegra: Fix typos around clearing PLLE bits during enable
  clk: tegra: Do not disable PLLE when under hardware control
  clk: tegra: Fix pllx dyn step calculation
  clk: tegra: pll: Fix potential sleeping-while-atomic
  clk: tegra: Fix the misnaming of nvenc from msenc
  clk: tegra: Fix naming of MISC registers
  clk: tegra: Remove improper flags for lock_enable
  clk: tegra: Fix divider on VI_I2C
2016-02-08 13:51:04 -08:00
Jon Hunter 5a1d5eff3e clk: tegra: super: Fix sparse warnings for functions not declared as static
Sparse reports the following warnings for structures and functions that
should be declared static:

drivers/clk/tegra/clk-tegra-super-gen4.c:70:35: warning: symbol
 'tegra_super_gen_info_gen4' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra-super-gen4.c:96:35: warning: symbol
 'tegra_super_gen_info_gen5' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra-super-gen4.c:174:13: warning: symbol
 'tegra_super_clk_init' was not declared. Should it be static?

Fix this by making the above static.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:34 +01:00
Jon Hunter fd360e2084 clk: tegra: Fix sparse warnings for functions not declared as static
Sparse reports the following warnings for functions in clk-tegra210.c
that should be declared as static:

drivers/clk/tegra/clk-tegra210.c:460:6: warning: symbol
 'tegra210_pllcx_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:485:6: warning: symbol
 '_pllc_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:490:6: warning: symbol
 '_pllc2_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:495:6: warning: symbol
 '_pllc3_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:500:6: warning: symbol
 '_plla1_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:510:6: warning: symbol
 'tegra210_plla_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:562:6: warning: symbol
 'tegra210_plld_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:701:6: warning: symbol
 'tegra210_plld2_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:709:6: warning: symbol
 'tegra210_plldp_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:722:6: warning: symbol
 'tegra210_pllc4_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:731:6: warning: symbol
 'tegra210_pllre_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:844:6: warning: symbol
 'tegra210_pllx_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:904:6: warning: symbol
 'tegra210_pllmb_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:963:6: warning: symbol
 'tegra210_pllp_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:1025:6: warning: symbol
 'tegra210_pllu_set_defaults' was not declared. Should it be static?
drivers/clk/tegra/clk-tegra210.c:1215:15: warning: symbol
 'tegra210_clk_adjust_vco_min' was not declared. Should it be static?

Fix this by declaring the above as static.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:33 +01:00
Jon Hunter d9e657919a clk: tegra: Fix sparse warning for pll_m
Sparse generates the following warning for the pll_m params structure:

drivers/clk/tegra/clk-tegra210.c:1569:10: warning: Initializer entry
 defined twice
drivers/clk/tegra/clk-tegra210.c:1570:10:   also defined here

Fix this by correcting the index for the MISC1 register.

Fixes: b31eba5ff3f7 ("clk: tegra: Add support for Tegra210 clocks")

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:32 +01:00
Jon Hunter 2d5b6cf84a clk: tegra: Use definition for pll_u override bit
The definition, PLLU_BASE_OVERRIDE, for the pll_u OVERRIDE bit is defined
but not used and when the OVERRIDE bit is cleared in tegra210_pll_init()
the code directly uses the bit number. Therefore, use the definition,
PLLU_BASE_OVERRIDE when clearing the OVERRIDE bit.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:31 +01:00
Jon Hunter 0649c3232b clk: tegra: Fix warning caused by pll_u failing to lock
If the pll_u is not configured by the bootloader, then on kernel boot the
following warning is seen:

 clk_pll_wait_for_lock: Timed out waiting for pll pll_u_vco lock
 tegra_init_from_table: Failed to enable pll_u_out1
 ------------[ cut here ]------------
 WARNING: at drivers/clk/tegra/clk.c:269
 Modules linked in:

 CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc4-next-20151214+ #1
 Hardware name: NVIDIA Tegra210 P2371 reference board (E.1) (DT)
 task: ffffffc0bc0a0000 ti: ffffffc0bc0a8000 task.ti: ffffffc0bc0a8000
 PC is at tegra_init_from_table+0x140/0x164
 LR is at tegra_init_from_table+0x140/0x164
 pc : [<ffffffc0008fee78>] lr : [<ffffffc0008fee78>] pstate: 80000045
 sp : ffffffc0bc0abd50
 x29: ffffffc0bc0abd50 x28: ffffffc00090b8a8
 x27: ffffffc000a06000 x26: ffffffc0bc019780
 x25: ffffffc00086a708 x24: ffffffc00086a790
 x23: ffffffc0006d7188 x22: ffffffc0bc010000
 x21: 000000000000016e x20: ffffffc0bc00d100
 x19: ffffffc000944178 x18: 0000000000000007
 x17: 000000000000000e x16: 0000000000000001
 x15: 0000000000000007 x14: 000000000000000e
 x13: 0000000000000013 x12: 000000000000001a
 x11: 000000000000004d x10: 0000000000000750
 x9 : ffffffc0bc0a8000 x8 : ffffffc0bc0a07b0
 x7 : 0000000000000001 x6 : 0000000002d5f0f8
 x5 : 0000000000000000 x4 : 0000000000000000
 x3 : 0000000000000002 x2 : ffffffc000996724
 x1 : 0000000000000000 x0 : 0000000000000032

 ---[ end trace cbd20ae519e92ced ]---
 Call trace:
 [<ffffffc0008fee78>] tegra_init_from_table+0x140/0x164
 [<ffffffc000900ac8>] tegra210_clock_apply_init_table+0x20/0x28
 [<ffffffc0008fec40>] tegra_clocks_apply_init_table+0x18/0x24
 [<ffffffc00008291c>] do_one_initcall+0x90/0x194
 [<ffffffc0008cfab0>] kernel_init_freeable+0x148/0x1e8
 [<ffffffc000636bb0>] kernel_init+0x10/0xdc
 [<ffffffc000085cd0>] ret_from_fork+0x10/0x40
 clk_pll_wait_for_lock: Timed out waiting for pll pll_u_vco lock
 tegra_init_from_table: Failed to enable pll_u_out2
 ------------[ cut here ]------------

pll_u can be either controlled by software or hardware and this is
selected via the OVERRIDE bit in the pll_u base register. In the function
tegra210_pll_init(), the OVERRIDE bit for pll_u is cleared, which selects
hardware control of the pll. However, at the same time the pll_u clocks
are populated in the init_table for tegra210 and so software will try to
configure the pll_u if it is not already configured and hence, the above
warning is seen when the pll fails to lock. Remove the pll_u clocks from
the init_table so that software does not try to configure this pll on
boot.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:31 +01:00
Jon Hunter 4f8d444030 clk: tegra: Fix clock sources for Tegra210 EMC
The EMC clock sources for Tegra210 currently incorrectly include pll_c2
and pll_c3. However, both of these should have been pll_mb as shown in
the TRM. If Tegra210 happens to be configured such that the pll_mb is the
default clock for the EMC, as configured by the bootloader, then this will
cause a system hang on boot. This is because the kernel will disable the
pll_mb when disabling unused clock as it appears to be unused when it is
not.

Also add the additional pll_p clock source for the EMC.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:30 +01:00
Jon Hunter 2956994168 clk: tegra: Add the APB2APE audio clock on Tegra210
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
Tegra210 devices. Add this clock for Tegra210.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:29 +01:00
Amitoj Kaur Chawla 047d6d8401 clk: tegra: Add missing of_node_put()
for_each_child_of_node() performs an of_node_get() on each iteration, so
before breaking out of the loop an of_node_put() is required.

Found using Coccinelle. The semantic patch used for this is as follows:

// <smpl>
@@
expression e;
local idexpression child;
@@

 for_each_child_of_node(root, child) {
   ... when != of_node_put(child)
       when != e = child
(
   return child;
|
+  of_node_put(child);
?  return ...;
)
   ...
 }
// </smpl>

Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:28 +01:00
Mark Kuo 442f53fb1b clk: tegra: Fix PLLE SS coefficients
The PLLE SS coefficients are different between Tegra210 and Tegra114.
Add SoC generation specific versions for Tegra114 and Tegra210 and use
them in their respective ->enable() callbacks.

Signed-off-by: Mark Kuo <mkuo@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:27 +01:00
Rhyland Klein fd2963b071 clk: tegra: Fix typos around clearing PLLE bits during enable
While enabling PLLE on both Tegra114 and Tegra210, we should be clearing
PLLE_MISC_VREG_BG_CTRL_MASK and PLLE_MISC_VREG_CTRL_MASK not setting
them. This patch fixes both places where we incorrectly set instead of
cleared those bits.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:26 +01:00
Mark Kuo f59b0168d3 clk: tegra: Do not disable PLLE when under hardware control
Software should not disable PLLE if PLLE is already put under hardware
control.

Signed-off-by: Mark Kuo <mkuo@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:25 +01:00
Rhyland Klein 3dad5c5fa1 clk: tegra: Fix pllx dyn step calculation
The logic for calculating the input rate used when figuring out the
proper dynamic steps for pllx was incorrect. It is supposed to be
calculated using parent_rate / m but it was just using the parent rate
directly, therefore using the wrong step values.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:24 +01:00
Andrew Bresticker 3eb61566a6 clk: tegra: pll: Fix potential sleeping-while-atomic
Since the ->enable() callback is called with a spinlock held, we cannot
call potentially blocking functions such as clk_get_rate() or
clk_get_parent(), so use the unlocked versions instead.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
[rklein: Adapted from ChromeOS patch, removing pllu_enable cleanup as
it isn't present upstream]
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:23 +01:00
Rhyland Klein 736971bed2 clk: tegra: Fix the misnaming of nvenc from msenc
When adding the nvenc clock, it was partially named msenc in the code.
Since the msenc clock isn't present in Tegra210 and has been replaced by
the nvenc clock, its misleading to see it present. Therefore, properly
rename it.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:22 +01:00
Rhyland Klein 474f2ba268 clk: tegra: Fix naming of MISC registers
Some register for PLLM and PLLMB were named MISC0 but according to the
TRM, they have different names. Sync up the names to make it easier to
understand which register they are really referring to.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:20 +01:00
Stephen Boyd 60c7e2d2ed Fixes for wrong register offsets in both rk3036 and rk3368.
Also rename the external input for the emac on rk3036, which
 should still be ok to do, as that binding was only introduced
 during this merge-window.
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Merge tag 'v4.5-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-fixes

Pull rockchip fixes from Heiko Stuebner:

Fixes for wrong register offsets in both rk3036 and rk3368.
Also rename the external input for the emac on rk3036, which
should still be ok to do, as that binding was only introduced
during this merge-window.

* tag 'v4.5-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3368: fix some clock gates
  clk: rockchip: rk3036: rename emac ext source clock
  clk: rockchip: rk3036: fix the div offset for emac clock
  clk: rockchip: rk3036: fix uarts clock error
  clk: rockchip: rk3036: fix the FLAGs for clock mux
2016-01-29 17:24:28 -08:00
Marc Gonzalez eac2d86d60 clk: tango4: rename ARCH_TANGOX to ARCH_TANGO
Requested by arm-soc maintainer Kevin Hilman in v9 review.
http://article.gmane.org/gmane.linux.ports.arm.kernel/456331

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 12:08:02 -08:00
Axel Lin d22eb66b3c clk: scpi: Fix checking return value of platform_device_register_simple()
platform_device_register_simple() returns ERR_PTR on error.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 12:07:59 -08:00
Stephen Boyd 1ce133ec89 clk: mvebu: Mark ioremapped memory as __iomem
Silence the following sparse warning

drivers/clk/mvebu/dove-divider.c:252:14: warning: incorrect type in assignment (different address spaces)
drivers/clk/mvebu/dove-divider.c:252:14:    expected void *base
drivers/clk/mvebu/dove-divider.c:252:14:    got void [noderef] <asn:2>*
drivers/clk/mvebu/dove-divider.c:256:13: warning: incorrect type in argument 2 (different address spaces)
drivers/clk/mvebu/dove-divider.c:256:13:    expected void [noderef] <asn:2>*base
drivers/clk/mvebu/dove-divider.c:256:13:    got void *base
drivers/clk/mvebu/dove-divider.c:257:25: warning: incorrect type in argument 1 (different address spaces)
drivers/clk/mvebu/dove-divider.c:257:25:    expected void volatile [noderef] <asn:2>*iomem_cookie
drivers/clk/mvebu/dove-divider.c:257:25:    got void *base

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 12:06:47 -08:00
Rhyland Klein 14050118af clk: tegra: Remove improper flags for lock_enable
Most PLL's don't actually have LOCK_ENABLE bits. However, most PLL's
also had that flag set, which meant that the clk code was trying to
enable locks, and inadvertantly flipping bits in other fields.

For PLLM, ensure the correct register is used for the misc_register.
PLL_MISC0 contains the EN_LCKDET bit which should be used for enabling
the lock, and PLLM_MISC1 shouldn't be used at all.

Lastly, remove some of the settings which would point to the EN_LCKDET
bits for some PLLs. There is no need to enable the locks, and that is
done as part of the set_defaults logic already.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-01-25 13:56:30 +01:00
Rhyland Klein 21e4903246 clk: tegra: Fix divider on VI_I2C
VI-I2C has 16 bits available for its divider. Switch the divider width
to 16 instead of 8 so correct rates can be set.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-01-25 13:27:51 +01:00
Linus Torvalds 6d1c244803 ARM: DT updates for v4.5
As usual, the bulk of this release is again DT file contents.
 
 There's a huge number of changes here, and it's challenging to give a crisp
 overview of just what is in here. To start with:
 
 New boards:
 
 - TI-based DM3730 from LogicPD (Torpedo)
 - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
 - Raspberry Pi 2 DT files
 - Watchdog on Meson8b
 - Veyron-mickey (ASUS Chromebit) DTS
 - Rockchip rk3228 SoC and eval board
 - Sigma Designs Tango4
 
 Improvements:
 
 - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
 - Misc new devices for Rockchip rk3036 and rk3288
 - Allwinner updates for misc SoCs and systems
 
 ... and a _large_ number of other changes across the field. Devices
 added to SoC DTSI and board DTS files for a number of SoC vendors, new
 product boards on already-supported SoCs, cleanups and refactorings of
 existing DTS/DTSI files and a bunch of other changes.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...
2016-01-20 18:16:29 -08:00
Linus Torvalds 6b5a12dbca ARM: SoC multiplatform code changes for v4.5
This branch is the culmination of 5 years of effort to bring the ARMv6
 and ARMv7 platforms together such that they can all be enabled and
 boot the same kernel. It has been a tremendous amount of cleanup and
 refactoring by a huge number of people, and creation of several new
 (and major) subsystems to better abstract out all the platform details
 in an appropriate manner.
 
 The bulk of this branch is a large patchset from Arnd that brings several
 of the more minor and older platforms we have closer to multiplatform
 support.  Among these are MMP, S3C64xx, Orion5x, mv78xx0 and realview
 Much of this is moving around header files from old mach directories,
 but there are also some cleanup patches of debug_ll (lowlevel debug
 per-platform options) and other parts.
 
 Linus Walleij also has some patchs to clean up the older ARM Realview
 platforms by finally introducing DT support, and Rob Herring has some
 for ARM Versatile which is now DT-only. Both of these platforms are
 now multiplatform.
 
 Finally, a couple of patches from Russell for Dove PMU, and a fix from
 Valentin Rothberg for Exynos ADC, which were rebased on top of the
 series to avoid conflicts.
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Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform code updates from Arnd Bergmann:
 "This branch is the culmination of 5 years of effort to bring the ARMv6
  and ARMv7 platforms together such that they can all be enabled and
  boot the same kernel.  It has been a tremendous amount of cleanup and
  refactoring by a huge number of people, and creation of several new
  (and major) subsystems to better abstract out all the platform details
  in an appropriate manner.

  The bulk of this branch is a large patchset from Arnd that brings
  several of the more minor and older platforms we have closer to
  multiplatform support.  Among these are MMP, S3C64xx, Orion5x, mv78xx0
  and realview Much of this is moving around header files from old mach
  directories, but there are also some cleanup patches of debug_ll
  (lowlevel debug per-platform options) and other parts.

  Linus Walleij also has some patchs to clean up the older ARM Realview
  platforms by finally introducing DT support, and Rob Herring has some
  for ARM Versatile which is now DT-only.  Both of these platforms are
  now multiplatform.

  Finally, a couple of patches from Russell for Dove PMU, and a fix from
  Valentin Rothberg for Exynos ADC, which were rebased on top of the
  series to avoid conflicts"

* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits)
  ARM: realview: don't select SMP_ON_UP for UP builds
  ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
  ARM: s3c64xx: fix pm-debug compilation
  iio: exynos-adc: fix irqf_oneshot.cocci warnings
  ARM: realview: build realview-dt SMP support only when used
  ARM: realview: select apropriate targets
  ARM: realview: clean up header files
  ARM: realview: make all header files local
  ARM: no longer make CPU targets visible separately
  ARM: integrator: use explicit core module options
  ARM: realview: enable multiplatform
  ARM: make default platform work for NOMMU
  ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location
  ARM: defconfig: use correct debug_ll settings
  ARM: versatile: convert to multi-platform
  ARM: versatile: merge mach code into a single file
  ARM: versatile: switch to DT only booting and remove legacy code
  ARM: versatile: add DT based PCI detection
  ARM: pxa: mark ezx structures as __maybe_unused
  ARM: pxa: mark raumfeld init functions as __maybe_unused
  ...
2016-01-20 18:03:56 -08:00
Linus Torvalds 0c582826a1 ARM: SoC non-urgent fixes for v4.5
As usual, we queue up a few fixes that don't seem urgent enough to go in
 through -rc.
 
  - MAINTAINERS updates to add a list for brcmstb and fix a typo
  - A handful of fixes for OMAP 81xx, a recently resurrected platform so these
    can't be considered real regressions and thus got queued.
  - A couple of other small fixes for scoop, sa1100 and davinci
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Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull non-urgent ARM SoC fixes from Olof Johansson:
 "As usual, we queue up a few fixes that don't seem urgent enough to go
  in through -rc.

   - MAINTAINERS updates to add a list for brcmstb and fix a typo
   - A handful of fixes for OMAP 81xx, a recently resurrected platform
     so these can't be considered real regressions and thus got queued.
   - A couple of other small fixes for scoop, sa1100 and davinci"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: OMAP2+: Fix randconfig build warning for dm814_pllss_data
  ARM: sa1100/simpad: Be sure to clamp return value
  ARM: scoop: Be sure to clamp return value
  ARM: davinci: fix a problematic usage of WARN()
  ARM: davinci: only select WT cache if cache is enabled
  ARM: OMAP2+: Remove useless check for legacy booting for dm814x
  ARM: OMAP2+: Enable GPIO for dm814x
  ARM: dts: Fix dm814x pinctrl address and mask
  ARM: dts: Fix dm8148 control modules ranges
  ARM: OMAP2+: Fix timer entries for dm814x
  ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
  ARM: OMAP2+: Add DPPLS clock manager for dm814x
  clk: ti: Add few dm814x clock aliases
  ARM: dts: Fix dm814x entries for pllss and prcm
  MAINTAINERS: gpio-brcmstb: Remove stray '>'
  MAINTAINERS: brcmstb: Include Broadcom internal mailing-list
2016-01-20 17:44:16 -08:00
Linus Torvalds e3de671dd6 asm-generic changes for 4.5
The asm-generic tree this time contains one series from Nicolas Pitre
 that makes the optimized do_div() implementation from the ARM
 architecture available to all architectures. This also adds stricter
 type checking for callers of do_div, which has uncovered a number
 of bugs in existing code, and fixes up the ones we have found.
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Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic updates from Arnd Bergmann:
 "The asm-generic tree this time contains one series from Nicolas Pitre
  that makes the optimized do_div() implementation from the ARM
  architecture available to all architectures.

  This also adds stricter type checking for callers of do_div, which has
  uncovered a number of bugs in existing code, and fixes up the ones we
  have found"

* tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  ARM: asm/div64.h: adjust to generic codde
  __div64_32(): make it overridable at compile time
  __div64_const32(): abstract out the actual 128-bit cross product code
  do_div(): generic optimization for constant divisor on 32-bit machines
  div64.h: optimize do_div() for power-of-two constant divisors
  mtd/sm_ftl.c: fix wrong do_div() usage
  drm/mgag200/mgag200_mode.c: fix wrong do_div() usage
  hid-sensor-hub.c: fix wrong do_div() usage
  ti/fapll: fix wrong do_div() usage
  ti/clkt_dpll: fix wrong do_div() usage
  tegra/clk-divider: fix wrong do_div() usage
  imx/clk-pllv2: fix wrong do_div() usage
  imx/clk-pllv1: fix wrong do_div() usage
  nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage
2016-01-20 17:30:20 -08:00
Jianqun xu 8931f8e029 clk: rockchip: rk3368: fix some clock gates
Reference to the Rockchip RK3368 TRM v1.1, some clock
gates need to be updated.

Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
Xing Zheng 3d667920bc clk: rockchip: rk3036: rename emac ext source clock
There is only support rmii in the RK3036, so we should use the correct
ext clock name as described in the TRM.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
[update dt-binding document as well]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
Xing Zheng c40519350e clk: rockchip: rk3036: fix the div offset for emac clock
Due to reference to old version TRM, there are incorrect emac clock node.
The SEL_21_9 is used for the parent div, the SEL_21_4 is used for the
child div.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
Xing Zheng b29de2de50 clk: rockchip: rk3036: fix uarts clock error
Due to a copy-paste error the uart1 and uart2 clock div set
incorrect, fix it.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
Xing Zheng 99222c9e4d clk: rockchip: rk3036: fix the FLAGs for clock mux
The DFLAGS are used for the clock dividers, the CLKSEL_CON flags
of COMPOSITE_NODIV type should be MFLAGS.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-16 16:01:21 +01:00
Vladimir Zapolskiy 3da834e3e5 clk: remove duplicated COMMON_CLK_NXP record from clk/Kconfig
Presumably the second COMMON_CLK_NXP config option in
drivers/clk/Kconfig appeared after a merge conflict resolution, remove
the wrong record of two.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-01-13 18:09:52 -08:00
Michael Turquette b360ada3f1 clk: tegra: Changes for v4.5-rc1
This set of changes adds support for the Tegra210 SoC and contains a
 couple fixes and cleanups.
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Merge tag 'tegra-for-4.5-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

clk: tegra: Changes for v4.5-rc1

This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
2016-01-04 16:16:45 -08:00
Russell King 7ed88aa2ef clk: fix clk-gpio.c with optional clock= DT property
When the clock DT property is not given, of_clk_get_parent_count()
returns -ENOENT, which then tries to allocate -2 x 4 bytes of memory,
which of course fails, causing the whole driver to fail to create
the clock.

This causes the SolidRun platforms to fail probing the SDHCI1 interface
which is connected to the WiFi.

Fix this by detecting errno codes, skipping the allocation, and fixing
of_clk_gpio_gate_delayed_register_get() to handle a NULL parent_names
array.

Fixes: 80eeb1f0f7 ("clk: add gpio controlled clock multiplexer")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-01-02 23:19:50 -08:00
Michael Turquette 49dea76aeb Merge branch 'clk-rockchip' into clk-next 2016-01-02 13:41:09 -08:00
Heiko Stübner 5b73840375 clk: rockchip: fix section mismatches with new child-clocks
To model the muxes downstream of fractional dividers we introduced the
child property, allowing to describe a direct child clock.
The first implementation seems to cause section warnings, as the core
clock-tree is marked as initdata while the data pointed to from the
child element is not.

While there may be some way to also set that missing property in the
inline notation I didn't find it, so to actually fix the issue for now
move the sub-definitions into separate declarations that can have
their own __initdata properties.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-01-02 13:40:29 -08:00
Brian Norris 0b2e78865d clk: gpio: handle error codes for of_clk_get_parent_count()
We might make bad memory allocations if we get (e.g.) -ENOSYS from
of_clk_get_parent_count().

Noticed by Coverity.

Fixes: f66541ba02 ("clk: gpio: Get parent clk names in of_gpio_clk_setup()")
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Sergej Sawazki <ce3a@gmx.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31 21:54:45 -08:00
Sudip Mukherjee c76eb11c8f clk: gpio: fix memory leak
If we fail to allocate parent_name then we are returning but we missed
freeing data which has already been allocated.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31 21:31:58 -08:00
Michael Turquette 9e256c722f Merge branch 'clk-renesas' into clk-next 2015-12-31 15:17:39 -08:00
Ulrich Hecht c1c5864d94 clk: shmobile: r8a7795: Add SATA0 clock
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31 15:15:30 -08:00
Arnd Bergmann d731afa460 Samsung DeviceTree updates and improvements for 4.5
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
    Chromebooks.
 2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
    yet and on XU3-Lite and XU4 it is not supported.
 3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
 4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
    This depends on new SSS clock.
 5. Add rotator nodes for Exynos4 and Exynos5.
 6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
    now it cannot be used as OTG.
 7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
    in case of Exynos4210.
 8. Put MDMA1 in proper domain on Exynos4210 as well.
 9. Minor cleanups.
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Merge tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski:

1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
   Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
   yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
   This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
   now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
   in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.

* tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits)
  ARM: dts: Unify G2D device node with other devices on exynos4
  ARM: dts: Add power domain to G2D device on exynos4210
  ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210
  ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3
  ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs
  ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3
  ARM: dts: Add rotator node on exynos5420
  ARM: dts: Add rotator node on exynos5250
  ARM: dts: Fix power domain for sysmmu-rotator device on exynos4
  ARM: dts: Add rotator nodes on exynos4
  ARM: dts: Enable PRNG module on exynos4412-trats2
  ARM: dts: Add PRNG module for exynos4
  dt-bindings: remove deprecated compatible string from exynos-hdmi
  ARM: dts: Remove fimd node from exynos5422-odroidxu3-common
  ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common
  ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi
  ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi
  ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common
  ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit
  ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi
  ...
2015-12-31 17:31:56 +01:00
Arnd Bergmann d4e68fa37f Add minimal device tree support for dra62x also known j5eco. It is
related to dm814x, just the clocks are a bit different and it has a
 different set of integrated devices. And let's get some basic dm814x
 and dra62x devices working as many of the devices are like on am33xx::
 
 - pinctrl using the pinctrl defines as for am33xx
 
 - Updated EDMA bindings with support for using exma_xbar
 
 - MMC support for dm814x-evm, t410 and dra62x-j5eco-evm
 
 - USB support for dm814x-evm, t410 and dra62x-j5eco-evm
 
 This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed
 branch that has dm814x dts fixes interlaced with SoC related fixes to
 keep things booting. The interlaced SoC and dts fixes were needed
 because of issues with the device tree defined clocks that just
 happened to work on bootloader timings for t410 earlier.
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Merge tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "reworked dts changes for ti81xx devices and minimal
dra62x j5ec-evm support" from Tony Lindgren:

Add minimal device tree support for dra62x also known j5eco. It is
related to dm814x, just the clocks are a bit different and it has a
different set of integrated devices. And let's get some basic dm814x
and dra62x devices working as many of the devices are like on am33xx::

- pinctrl using the pinctrl defines as for am33xx

- Updated EDMA bindings with support for using exma_xbar

- MMC support for dm814x-evm, t410 and dra62x-j5eco-evm

- USB support for dm814x-evm, t410 and dra62x-j5eco-evm

This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed
branch that has dm814x dts fixes interlaced with SoC related fixes to
keep things booting. The interlaced SoC and dts fixes were needed
because of issues with the device tree defined clocks that just
happened to work on bootloader timings for t410 earlier.

* tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
  ARM: dts: Add usb support for j5-eco evm
  ARM: dts: Add usb support for hp t410
  ARM: dts: Add usb support for dm814x-evm
  ARM: dts: Add usb support for dm814x and dra62x
  ARM: dts: Enable emmc on hp t410
  ARM: dts: Add mmc support for dra62x j5-eco evm
  ARM: dts: Add mmc support for dm8148-evm
  ARM: dts: Add mmc device entries for dm814x
  ARM: dts: Update edma bindings on dm814x to use edma_xbar
  ARM: dts: Add pinctrl macros for dm814x
  ARM: dts: Add minimal dra62x j5-eco evm support
  ARM: dts: Add basic support for dra62x j5-eco SoC
  ARM: OMAP2+: Remove useless check for legacy booting for dm814x
  ARM: OMAP2+: Enable GPIO for dm814x
  ARM: dts: Fix dm814x pinctrl address and mask
  ARM: dts: Fix dm8148 control modules ranges
  ARM: OMAP2+: Fix timer entries for dm814x
  ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
  ARM: OMAP2+: Add DPPLS clock manager for dm814x
  clk: ti: Add few dm814x clock aliases
  ...
2015-12-31 16:25:22 +01:00
Michael Turquette 82d0f8bc4b Merge branch 'clk-bcm2835' into clk-next 2015-12-24 20:39:02 -08:00
Remi Pommarel cfbab8fbab clk: bcm2835: Add PWM clock support
Register the pwm clock for bcm2835.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24 20:38:38 -08:00
Remi Pommarel 6d18b8adbe clk: bcm2835: Support for clock parent selection
Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple
parent clocks. These clocks divide the rate of a parent which can be selected by
setting the proper bits in the clock control register.

Previously all these parents where handled by a mux clock. But a mux clock
cannot be used because updating clock control register to select parent needs a
password to be xor'd with the parent index.

This patch get rid of mux clock and make these clocks handle their own parent,
allowing them to select the one to use.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24 20:38:30 -08:00
Remi Pommarel 9c95b32ca0 clk: bcm2835: add a round up ability to the clock divisor
Make bcm2835_clock_choose_div to optionally round up the chosen MASH divisor
so that the resulting average rate will not be higher than the requested one.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24 20:38:06 -08:00