Commit Graph

11 Commits

Author SHA1 Message Date
Mika Westerberg defc0b2fb5 i2c: designware: make HCNT/LCNT values configurable
The DesignWare I2C controller has high count (HCNT) and low count (LCNT)
registers for each of the I2C speed modes (standard and fast). These
registers are programmed based on the input clock speed in the driver.

The current code calculates these values based on the input clock speed and
tries hard to meet the I2C bus timing requirements. This could result
non-optimal values with regarding to the bus speed. For example on Intel
BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would
expect (400kHz) in fast mode (even though the timing requirements are met).

This patch makes it possible for the platform code to pass more optimal
HCNT/LCNT values to the core driver if they are known beforehand. If these
are not set we use the calculated and more conservative values.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-28 11:11:10 +02:00
Christian Ruppert 9803f86894 i2c-designware: make SDA hold time configurable
This patch makes the SDA hold time configurable through device tree.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-26 16:02:06 +02:00
Josef Ahmad e6f34cea56 i2c: designware: fix RX FIFO overrun
i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive
to/from the bus into the TX FIFO.
For master-rx transactions, the maximum amount of data that can be
received is calculated depending solely on TX and RX FIFO load.

This is racy - TX FIFO may contain master-rx data yet to be
processed, which will eventually land into the RX FIFO. This
data is not taken into account and the function may request more
data than the controller is actually capable of storing.

This patch ensures the driver takes into account the outstanding
master-rx data in TX FIFO to prevent RX FIFO overrun.

Signed-off-by: Josef Ahmad <josef.ahmad@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2013-05-17 10:33:11 +02:00
Stefan Roese a8a9f3fef1 i2c: designware: Add support for 16bit register access
The STM SPEAr platform can only access the i2c controller register
via 16bit read/write functions. This patch adds support to
automatically detect this 16bit access mode.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-12 14:28:11 +02:00
Dirk Brandewie 18dbdda89f i2c-designware: Add runtime power management support
Add runtime power management to the PCI driver.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:53 +01:00
Dirk Brandewie fe20ff5c7e i2c-designware: Add support for Designware core behind PCI devices.
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:52 +01:00
Dirk Brandewie f3fa9f3da5 i2c-designware: Push all register reads/writes into the core code.
Move all register manipulation code into the core, also move register
offset definitions to i2c-designware-core.c since the bus specific
portions of the driver no longer need/use them.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:51 +01:00
Dirk Brandewie e18563fc56 i2c-designware: move controller config to bus specific portion of driver
With multiple I2C adapters possible in the system each running at
(possibly) different speeds we need to move the controller
configuration bit field to the adapter.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:50 +01:00
Dirk Brandewie 2fa8326b4b i2c-designware: move i2c functionality bit field to be adapter specific
The functionality of the adapter depends on the configuration of the
IP block at silicon compile time and is adapter specific.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:50 +01:00
Dirk Brandewie 1d31b58f64 i2c-designware: Move retriveving the clock speed out of core code.
The clock frequecy supplied to the IP core is specific to a single
instance of the driver.  This patch makes it possible to have multiple
Designware I2C cores in the system possibly running at different core
frequencies.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:49 +01:00
Dirk Brandewie 2373f6b974 i2c-designware: split of i2c-designware.c into core and bus specific parts
This patch splits i2c-designware.c into three pieces:
     i2c-designware-core.c, contains the code that interacts directly
     with the core.

     i2c-designware-platdrv.c, contains the code specific to the
     platform driver using the core.

     i2c-designware-core.h contains the definitions and declareations
     shared by i2c-designware-core.c and i2c-designware-platdrv.c.

This patch is the first in a set to allow multiple instances of the
designware I2C core in the system.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:39 +01:00