Commit Graph

380 Commits

Author SHA1 Message Date
Sylwester Nawrocki 6466ee3227 Merge branch 'for-v4.7/clk/exynos542x' into for-v4.7/clk/next 2016-04-15 18:57:00 +02:00
Chanwoo Choi 81fed6e342 clk: samsung: exynos542x: Add the clock id for ACLK
This patch adds the clock id for ACLK clock which is source clock
of AMBA AXI bus. This clock should be handled in the bus frequency
scaling driver.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-04-15 18:13:45 +02:00
Chanwoo Choi f6764714af clk: samsung: exynos3250: Add MMC2 clock
This patch add the MMC2 clocks (mux, divider, gate) of Exynos3250 SoC.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-03-31 12:25:54 +02:00
Pankaj Dubey 27c0efedcf clk: samsung: exynos3250: Add UART2 clock
This patch add the UART2 clocks (mux, divider, gate) of Exynos3250 SoC.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-03-31 12:25:49 +02:00
Stephen Boyd 728f288d2a clk: samsung: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag.

Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-02 17:46:29 -08:00
Stephen Boyd 7450ca6c32 Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
 from the suspend/resume register save/restore list
 and exposition of two clocks required for the
 exynos5433 HDMI subsystem operation.
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Merge tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk driver changes from Sylwester Nawrocki:

Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.

* tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
  clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definition
  clk: samsung: exynos5433: Drop RO registers from the save/restore lists
  clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
  clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocks
  clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
  clk/samsung: exynos5433: add pclk_decon clock
  clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
2016-02-25 15:18:12 -08:00
Jonghwa Lee a6cb74cbc9 clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
This fixes register assignment in the CLK_PCLK_SMMU_GSCL{1,2}
clocks definition.

Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-25 12:10:00 +01:00
Sylwester Nawrocki 3795e0f6e4 clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definition
Control bits for the ACLK_CAM1_552_USER and ACLK_CAM1_400_USER
mux clocks are in MUX_SEL_CAM10, not MUX_SEL_CAM01 register.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-25 12:09:59 +01:00
Sylwester Nawrocki f0abd93125 clk: samsung: exynos5433: Drop RO registers from the save/restore lists
Restoring read-only registers is of not much effect, drop them
from the respective lists.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-25 12:09:58 +01:00
Marek Szyprowski f190a87e27 clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
This fixes bit field offsets in the CMU_TOP CLK_DIV_SCLK_ISP_SENSOR_{A,B}
clock definitions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-25 12:09:57 +01:00
Sylwester Nawrocki a665d30f1f clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocks
This corrects assignment of bit offsets of the MUX_SEL_CAM04 register
to the respective mux clocks.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-25 12:09:42 +01:00
Sylwester Nawrocki 3c30e382ae clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
This fixes "MPWM" -> "WPWM" typo in 3 *ISP_MWPM clock definitions.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-23 12:48:11 +01:00
Krzysztof Kozlowski 85997a7cba clk: samsung: Don't build ARMv8 clock drivers on ARMv7
Currently the Exynos5433 (ARMv8 SoC) clock driver depends on ARCH_EXYNOS
so it is built also on ARMv7. This does not bring any kind of benefit.
There won't be a single kernel image for ARMv7 and ARMv8 SoCs (like
multi_v7 for ARMv7).

Instead build clock drivers only for respective SoC's architecture.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-02-22 10:20:24 -08:00
Krzysztof Kozlowski 215cd9674f clk: samsung: Enable COMPILE_TEST for Samsung clocks
Enable the COMPILE_TEST to get build coverage of some of Samsung clock
controller drivers. Still some of them will be built only if
appropriate SoC is chosen (like SOC_EXYNOS4415 or ARCH_S3C64XX).

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-02-16 17:21:41 -08:00
Andrzej Hajda 02ed910cb4 clk/samsung: exynos5433: add pclk_decon clock
This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-03 11:03:50 +01:00
Andrzej Hajda 68b2206a57 clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-03 11:03:34 +01:00
James Liao b9e65ebc65 clk: Move vendor's Kconfig into CCF menu section
Move all vendor's Kconfig into CCF menu section to prevent
new drivers putting their Kconfig files in a wrong place.

Some Kconfigs need to be modified at the same time to avoid build
warnings.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[sboyd@codeaurora.org: Fix typos in commit message]
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 16:30:06 -08:00
Linus Torvalds 6d1c244803 ARM: DT updates for v4.5
As usual, the bulk of this release is again DT file contents.
 
 There's a huge number of changes here, and it's challenging to give a crisp
 overview of just what is in here. To start with:
 
 New boards:
 
 - TI-based DM3730 from LogicPD (Torpedo)
 - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
 - Raspberry Pi 2 DT files
 - Watchdog on Meson8b
 - Veyron-mickey (ASUS Chromebit) DTS
 - Rockchip rk3228 SoC and eval board
 - Sigma Designs Tango4
 
 Improvements:
 
 - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
 - Misc new devices for Rockchip rk3036 and rk3288
 - Allwinner updates for misc SoCs and systems
 
 ... and a _large_ number of other changes across the field. Devices
 added to SoC DTSI and board DTS files for a number of SoC vendors, new
 product boards on already-supported SoCs, cleanups and refactorings of
 existing DTS/DTSI files and a bunch of other changes.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...
2016-01-20 18:16:29 -08:00
Prasanna Karthik c5e949c1c2 clk: s3c2410: removed unneeded variable in s3c24xx_clkout_set_parent
Remove unneeded variable used to store return value.

Signed-off-by: Prasanna Karthik <mkarthi3@visteon.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:36:04 +01:00
Marek Szyprowski 6b4feaea25 clk: exynos: use irqsave version of spin_lock to avoid deadlock with irqs
It is allowed to enable/disable clocks from interrupts, so common Exynos
ARM clock management code for CPUfreq should use 'irqsave' version of
spin_lock calls to avoid potential deadlock caused by spin_lock recursion.
The same spin_lock is used by gate/mux clocks during enable/disable calls.

This deadlock, can be reproduced by enabling CPUfreq (ondemand or
userspace) and decoding video with s5p-mfc driver.

Relevant stack trace:
[ 5928.061534] BUG: spinlock recursion on CPU#0, bash/1252
[ 5928.061609]  lock: 0xee80454c, .magic: dead4ead, .owner: bash/1252, .owner_cpu: 0
[ 5928.068586] CPU: 0 PID: 1252 Comm: bash Tainted: G        W       4.4.0-rc4-00001-g447a7fd #678
[ 5928.077260] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[ 5928.083359] [<c00153dc>] (unwind_backtrace) from [<c00121b4>] (show_stack+0x10/0x14)
[ 5928.091072] [<c00121b4>] (show_stack) from [<c0213e28>] (dump_stack+0x68/0xb8)
[ 5928.098275] [<c0213e28>] (dump_stack) from [<c005c1ec>] (do_raw_spin_lock+0x184/0x1ac)
[ 5928.106177] [<c005c1ec>] (do_raw_spin_lock) from [<c05cfa98>] (_raw_spin_lock_irqsave+0x20/0x28)
[ 5928.114943] [<c05cfa98>] (_raw_spin_lock_irqsave) from [<c0468698>] (clk_gate_endisable+0x24/0x98)
[ 5928.123882] [<c0468698>] (clk_gate_endisable) from [<c0464d40>] (clk_core_disable+0x60/0x84)
[ 5928.132299] [<c0464d40>] (clk_core_disable) from [<c0465e00>] (clk_disable+0x24/0x30)
[ 5928.140117] [<c0465e00>] (clk_disable) from [<c03f3b80>] (s5p_mfc_handle_frame+0x254/0x860)
[ 5928.148445] [<c03f3b80>] (s5p_mfc_handle_frame) from [<c03f4b34>] (s5p_mfc_irq+0x890/0xa24)
[ 5928.156778] [<c03f4b34>] (s5p_mfc_irq) from [<c00627bc>] (handle_irq_event_percpu+0x50/0x14c)
[ 5928.165283] [<c00627bc>] (handle_irq_event_percpu) from [<c00628f0>] (handle_irq_event+0x38/0x5c)
[ 5928.174143] [<c00628f0>] (handle_irq_event) from [<c0065864>] (handle_fasteoi_irq+0xdc/0x1a4)
[ 5928.182645] [<c0065864>] (handle_fasteoi_irq) from [<c0062090>] (generic_handle_irq+0x18/0x28)
[ 5928.191236] [<c0062090>] (generic_handle_irq) from [<c00621a4>] (__handle_domain_irq+0x6c/0xdc)
[ 5928.199917] [<c00621a4>] (__handle_domain_irq) from [<c0009470>] (gic_handle_irq+0x4c/0x98)
[ 5928.208249] [<c0009470>] (gic_handle_irq) from [<c0012c54>] (__irq_svc+0x54/0x90)
[ 5928.215709] Exception stack(0xeddb5cb8 to 0xeddb5d00)
[ 5928.220745] 5ca0:                                                       ee80454c faddfadc
[ 5928.228906] 5cc0: 00000000 01000001 ee831ce0 f8114200 ee807c00 01130520 00000403 eddb5d84
[ 5928.237063] 5ce0: ee807c48 2faf0800 ee807c0c eddb5d08 c046b618 c046b634 20000053 ffffffff
[ 5928.245225] [<c0012c54>] (__irq_svc) from [<c046b634>] (exynos_cpuclk_notifier_cb+0x170/0x270)
[ 5928.253823] [<c046b634>] (exynos_cpuclk_notifier_cb) from [<c003cb58>] (notifier_call_chain+0x44/0x84)
[ 5928.263106] [<c003cb58>] (notifier_call_chain) from [<c003ccd4>] (__srcu_notifier_call_chain+0x6c/0x9c)
[ 5928.272480] [<c003ccd4>] (__srcu_notifier_call_chain) from [<c003cd1c>] (srcu_notifier_call_chain+0x18/0x20)
[ 5928.282288] [<c003cd1c>] (srcu_notifier_call_chain) from [<c0464ed0>] (__clk_notify+0x6c/0x74)
[ 5928.290881] [<c0464ed0>] (__clk_notify) from [<c0465388>] (clk_propagate_rate_change+0xa0/0xac)
[ 5928.299561] [<c0465388>] (clk_propagate_rate_change) from [<c0465378>] (clk_propagate_rate_change+0x90/0xac)
[ 5928.309370] [<c0465378>] (clk_propagate_rate_change) from [<c04666fc>] (clk_core_set_rate_nolock+0x64/0xa8)
[ 5928.319091] [<c04666fc>] (clk_core_set_rate_nolock) from [<c0466760>] (clk_set_rate+0x20/0x30)
[ 5928.327686] [<c0466760>] (clk_set_rate) from [<c0428c70>] (set_target+0xe8/0x23c)
[ 5928.335152] [<c0428c70>] (set_target) from [<c04244d0>] (__cpufreq_driver_target+0x184/0x29c)
[ 5928.343655] [<c04244d0>] (__cpufreq_driver_target) from [<c0427128>] (cpufreq_set+0x44/0x64)
[ 5928.352074] [<c0427128>] (cpufreq_set) from [<c0423948>] (store_scaling_setspeed+0x5c/0x74)
[ 5928.360407] [<c0423948>] (store_scaling_setspeed) from [<c04238d0>] (store+0x7c/0x98)
[ 5928.368221] [<c04238d0>] (store) from [<c0132540>] (sysfs_kf_write+0x44/0x48)
[ 5928.375338] [<c0132540>] (sysfs_kf_write) from [<c0131b9c>] (kernfs_fop_write+0xb8/0x1bc)
[ 5928.383496] [<c0131b9c>] (kernfs_fop_write) from [<c00d71f8>] (__vfs_write+0x2c/0xd4)
[ 5928.391308] [<c00d71f8>] (__vfs_write) from [<c00d7de8>] (vfs_write+0xa0/0x144)
[ 5928.398598] [<c00d7de8>] (vfs_write) from [<c00d8048>] (SyS_write+0x44/0x84)
[ 5928.405631] [<c00d8048>] (SyS_write) from [<c000f540>] (ret_fast_syscall+0x0/0x3c)

CC: stable@vger.kernel.org  # v4.2+
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:36:03 +01:00
Marek Szyprowski 34d3b67467 clk: samsung: exynos542x: fix MFC clock hierarchy parent
Proper source for MFC block is mout_user_aclk333 (in datasheet named
USER_MUX_ACLK_333), not the output of CLKDIV_ACLK_333 MUX.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:36:02 +01:00
Bartlomiej Zolnierkiewicz 54abbdb4ee clk: samsung: exynos542x/5800: fix cpu clock configuration data
Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).

Based on Hardkernel's kernel for ODROID-XU3 board.

Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:35:57 +01:00
Thomas Abraham bee4f87f01 clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:35:26 +01:00
Marek Szyprowski c0feb268da clk: samsung: exynos542x: add missing parent GSCL block clocks
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:35:17 +01:00
Krzysztof Kozlowski 94af7a3c31 clk: samsung: exynos4: Add SSS gate clock
Add a gate clock for controlling all clocks of Security Sub System
(SSS).

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-18 22:02:02 +09:00
Linus Torvalds c0d6fe2f01 ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of
 various updates and additions of hardware descriptions on existing hardware,
 as well as the usual additions of new boards and SoCs.
 
 This is also the first release where we've started mixing 64- and 32-bit
 DT updates in one branch.
 
 (Specific details on what's actually here and new is pretty easy to tell
 from the diffstat, so there's little point in duplicating listing it here.)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
2015-11-10 15:06:26 -08:00
Olof Johansson 3e4dda70cc Merge branch 'next/arm64' into next/dt
Merging in the few patches I had kept separate from main next/dt, since others
got merged here directly.

* next/arm64:
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  arm64: dts: mt8173: Add clocks for SCPSYS unit
  arm64: dts: mt8173: Add subsystem clock controller device nodes
  + Linux 4.3-rc5
2015-11-09 16:35:19 -08:00
Tomeu Vizoso b4dc272b60 clk: samsung: exynos5250: Add DISP1 clocks
When the DISP1 power domain is powered off, there's two clocks that need
to be temporarily reparented to OSC, and back to their original parents
when the domain is powered on again.

We expose these two clocks in the DT bindings so that the DT node of the
power domain can reference them.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-10-24 04:31:18 +09:00
Stephen Boyd 12b5aa61ee clk: samsung: exynos7: Staticize file scope symbols
drivers/clk/samsung/clk-exynos7.c:896:33:
warning: symbol 'fixed_rate_clks_fsys0' was not declared. Should
it be static?
drivers/clk/samsung/clk-exynos7.c:1010:33:
warning: symbol 'fixed_rate_clks_fsys1' was not declared. Should
it be static?

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-02 11:35:32 -07:00
Stephen Boyd caac0ef841 Fixes, improvements and addition of some missing features
of the exynos7 clock controller driver.
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Merge tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull updates from Sylwester Nawrocki:

"Fixes, improvements and addition of some missing features
of the exynos7 clock controller driver."

* tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: exynos7: Add required clock tree for UFS
  clk: samsung: exynos7: Add missing fixed_clks to cmu_info
  clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
  clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
  clk: samsung: exynos7: Correct CMU_PERIS clocks names
  clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
  clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
  clk: samsung: exynos7: Correct CMU_CCORE clocks names
  clk: samsung: exynos7: Correct CMU_TOP1 clocks names
  clk: samsung: exynos7: Correct CMU_TOP0 clocks names
  clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
  clk: samsung: exynos7: Change the CMU_TOPC block clock names
  clk: samsung: exynos7: Correct nr_clk_ids for fsys1
  clk: samsung: exynos7: Correct nr_clk_ids for fsys0
  clk: samsung: exynos7: Fix CMU TOP1 block
  clk: samsung: exynos7: Fix CMU TOPC block clock
2015-10-02 11:31:59 -07:00
Stephen Boyd 9f30a04d76 Merge branch 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm into clk-fixes
Pull fixes from Tero Kristo:

"A few TI clock driver fixes to pull against 4.3-rc"

* 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm: (3 commits)
  clk: ti: dflt: fix enable_reg validity check
  clk: ti: fix dual-registration of uart4_ick
  clk: ti: clk-7xx: Remove hardwired ABE clock configuration
2015-10-02 11:22:23 -07:00
Stephen Boyd 6f83d30a37 Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  clk: samsung: fix cpu clock's flags checking
2015-09-22 09:54:16 -07:00
Bartlomiej Zolnierkiewicz 9e294bf88a clk: samsung: fix cpu clock's flags checking
CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
incorrectly used as a bit numbers.  Fix it.

Tested on Exynos4210 based Origen board and on Exynos5250 based
Arndale board.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Fixes: ddeac8d96 ("clk: samsung: add infrastructure to register cpu clocks")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-22 09:53:51 -07:00
Alim Akhtar 7993b3ebec clk: samsung: exynos7: Add required clock tree for UFS
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:18:15 +02:00
Alim Akhtar ad108e10ae clk: samsung: exynos7: Add missing fixed_clks to cmu_info
FSYS0 fixed clocks are not added to fsys0_cmu_info, this makes
some of the usb clocks orphans. This fixes the same.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:11 +02:00
Alim Akhtar 753195a749 clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
This patch renames CMU_FSYS1 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys1_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:10 +02:00
Alim Akhtar a259a61be1 clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:09 +02:00
Alim Akhtar 6ce0f5cf11 clk: samsung: exynos7: Correct CMU_PERIS clocks names
This patch renames CMU_PERIS clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:08 +02:00
Alim Akhtar 33b8b739ef clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
This patch renames CMU_PERIC1 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric1_66.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:07 +02:00
Alim Akhtar 3f54fb1e09 clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
This patch renames CMU_PERIC0 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric0_66.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:07 +02:00
Alim Akhtar 56365ee893 clk: samsung: exynos7: Correct CMU_CCORE clocks names
This patch renames CMU_CCORE clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:06 +02:00
Alim Akhtar 9b3ad363c1 clk: samsung: exynos7: Correct CMU_TOP1 clocks names
This patch renames CMU_TOP1 clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:12:10 +02:00
Alim Akhtar cf5ee64c35 clk: samsung: exynos7: Correct CMU_TOP0 clocks names
This patch renames CMU_TOP0 clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:11:55 +02:00
Alim Akhtar 2cbb515745 clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
This adds some of the missing GATE clocks of CMU_TOPC block.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:02:29 +02:00
Alim Akhtar dc504b2277 clk: samsung: exynos7: Change the CMU_TOPC block clock names
Corrects the CMU_TOPC block clock names as per user manual.
This does not change any functionalities.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:02:01 +02:00
Alim Akhtar 167c9e4d6d clk: samsung: exynos7: Correct nr_clk_ids for fsys1
nr_clk_ids for FSYS1 block is wrongly set as TOP1 block,
this patch corrects it.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:01:34 +02:00
Alim Akhtar 7cca2e0744 clk: samsung: exynos7: Correct nr_clk_ids for fsys0
This patch corrects the nr_clk_ids for fsys0 block
which is wrongly set to number of clocks of the TOP1 CMU.
This also adjusts the gate clocks order.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:00:08 +02:00
Alim Akhtar cfc7588a31 clk: samsung: exynos7: Fix CMU TOP1 block
As per UM, sclk_mmc2 is bit 16 of SEL_TOP1_FSYS0. Also the DIV
and the GATE clocks are at bit 16 in their respective registers.
For mmc1 and mmc0 clock MUXs are in TOP1_FSYS11 instead of TOP1_FSYS1.
And their DIV and GATE clks are in xxx_TOP1_FSYS11 instead of TOP1_FSYS1.
This patch corrects it.
This also adds xxx_FSYS11 to be saved/restore during s2r cycles.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 10:59:28 +02:00
Alim Akhtar fa9f3a5264 clk: samsung: exynos7: Fix CMU TOPC block clock
Corrects the bit width of DIV_TOPC3 register.
These are wrongly set to 3 which should be 4 bit wide as per UM.
This also adjusts the MUX clock order.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 10:58:10 +02:00
Linus Torvalds d71fc239b6 ARM: SoC: late fixes and dependencies
This is a collection of a few late fixes and other misc. stuff that
 had dependencies on things being merged from other trees.
 
 The bulk of the changes are for samsung/exynos SoCs for some changes
 that needed a few minor reworks so ended up a bit late.  The others
 are mainly for qcom SoCs: a couple fixes and some DTS updates.
 
 There's one conflict with drivers/cpufreq/exynos-cpufreq.c because
 it's now been completely removed, but there were some fixes that hit
 mainline in the meantime.
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull late ARM SoC updates from Kevin Hilman:
 "This is a collection of a few late fixes and other misc stuff that had
  dependencies on things being merged from other trees.

  The bulk of the changes are for samsung/exynos SoCs for some changes
  that needed a few minor reworks so ended up a bit late.  The others
  are mainly for qcom SoCs: a couple fixes and some DTS updates"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
  ARM: multi_v7_defconfig: Enable PBIAS regulator
  soc: qcom: smd: Correct fBLOCKREADINTR handling
  soc: qcom: smd: Use correct remote processor ID
  soc: qcom: smem: Fix errant private access
  ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path
  ARM: dts: qcom: msm8960-cdp: Use stdout-path
  ARM: dts: qcom: msm8660-surf: Use stdout-path
  ARM: dts: qcom: ipq8064-ap148: Use stdout-path
  ARM: dts: qcom: apq8084-mtp: Use stdout-path
  ARM: dts: qcom: apq8084-ifc6540: Use stdout-path
  ARM: dts: qcom: apq8074-dragonboard: Use stdout-path
  ARM: dts: qcom: apq8064-ifc6410: Use stdout-path
  ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path
  ARM: dts: qcom: Label serial nodes for aliasing and stdout-path
  reset: ath79: Fix missing spin_lock_init
  reset: Add (devm_)reset_control_get stub functions
  ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12
  cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o
  ARM: dts: add iommu property to JPEG device for exynos4
  ARM: dts: enable SPI1 for exynos4412-odroidu3
  ...
2015-09-10 17:59:04 -07:00