Commit Graph

7143 Commits

Author SHA1 Message Date
Liu Jian d9b8a67b3b mtd: cfi: fix deadloop in cfi_cmdset_0002.c do_write_buffer
In function do_write_buffer(), in the for loop, there is a case
chip_ready() returns 1 while chip_good() returns 0, so it never
break the loop.
To fix this, chip_good() is enough and it should timeout if it stay
bad for a while.

Fixes: dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to check correct value")
Signed-off-by: Yi Huaijie <yihuaijie@huawei.com>
Signed-off-by: Liu Jian <liujian56@huawei.com>
Reviewed-by: Tokunori Ikegami <ikegami_to@yahoo.co.jp>
Signed-off-by: Richard Weinberger <richard@nod.at>
2019-04-05 00:39:19 +02:00
Linus Torvalds a840b56ba3 This pull request contains updates for both UBI and UBIFS:
- A new interface for UBI to deal better with read disturb
 - Reject unsupported ioctl flags in UBIFS (xfstests found it)
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Merge tag 'upstream-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI and UBIFS updates from Richard Weinberger:

 - A new interface for UBI to deal better with read disturb

 - Reject unsupported ioctl flags in UBIFS (xfstests found it)

* tag 'upstream-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: wl: Silence uninitialized variable warning
  ubifs: Reject unsupported ioctl flags explicitly
  ubi: Expose the bitrot interface
  ubi: Introduce in_pq()
2019-03-13 09:34:35 -07:00
Dan Carpenter 5578e48e5c ubi: wl: Silence uninitialized variable warning
This condition needs to be fipped around because "err" is uninitialized
when "force" is set.  The Smatch static analysis tool complains and
UBsan will also complain at runtime.

Fixes: 663586c0a8 ("ubi: Expose the bitrot interface")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2019-03-05 21:21:07 +01:00
Linus Torvalds dcc75ddea1 spi: Updates for v5.1
A fairly quiet release for SPI, the biggest thing is the conversion to
 use GPIO descriptors which is now 90% done but still needs some
 stragglers converting.
 
  - Support for inter-word delays.
  - Conversion of the core and most drivers to use GPIO descriptors for
    GPIO controlled chip selects.
  - New drivers for NXP FlexSPI and QuadSPI, SiFive and Spreadtrum.
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Merge tag 'spi-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "A fairly quiet release for SPI, the biggest thing is the conversion to
  use GPIO descriptors which is now 90% done but still needs some
  stragglers converting.

  Summary:

   - Support for inter-word delays

   - Conversion of the core and most drivers to use GPIO descriptors for
     GPIO controlled chip selects

   - New drivers for NXP FlexSPI and QuadSPI, SiFive and Spreadtrum"

* tag 'spi-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (104 commits)
  spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3
  spi: sifive: Remove redundant dev_err call in sifive_spi_probe()
  spi: sifive: Remove spi_master_put in sifive_spi_remove()
  spi: spi-gpio: fix SPI_CS_HIGH capability
  spi: pxa2xx: Setup maximum supported DMA transfer length
  spi: sifive: Add driver for the SiFive SPI controller
  spi: sifive: Add DT documentation for SiFive SPI controller
  spi: sprd: Add a prefix for SPI DMA channel macros
  spi: sprd: spi: sprd: Add DMA mode support
  dt-bindings: spi: Add the DMA properties for the SPI dma mode
  spi: sprd: Add the SPI irq function for the SPI DMA mode
  dt-bindings: spi: imx: Add an entry for the i.MX8QM compatible
  spi: use gpio[d]_set_value_cansleep for setting chipselect GPIO
  spi: gpio: Advertise support for SPI_CS_HIGH
  spi: sh-msiof: Replace spi_master by spi_controller
  spi: sh-hspi: Replace spi_master by spi_controller
  spi: rspi: Replace spi_master by spi_controller
  spi: atmel-quadspi: add support for sam9x60 qspi controller
  dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60
  spi: atmel-quadspi: add support for named peripheral clock
  ...
2019-03-04 19:23:56 -08:00
Linus Torvalds 811c16a2a2 MTD changes:
- Use struct_size() where appropriate
 - mtd_{read,write}() as wrappers around mtd_{read,write}_oob()
 - Fix misuse of PTR_ERR() in docg3
 - Coding style improvements in mtdcore.c
 
 SPI NOR changes:
   Core changes:
   - Add support of octal mode I/O transfer
   - Add a bunch of SPI NOR entries to the flash_info table
 
   SPI NOR controller driver changes:
   - cadence-quadspi:
     * Add support for Octal SPI controller
     * write upto 8-bytes data in STIG mode
   - mtk-quadspi:
     * rename config to a common one
     * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask
   - Add Tudor as SPI-NOR co-maintainer
 
 NAND changes
   NAND core changes:
   - Fourth batch of fixes/cleanup to the raw NAND core impacting various
     controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
   - Checking the return code of nand_reset() and nand_readid_op().
   - Removing ->legacy.erase and single_erase().
   - Simplifying the locking.
   - Several implicit fall through annotations.
 
   Raw NAND controllers drivers changes:
   - Fixing various possible object reference leaks (MTK, JZ4780, Atmel).
   - ST:
     * Adding support for STM32 FMC2 NAND flash controller.
   - Meson:
     * Adding support for Amlogic NAND flash controller.
   - Denali:
     * Several cleanup patches.
   - Sunxi:
     * Several cleanup patches.
   - FSMC:
     * Disabling NAND on remove().
     * Resetting NAND timings on resume().
 
   SPI-NAND drivers changes:
   - Toshiba:
     * Adding support for all Toshiba products.
   - Macronix:
     * Fixing ECC status read.
   - Gigadevice:
     * Adding support for GD5F1GQ4UExxG.
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Merge tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd

Pull MTD updates from Boris Brezillon:
 "Core MTD changes:
   - Use struct_size() where appropriate
   - mtd_{read,write}() as wrappers around mtd_{read,write}_oob()
   - Fix misuse of PTR_ERR() in docg3
   - Coding style improvements in mtdcore.c

  SPI NOR changes:
    Core changes:
     - Add support of octal mode I/O transfer
     - Add a bunch of SPI NOR entries to the flash_info table

    SPI NOR controller driver changes:
     - cadence-quadspi:
        * Add support for Octal SPI controller
        * write upto 8-bytes data in STIG mode
     - mtk-quadspi:
        * rename config to a common one
        * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask
     - Add Tudor as SPI-NOR co-maintainer

  NAND changes:
    NAND core changes:
     - Fourth batch of fixes/cleanup to the raw NAND core impacting
       various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
     - Check the return code of nand_reset() and nand_readid_op().
     - Remove ->legacy.erase and single_erase().
     - Simplify the locking.
     - Several implicit fall through annotations.

    Raw NAND controllers drivers changes:
     - Fix various possible object reference leaks (MTK, JZ4780, Atmel)
     - ST:
        * Add support for STM32 FMC2 NAND flash controller
     - Meson:
        * Add support for Amlogic NAND flash controller
     - Denali:
        * Several cleanup patches
     - Sunxi:
        * Several cleanup patches
     - FSMC:
        * Disable NAND on remove()
        * Reset NAND timings on resume()

    SPI-NAND drivers changes:
     - Toshiba:
        * Add support for all Toshiba products.
     - Macronix:
        * Fix ECC status read.
     - Gigadevice:
        * Add support for GD5F1GQ4UExxG"

* tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd: (64 commits)
  mtd: spi-nor: Fix wrong abbreviation HWCPAS
  mtd: spi-nor: cadence-quadspi: fix spelling mistake: "Couldnt't" -> "Couldn't"
  mtd: spi-nor: Add support for en25qh64
  mtd: spi-nor: Add support for MX25V8035F
  mtd: spi-nor: Add support for EN25Q80A
  mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller
  dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC
  mtd: spi-nor: split s25fl128s into s25fl128s0 and s25fl128s1
  mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode
  mtd: spi-nor: Add support for mx25u3235f
  mtd: rawnand: denali_dt: remove single anonymous clock support
  mtd: rawnand: mtk: fix possible object reference leak
  mtd: rawnand: jz4780: fix possible object reference leak
  mtd: rawnand: atmel: fix possible object reference leak
  mtd: rawnand: fsmc: Disable NAND on remove()
  mtd: rawnand: fsmc: Reset NAND timings on resume()
  mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG
  mtd: rawnand: denali: remove unused dma_addr field from denali_nand_info
  mtd: rawnand: denali: remove unused function argument 'raw'
  mtd: rawnand: denali: remove unneeded denali_reset_irq() call
  ...
2019-03-04 18:59:37 -08:00
Mark Brown 14dbfb417b
Merge branch 'spi-5.1' into spi-next 2019-03-04 15:32:51 +00:00
Boris Brezillon 9220d7befc NAND core changes:
- Fourth batch of fixes/cleanup to the raw NAND core impacting various
   controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
 - Checking the return code of nand_reset() and nand_readid_op().
 - Removing ->legacy.erase and single_erase().
 - Simplifying the locking.
 - Several implicit fall through annotations.
 
 Raw NAND controllers drivers changes:
 - Fixing various possible object reference leaks (MTK, JZ4780, Atmel).
 - ST:
   * Adding support for STM32 FMC2 NAND flash controller.
 - Meson:
   * Adding support for Amlogic NAND flash controller.
 - Denali:
   * Several cleanup patches.
 - Sunxi:
   * Several cleanup patches.
 - FSMC:
   * Disabling NAND on remove().
   * Resetting NAND timings on resume().
 
 SPI-NAND drivers changes:
 - Toshiba:
   * Adding support for all Toshiba products.
 - Macronix:
   * Fixing ECC status read.
 - Gigadevice:
   * Adding support for GD5F1GQ4UExxG.
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Merge tag 'nand/for-5.1' of git://git.infradead.org/linux-mtd into mtd/next

NAND core changes:
- Fourth batch of fixes/cleanup to the raw NAND core impacting various
  controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
- Checking the return code of nand_reset() and nand_readid_op().
- Removing ->legacy.erase and single_erase().
- Simplifying the locking.
- Several implicit fall through annotations.

Raw NAND controllers drivers changes:
- Fixing various possible object reference leaks (MTK, JZ4780, Atmel).
- ST:
  * Adding support for STM32 FMC2 NAND flash controller.
- Meson:
  * Adding support for Amlogic NAND flash controller.
- Denali:
  * Several cleanup patches.
- Sunxi:
  * Several cleanup patches.
- FSMC:
  * Disabling NAND on remove().
  * Resetting NAND timings on resume().

SPI-NAND drivers changes:
- Toshiba:
  * Adding support for all Toshiba products.
- Macronix:
  * Fixing ECC status read.
- Gigadevice:
  * Adding support for GD5F1GQ4UExxG.
2019-02-25 09:28:54 +01:00
Boris Brezillon dfbd39956a SPI NOR Changes
Core changes:
   - Add support of octal mode I/O transfer
   - Add a bunch of SPI NOR entries to the flash_info table
 
   SPI NOR controller driver changes:
   - cadence-quadspi:
     * Add support for Octal SPI controller
     * write upto 8-bytes data in STIG mode
   - mtk-quadspi:
     * rename config to a common one
     * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask
 
 MAINTAINERS:
 - Add Tudor as SPI-NOR co-maintainer
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Merge tag 'spi-nor/for-5.1' of git://git.infradead.org/linux-mtd into mtd/next

SPI NOR Changes
  Core changes:
  - Add support of octal mode I/O transfer
  - Add a bunch of SPI NOR entries to the flash_info table

  SPI NOR controller driver changes:
  - cadence-quadspi:
    * Add support for Octal SPI controller
    * write upto 8-bytes data in STIG mode
  - mtk-quadspi:
    * rename config to a common one
    * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask

MAINTAINERS:
- Add Tudor as SPI-NOR co-maintainer
2019-02-25 09:28:25 +01:00
Richard Weinberger 663586c0a8 ubi: Expose the bitrot interface
Using UBI_IOCRPEB and UBI_IOCSPEB userspace can force
reading and scrubbing of PEBs.

In case of bitflips UBI will automatically take action
and move data to a different PEB.
This interface allows a daemon to foster your NAND.

Signed-off-by: Richard Weinberger <richard@nod.at>
2019-02-24 11:40:45 +01:00
Richard Weinberger b32b78f892 ubi: Introduce in_pq()
This function works like in_wl_tree() but checks whether an ubi_wl_entry
is currently in the protection queue.
We need this function to query the current state of an ubi_wl_entry.

Signed-off-by: Richard Weinberger <richard@nod.at>
2019-02-24 11:13:44 +01:00
Colin Ian King d678d222de mtd: spi-nor: cadence-quadspi: fix spelling mistake: "Couldnt't" -> "Couldn't"
There is a spelling mistake in a dev_error message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-21 08:58:07 +01:00
Roger Pueyo Centelles 30a2c8aa3c mtd: spi-nor: Add support for en25qh64
The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
on recent wireless routers. Its 32, 128 and 256 Mbit siblings
are already supported.

Tested on a COMFAST CF-E120A v3 router board.

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-21 08:57:18 +01:00
Frieder Schrempf e36bb65e5d mtd: spi-nor: Add support for MX25V8035F
This adds support for the Macronix MX25V8035F, a 8Mb SPI NOR chip.
It is used on i.MX6UL/ULL SoMs by Kontron Electronics GmbH (N631x).
It was only tested with a single data line connected, by writing and
reading random data with dd.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-21 08:52:58 +01:00
Frieder Schrempf 08326d8a94 mtd: spi-nor: Add support for EN25Q80A
This adds support for the EON EN25Q80A, a 8Mb SPI NOR chip.
It is used on i.MX6 boards by Kontron Electronics GmbH
(N60xx, N61xx).
It was only tested with a single data line connected, by writing and
reading random data with dd.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-21 08:52:57 +01:00
Vignesh R 2cc7883874 mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller
Cadence OSPI controller IP supports Octal IO (x8 IO lines),
It also has an integrated PHY. IP register layout is very
similar to existing QSPI IP except for additional bits to support Octal
and Octal DDR mode. Therefore, extend current driver to support Octal
mode. Only Octal SDR read (1-1-8)mode is supported for now.

Tested with mt35xu512aba Octal flash on TI's AM654 EVM.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-13 15:13:28 +01:00
Ahmet Celenk 50685024f2 mtd: spi-nor: split s25fl128s into s25fl128s0 and s25fl128s1
Due to two different versions (S25FL128SAGBHI200 and S25FL128SAGBHI210) of
the s25fl128s qspi memory, the single "s25fl128s" device entry must be
split into two to match the correct JEDEC ID's for each version. Solves
paging related issues of S25FL128SAGBHI210 chips.

Signed-off-by: Ahmet Celenk <ahmet.celenk@procenne.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-13 15:13:14 +01:00
Aneesh Kumar K.V 3e35730dd7 mtd: powernv_flash: Fix device registration error
This change helps me to get multiple mtd device registered. Without this
I get

sysfs: cannot create duplicate filename '/bus/nvmem/devices/flash0'
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.0.0-rc2-00557-g1ef20ef21f22 #13
Call Trace:
[c0000000b38e3220] [c000000000b58fe4] dump_stack+0xe8/0x164 (unreliable)
[c0000000b38e3270] [c0000000004cf074] sysfs_warn_dup+0x84/0xb0
[c0000000b38e32f0] [c0000000004cf6c4] sysfs_do_create_link_sd.isra.0+0x114/0x150
[c0000000b38e3340] [c000000000726a84] bus_add_device+0x94/0x1e0
[c0000000b38e33c0] [c0000000007218f0] device_add+0x4d0/0x830
[c0000000b38e3480] [c0000000009d54a8] nvmem_register.part.2+0x1c8/0xb30
[c0000000b38e3560] [c000000000834530] mtd_nvmem_add+0x90/0x120
[c0000000b38e3650] [c000000000835bc8] add_mtd_device+0x198/0x4e0
[c0000000b38e36f0] [c00000000083619c] mtd_device_parse_register+0x11c/0x280
[c0000000b38e3780] [c000000000840830] powernv_flash_probe+0x180/0x250
[c0000000b38e3820] [c00000000072c120] platform_drv_probe+0x60/0xf0
[c0000000b38e38a0] [c0000000007283c8] really_probe+0x138/0x4d0
[c0000000b38e3930] [c000000000728acc] driver_probe_device+0x13c/0x1b0
[c0000000b38e39b0] [c000000000728c7c] __driver_attach+0x13c/0x1c0
[c0000000b38e3a30] [c000000000725130] bus_for_each_dev+0xa0/0x120
[c0000000b38e3a90] [c000000000727b2c] driver_attach+0x2c/0x40
[c0000000b38e3ab0] [c0000000007270f8] bus_add_driver+0x228/0x360
[c0000000b38e3b40] [c00000000072a2e0] driver_register+0x90/0x1a0
[c0000000b38e3bb0] [c00000000072c020] __platform_driver_register+0x50/0x70
[c0000000b38e3bd0] [c00000000105c984] powernv_flash_driver_init+0x24/0x38
[c0000000b38e3bf0] [c000000000010904] do_one_initcall+0x84/0x464
[c0000000b38e3cd0] [c000000001004548] kernel_init_freeable+0x530/0x634
[c0000000b38e3db0] [c000000000011154] kernel_init+0x1c/0x168
[c0000000b38e3e20] [c00000000000bed4] ret_from_kernel_thread+0x5c/0x68
mtd mtd1: Failed to register NVMEM device

With the change we now have

root@(none):/sys/bus/nvmem/devices# ls -al
total 0
drwxr-xr-x 2 root root 0 Feb  6 20:49 .
drwxr-xr-x 4 root root 0 Feb  6 20:49 ..
lrwxrwxrwx 1 root root 0 Feb  6 20:49 flash@0 -> ../../../devices/platform/ibm,opal:flash@0/mtd/mtd0/flash@0
lrwxrwxrwx 1 root root 0 Feb  6 20:49 flash@1 -> ../../../devices/platform/ibm,opal:flash@1/mtd/mtd1/flash@1

Fixes: 1cbb4a1c43 ("mtd: powernv: Add powernv flash MTD abstraction driver")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-13 14:19:40 +01:00
Aneesh Kumar K.V 6e9526852f mtd: Use mtd->name when registering nvmem device
With this patch, we use the mtd->name instead of concatenating the name
with '0'.

Fixes: c4dfa25ab3 ("mtd: add support for reading MTD devices via the nvmem API")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-13 14:10:22 +01:00
Purna Chandra Mandal 9558281572 mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode
cadence-quadspi controller allows upto eight bytes of data to
be written in software Triggered Instruction generator (STIG) mode
of operation. Lower 4 bytes are written through writedatalower and
upper 4 bytes by writedataupper register.

This patch allows all the 8 bytes to be written.

Signed-off-by: Purna Chandra Mandal <purna.chandra.mandal@intel.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-10 15:06:31 +01:00
André Valentin 748df6d831 mtd: spi-nor: Add support for mx25u3235f
The mx25u3235f is found on the ZyXEL NBG6817 router, therefore
add driver support for it so that we can upstream board support.

Minimal tested with u-boot tools fw_printenv/fw_setenv on GlobalScale
ESPRESSObin v5 board.

Signed-off-by: André Valentin <avalentin@marcant.net>
[miyatsu@qq.com: Remove unnecessary white space.]
Signed-off-by: Ding Tao <miyatsu@qq.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2019-02-10 15:03:48 +01:00
Masahiro Yamada 53bcbb8394 mtd: rawnand: denali_dt: remove single anonymous clock support
Commit 6f1fe97bec ("mtd: rawnand: denali_dt: add more clocks based
on IP datasheet") introduced a more correct binding that requires
three named clocks.

Now that all upstream DT files migrated over to it, remove the single
anonymous clock support.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-07 23:17:51 +01:00
Wen Yang 0119720a00 mtd: rawnand: mtk: fix possible object reference leak
of_find_device_by_node() takes a reference to the struct device
when it finds a match via get_device, there is no need to call
get_device() twice.
We also should make sure to drop the reference to the device
taken by of_find_device_by_node() on driver unbind.

Fixes: 1d6b1e4649 ("mtd: mediatek: driver for MTK Smart Device")
Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-07 23:14:16 +01:00
Wen Yang 11493f2685 mtd: rawnand: jz4780: fix possible object reference leak
of_find_device_by_node() takes a reference to the struct device
when it finds a match via get_device, there is no need to call
get_device() twice.
We also should make sure to drop the reference to the device
taken by of_find_device_by_node() on driver unbind.

Fixes: ae02ab00aa ("mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs")
Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-07 23:14:14 +01:00
Wen Yang a12085d139 mtd: rawnand: atmel: fix possible object reference leak
of_find_device_by_node() takes a reference to the struct device
when it finds a match via get_device, there is no need to call
get_device() twice.
We also should make sure to drop the reference to the device
taken by of_find_device_by_node() on driver unbind.

Fixes: f88fc122cc ("mtd: nand: Cleanup/rework the atmel_nand driver")
Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Suggested-by: Boris Brezillon <bbrezillon@kernel.org>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-07 23:14:11 +01:00
Martin Kepplinger d5d27fd982 mtd: rawnand: gpmi: fix MX28 bus master lockup problem
Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
reset may cause bus master lock up") for MX28 too. It has the same
problem.

Observed problem: once per 100,000+ MX28 reboots NAND read failed on
DMA timeout errors:
[    1.770823] UBI: attaching mtd3 to ubi0
[    2.768088] gpmi_nand: DMA timeout, last DMA :1
[    3.958087] gpmi_nand: BCH timeout, last DMA :1
[    4.156033] gpmi_nand: Error in ECC-based read: -110
[    4.161136] UBI warning: ubi_io_read: error -110 while reading 64
bytes from PEB 0:0, read only 0 bytes, retry
[    4.171283] step 1 error
[    4.173846] gpmi_nand: Chip: 0, Error -1

Without BCH soft reset we successfully executed 1,000,000 MX28 reboots.

I have a quote from NXP regarding this problem, from July 18th 2016:

"As the i.MX23 and i.MX28 are of the same generation, they share many
characteristics. Unfortunately, also the erratas may be shared.
In case of the documented erratas and the workarounds, you can also
apply the workaround solution of one device on the other one. This have
been reported, but I’m afraid that there are not an estimated date for
updating the Errata documents.
Please accept our apologies for any inconveniences this may cause."

Fixes: 6f2a6a5256 ("mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems")
Cc: stable@vger.kernel.org
Signed-off-by: Manfred Schlaegl <manfred.schlaegl@ginzinger.com>
Signed-off-by: Martin Kepplinger <martin.kepplinger@ginzinger.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
2019-02-06 09:39:22 +01:00
Boris Brezillon ad46351530 mtd: Make sure mtd->erasesize is valid even if the partition is of size 0
Commit 33f45c44d6 ("mtd: Do not allow MTD devices with inconsistent
erase properties") introduced a check to make sure ->erasesize and
->_erase values are consistent with the MTD_NO_ERASE flag.
This patch did not take the 0 bytes partition case into account which
can happen when the defined partition is outside the flash device memory
range. Fix that by setting the partition erasesize to the parent
erasesize.

Fixes: 33f45c44d6 ("mtd: Do not allow MTD devices with inconsistent erase properties")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: <stable@vger.kernel.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-02-06 00:02:51 +01:00
Linus Walleij ab3ab7b654 mtd: rawnand: fsmc: Disable NAND on remove()
This disables the NAND on remove() and the errorpath,
making sure the chipselect gets deasserted when the
NAND is not in use.

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:12 +01:00
Linus Walleij 30c72ab142 mtd: rawnand: fsmc: Reset NAND timings on resume()
When we go through a suspend/resume cycle the NAND
timings and other settings may have been lost so reset
the chip to bring it up in a known working state.

The FSMC only supports single CS chips so we only need
to call nand_reset(chip, 0).

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:12 +01:00
Stefan Roese c40c7a990a mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG
Add support for GigaDevice GD5F1GQ4UExxG SPI NAND chip.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chuanhong Guo <gch981213@gmail.com>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:12 +01:00
Masahiro Yamada 7a10a92f12 mtd: rawnand: denali: remove unused dma_addr field from denali_nand_info
This is a leftover of commit 997cde2a22 ("mtd: nand: denali: skip
driver internal bounce buffer when possible").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:11 +01:00
Masahiro Yamada a8fce9fe2c mtd: rawnand: denali: remove unused function argument 'raw'
This argument is not used at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:11 +01:00
Masahiro Yamada 4b3ee71be0 mtd: rawnand: denali: remove unneeded denali_reset_irq() call
This code was added by commit 26d266e10e ("mtd: nand: denali: fix
raw and oob accessors for syndrome page layout"), but I do not see
sensible reason.

The IRQ flags are correctly reset by denali_cmd_ctrl(), so this code
is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:11 +01:00
Masahiro Yamada f9ffb406d3 mtd: rawnand: check return code of nand_reset() and nand_readid_op()
nand_scan_ident() iterates over maxchips to find as many homogeneous
chips as possible.

Since commit 2d472aba15 ("mtd: nand: document the NAND
controller/NAND chip DT representation"), new drivers should pass in
the exact number of CS lines instead of possible max, but old
platforms may still rely on nand_scan_ident() to detect the actual
number of connected CS lines.

In that case, this loop bails out when manufacturer or device ID
unmatches. The reason of unmatch is most likely no chip is connected
to that CS line. If so, nand_reset() should already have failed,
and the following nand_readid_op() is pointless.

Before ->exec_op hook was introduced, drivers had no way to tell
the failure of NAND_CMD_RESET to the framework because the legacy
->cmdfunc() has void return type. Now drivers implementing ->exec_op
hook can return the error code. You can save nand_readid_op() by
checking the return value of nand_reset(). The return value of
nand_readid_op() should be checked as well. If it fails, probably
id[0] and id[1] are undefined values.

Just for consistency, it should be sensible to check the return
code in nand_do_write_oob() as well.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:11 +01:00
Masahiro Yamada 2d73f3d66b mtd: rawnand: remove ->legacy.erase and single_erase()
Now that the last user of this hook, denali.c, stopped using it,
we can remove the erase hook from nand_legacy.

I squashed single_erase() because only the difference between
single_erase() and nand_erase_op() is the number of bit shifts.

The status/ret conversion in nand_erase_nand() is unneeded since
commit eb94555e9e ("mtd: nand: use usual return values for the
->erase() hook"). Cleaned it up now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:11 +01:00
Masahiro Yamada d4ea6ed022 mtd: rawnand: denali: remove ->erase hook
Commit f9ebd1bb41 ("mtd: rawnand: Deprecate ->erase()") discouraged
the use of this hook, so I am happy to follow the suggestion.

Although the Denali IP provides a special MAP10 command for erasing,
using it would not buy us much. The Denali IP actually works with the
generic erasing by single_erase() + ->cmdfunc hook (nand_command_lp)
+ ->cmd_ctrl hook (denali_cmd_ctrl).

This method is also deprecated, but denali_erase() can go away
irrespective of ->exec_op conversion.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:10 +01:00
Mathieu Malaterre 3175e12183 mtd: rawnand: Annotate implicit fall through in nand_scan_tail
There is a plan to build the kernel with -Wimplicit-fallthrough and
these places in the code produced warnings (W=1).

This commit removes the following warnings:

  drivers/mtd/nand/raw/nand_base.c:5556:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
  drivers/mtd/nand/raw/nand_base.c:5575:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
  drivers/mtd/nand/raw/nand_base.c:5613:13: warning: this statement may fall through [-Wimplicit-fallthrough=]

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:10 +01:00
Mathieu Malaterre 5b15f8650b mtd: rawnand: Annotate implicit fall through in nand_command/nand_command_lp
There is a plan to build the kernel with -Wimplicit-fallthrough and
these places in the code produced warnings (W=1).

This commit removes the following warnings:

  drivers/mtd/nand/raw/nand_legacy.c:332:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
  drivers/mtd/nand/raw/nand_legacy.c:483:3: warning: this statement may fall through [-Wimplicit-fallthrough=]

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:10 +01:00
Yoshio Furuyama db214513f6 mtd: spinand: Add support for all Toshiba Memory products
Add device table for Toshiba Memory products.
Also, generalize OOB layout structure and function names.

Signed-off-by: Yoshio Furuyama <tmcmc-mb-yfuruyama7@ml.toshiba.co.jp>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:10 +01:00
Liang Yang 8fae856c53 mtd: rawnand: meson: add support for Amlogic NAND flash controller
Add initial support for the Amlogic NAND flash controller which is
available on Meson SoCs.

Signed-off-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 16:56:09 +01:00
Boris Brezillon 013e6292aa mtd: rawnand: Simplify the locking
nand_get_device() was complex for apparently no good reason. Let's
replace this locking scheme with 2 mutexes: one attached to the
controller and another one attached to the chip.

Every time the core calls nand_get_device(), it will first lock the
chip and if the chip is not suspended, will then lock the controller.
nand_release_device() will release both lock in the reverse order.

nand_get_device() can sleep, just like the previous implementation,
which means you should never call that from an atomic context.

We also get rid of

- the chip->state field, since all it was used for was flagging the
  chip as suspended. We replace it by a field called chip->suspended
  and directly set it from nand_suspend/resume()
- the controller->wq and controller->active fields which are no longer
  needed since the new controller->lock (now a mutex) guarantees that
  all operations are serialized at the controller level
- panic_nand_get_device() which would anyway be a no-op. Talking about
  panic write, I keep thinking the rawnand implementation is unsafe
  because there's not negotiation with the controller to know when it's
  actually done with it's previous operation. I don't intend to fix
  that here, but that's probably something we should look at, or maybe
  we should consider dropping the ->_panic_write() implementation

Last important change to mention: we now return -EBUSY when someone
tries to access a device that as been suspended, and propagate this
error to the upper layer.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:40 +01:00
Boris Brezillon 661803b233 mtd: rawnand: Stop using chip->state in drivers
We are about to simplify the locking in the rawnand framework, and part
of this simplication is about getting rid of chip->state, so let's
first patch drivers that check the state.

All of them do that to get a timeout value based on the operation that
is being executed. Since a timeout is, by definition, something that
is here to prevent hanging on an event that might never happen,
picking the maximum timeout value no matter the operation should be
harmless.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:40 +01:00
Boris Brezillon efe5d132cb mtd: rawnand: omap2: Use nand_controller_init()
Stop initializing omap_gpmc_controller fields are declaration time and
replace that by a call to nand_controller_init(). Since the same object
might be shared by several NAND chips and the NAND controller driver
expects a ->probe() per-chip, we need to keep track of the
omap_gpmc_controller state (whether it's already been initialized or
not).

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:40 +01:00
Boris Brezillon a0916c94e9 mtd: rawnand: tmio: Do not abuse nand_controller->wq
nand_controller->wq has never been meant to be used by NAND controller
drivers. This waitqueue is used by the framework to serialize accesses
to a NAND controller, and messing up with its state is a really bad
idea.

Declare a completion object in tmio_nand and use it to wait for RB
transitions.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:40 +01:00
Boris Brezillon b5c2defc02 mtd: rawnand: mtk: Use nand_controller_init() instead of open-coding it
nand_controller_init() has been added to simplify nand_controller
struct initialization. Use this function instead of duplicating the
logic.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Gustavo A. R. Silva 7b30196534 mtd: rawnand: marvell: use struct_size() in devm_kzalloc()
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct foo {
    int stuff;
    void *entry[];
};

instance = devm_kzalloc(dev, sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL);

Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:

instance = devm_kzalloc(dev, struct_size(instance, entry, count), GFP_KERNEL);

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Boris Brezillon 511d05e0da mtd: rawnand: sunxi: Handle the tREA > tRC / 2 case
In non-EDO, tREA should be less than tRP to guarantee that the
controller does not sample the IO lines too early. Unfortunately, the
sunxi NAND controller does not allow us to have different values for
tRP and tREH (tRP = tREH = tRW / 2).

We have 2 options to overcome this limitation:

1/ Extend tRC to fulfil the tREA <= tRC / 2 constraint
2/ Use EDO mode (only works if timings->tRLOH > 0)

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Emil Lenngren f4cb4d7b46 mtd: spinand: macronix: Fix ECC Status Read
The datasheet specifies the upper four bits are reserved.
Testing on real hardware shows that these bits can indeed be nonzero.

Signed-off-by: Emil Lenngren <emil.lenngren@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Boris Brezillon 67c88008c3 mtd: rawnand: sunxi: Fix kernel doc headers
Fix the struct description and use standard kernel-doc header format
(even if the file is not parsed by the doc generator).

We also replace tabs by a single space.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Boris Brezillon df5057999f mtd: rawnand: sunxi: Migrate to ->exec_op()
And get rif of all legacy hooks and unused fields.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:39 +01:00
Boris Brezillon f5f888719a mtd: rawnand: sunxi: Add an SPDX tag
Replace the license text by an SPDX tag and fix MODULE_LICENSE() to
match GPL-2.0+.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05 15:39:38 +01:00