Commit Graph

7 Commits

Author SHA1 Message Date
Wei Yongjun 7d6203af30 ahci: imx: fix the error handling in imx_ahci_probe()
Release alloced resources instead of direct return from
imx_ahci_probe() in the error handling case.

Fixes: 4a23d1793f ('ahci: imx: Add i.MX53 support')
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Marek Vasut <marex@denx.de>
2013-12-12 10:59:09 -05:00
Fengguang Wu ee4e5a9abf ahci: imx: ahci_imx_softreset() can be static
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2013-12-03 10:25:37 -05:00
Marek Vasut 4a23d1793f ahci: imx: Add i.MX53 support
Add minor adjustments to support i.MX53 SATA port as well as i.MX6Q one.
The difference here is mostly the clock which need to be enabled and also
the lack of need of programming IOMUXC registers on i.MX53. All of which
is well handles in the clock enable/disable functions. Note that this patch
also cleans up the names of the common functions, so they don't read imx6q_*
but imx_* instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2013-12-03 07:40:58 -05:00
Marek Vasut 8403e2ec8d ahci: imx: Pull out the clock enable/disable calls
The same code for enabling and disabling SATA clock was found in multiple
places in the driver. Implement functions that enable/disable the SATA clock
and use them in such places instead of duplicating the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2013-12-03 07:40:57 -05:00
Marek Vasut 10becdb402 ahci: imx: Explicitly clear IMX6Q_GPR13_SATA_MPLL_CLK_EN
We must clear this IMX6Q_GPR13_SATA_MPLL_CLK_EN bit on i.MX6Q, otherwise
Linux will fail to find the attached drive on some boards.

This entire fix was:
Reported-by: Eric Nelson <eric.nelson@boundarydevices.com>

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
2013-12-03 07:39:19 -05:00
Richard Zhu 8b789d8981 ahci: imx: setup power saving methods
In order to save power consumption as much as possible.

* Disable sata phy internal pll reference clock when sysetem enter
  into suspend mode, enable it after resume.

* Setup module parameter used to enable imx ahci test power down
  mode(PDDQ) or not, when there is no device detected on the port

* minor modifications:
  - The format of the copyright is changed, because that the original
    one can't pass fsl internal patch reivew without the character
    '(c)'.
  - Exports ahci_platform_ops and ahci_error_handler().

NOTE:
* The hot-plug can't be supported when PDDQ mode is ever enabled.

* module parameter usage how-to:
  - default: enable PDDQ mode when no device detected.
  - add "ahci-imx.hotplug=1" into kernel command line if your don't
    want to enable PDDQ mode when no device detected on the port.

tj: Slightly updated description and comments.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2013-10-15 08:47:00 -04:00
Richard Zhu 9e54eae23b ahci_imx: add ahci sata support on imx platforms
imx6q contains one Synopsys AHCI SATA controller, But it can't share
ahci_platform driver with other controllers because there are some
misalignments of the generic AHCI controller - the bits definitions of
the HBA registers, the Vendor Specific registers, the AHCI PHY clock
and the AHCI signals adjustment window(GPR13 register).

 - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0',
   should be configured to be '1'

 - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL
   should be set to be '1'.(default 0)

 - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be
   configured regarding to the frequency of AHB bus clock.

 - Configurations of the AHCI PHY clock, and the signal parameters of
   the GPR13

Setup its own ahci sata driver, contained the imx6q specific
initialized codes, re-use the generic ahci_platform driver, and keep
the generic ahci_platform driver clean as much as possible.

tj: patch description reformatted

Signed-off-by: Richard Zhu <r65037@freescale.com>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2013-07-24 12:29:08 -04:00