Commit Graph

2843 Commits

Author SHA1 Message Date
Andre Detsch 683e3ab2b5 [POWERPC] spufs: Fix affinity after introduction of node_allowed() calls
This patch fixes affinity reference point placement, which was not being
done in some situations, after the introduction of node_allowed() calls.

The previously used parameter, 'ctx', is just the iterator of the
previous list_for_each_entry_reverse loop, and its value might be
invalid at the end of the loop. Also, the right context to seek
for information when defining the reference ctx location
_is_ the reference ctx.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-03 19:18:10 +10:00
Paul Mackerras 430404ed9c [POWERPC] Fix special PTE code for secondary hash bucket
The code for mapping special 4k pages on kernels using a 64kB base
page size was missing the code for doing the RPN (real page number)
manipulation when inserting the hardware PTE in the secondary hash
bucket.  It needs the same code as has already been added to the
code that inserts the HPTE in the primary hash bucket.  This adds it.

Spotted by Ben Herrenschmidt.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-03 19:16:11 +10:00
Linus Torvalds 2f63251ed0 Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog: (28 commits)
  [WATCHDOG] Fix pcwd_init_module crash
  [WATCHDOG] ICH9 support for iTCO_wdt
  [WATCHDOG] 631xESB/632xESB support for iTCO_wdt - add all LPC bridges
  [WATCHDOG] 631xESB/632xESB support for iTCO_wdt
  [WATCHDOG] omap_wdt.c - default error for IOCTL is -ENOTTY
  [WATCHDOG] Return value of nonseekable_open
  [WATCHDOG] mv64x60_wdt: Rework the timeout register manipulation
  [WATCHDOG] mv64x60_wdt: disable watchdog timer when driver is probed
  [WATCHDOG] mv64x60_wdt: Support the WDIOF_MAGICCLOSE feature
  [WATCHDOG] mv64x60_wdt: Add a module parameter to change nowayout setting
  [WATCHDOG] mv64x60_wdt: Add WDIOC_SETOPTIONS ioctl support
  [WATCHDOG] mv64x60_wdt: Support for WDIOC_SETTIMEOUT ioctl
  [WATCHDOG] mv64x60_wdt: Fix WDIOC_GETTIMEOUT return value
  [WATCHDOG] mv64x60_wdt: Check return value of nonseekable_open
  [WATCHDOG] mv64x60_wdt: Add arch/powerpc platform support
  [WATCHDOG] mv64x60_wdt: Get register address from platform data
  [WATCHDOG] mv64x60_wdt: set up platform_device in platform code
  [WATCHDOG] ensure mouse and keyboard ignored in w83627hf_wdt
  [WATCHDOG] s3c2410_wdt: fixup after arch include moves
  [WATCHDOG] git-watchdog-typo
  ...
2007-07-31 20:43:52 -07:00
Stephane Eranian a583f1b542 remove unused TIF_NOTIFY_RESUME flag
Remove unused TIF_NOTIFY_RESUME flag for all processor architectures.  The
flag was not used excecpt on IA-64 where the patch replaces it with
TIF_PERFMON_WORK.

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Cc: <linux-arch@vger.kernel.org>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-31 15:39:38 -07:00
Alexey Dobriyan 4e950f6f01 Remove fs.h from mm.h
Remove fs.h from mm.h. For this,
 1) Uninline vma_wants_writenotify(). It's pretty huge anyway.
 2) Add back fs.h or less bloated headers (err.h) to files that need it.

As result, on x86_64 allyesconfig, fs.h dependencies cut down from 3929 files
rebuilt down to 3444 (-12.3%).

Cross-compile tested without regressions on my two usual configs and (sigh):

alpha              arm-mx1ads        mips-bigsur          powerpc-ebony
alpha-allnoconfig  arm-neponset      mips-capcella        powerpc-g5
alpha-defconfig    arm-netwinder     mips-cobalt          powerpc-holly
alpha-up           arm-netx          mips-db1000          powerpc-iseries
arm                arm-ns9xxx        mips-db1100          powerpc-linkstation
arm-assabet        arm-omap_h2_1610  mips-db1200          powerpc-lite5200
arm-at91rm9200dk   arm-onearm        mips-db1500          powerpc-maple
arm-at91rm9200ek   arm-picotux200    mips-db1550          powerpc-mpc7448_hpc2
arm-at91sam9260ek  arm-pleb          mips-ddb5477         powerpc-mpc8272_ads
arm-at91sam9261ek  arm-pnx4008       mips-decstation      powerpc-mpc8313_rdb
arm-at91sam9263ek  arm-pxa255-idp    mips-e55             powerpc-mpc832x_mds
arm-at91sam9rlek   arm-realview      mips-emma2rh         powerpc-mpc832x_rdb
arm-ateb9200       arm-realview-smp  mips-excite          powerpc-mpc834x_itx
arm-badge4         arm-rpc           mips-fulong          powerpc-mpc834x_itxgp
arm-carmeva        arm-s3c2410       mips-ip22            powerpc-mpc834x_mds
arm-cerfcube       arm-shannon       mips-ip27            powerpc-mpc836x_mds
arm-clps7500       arm-shark         mips-ip32            powerpc-mpc8540_ads
arm-collie         arm-simpad        mips-jazz            powerpc-mpc8544_ds
arm-corgi          arm-spitz         mips-jmr3927         powerpc-mpc8560_ads
arm-csb337         arm-trizeps4      mips-malta           powerpc-mpc8568mds
arm-csb637         arm-versatile     mips-mipssim         powerpc-mpc85xx_cds
arm-ebsa110        i386              mips-mpc30x          powerpc-mpc8641_hpcn
arm-edb7211        i386-allnoconfig  mips-msp71xx         powerpc-mpc866_ads
arm-em_x270        i386-defconfig    mips-ocelot          powerpc-mpc885_ads
arm-ep93xx         i386-up           mips-pb1100          powerpc-pasemi
arm-footbridge     ia64              mips-pb1500          powerpc-pmac32
arm-fortunet       ia64-allnoconfig  mips-pb1550          powerpc-ppc64
arm-h3600          ia64-bigsur       mips-pnx8550-jbs     powerpc-prpmc2800
arm-h7201          ia64-defconfig    mips-pnx8550-stb810  powerpc-ps3
arm-h7202          ia64-gensparse    mips-qemu            powerpc-pseries
arm-hackkit        ia64-sim          mips-rbhma4200       powerpc-up
arm-integrator     ia64-sn2          mips-rbhma4500       s390
arm-iop13xx        ia64-tiger        mips-rm200           s390-allnoconfig
arm-iop32x         ia64-up           mips-sb1250-swarm    s390-defconfig
arm-iop33x         ia64-zx1          mips-sead            s390-up
arm-ixp2000        m68k              mips-tb0219          sparc
arm-ixp23xx        m68k-amiga        mips-tb0226          sparc-allnoconfig
arm-ixp4xx         m68k-apollo       mips-tb0287          sparc-defconfig
arm-jornada720     m68k-atari        mips-workpad         sparc-up
arm-kafa           m68k-bvme6000     mips-wrppmc          sparc64
arm-kb9202         m68k-hp300        mips-yosemite        sparc64-allnoconfig
arm-ks8695         m68k-mac          parisc               sparc64-defconfig
arm-lart           m68k-mvme147      parisc-allnoconfig   sparc64-up
arm-lpd270         m68k-mvme16x      parisc-defconfig     um-x86_64
arm-lpd7a400       m68k-q40          parisc-up            x86_64
arm-lpd7a404       m68k-sun3         powerpc              x86_64-allnoconfig
arm-lubbock        m68k-sun3x        powerpc-cell         x86_64-defconfig
arm-lusl7200       mips              powerpc-celleb       x86_64-up
arm-mainstone      mips-atlas        powerpc-chrp32

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-29 17:09:29 -07:00
Rafael J. Wysocki b0cb1a19d0 Replace CONFIG_SOFTWARE_SUSPEND with CONFIG_HIBERNATION
Replace CONFIG_SOFTWARE_SUSPEND with CONFIG_HIBERNATION to avoid
confusion (among other things, with CONFIG_SUSPEND introduced in the
next patch).

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-29 16:45:38 -07:00
Paul Mackerras 46b2835771 Merge branch 'fixes-2.6.23' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge 2007-07-26 16:43:24 +10:00
Christoph Hellwig 9d78592ed7 [POWERPC] spusched: Fix initial timeslice calculation
Currently we calculate the first timeslice for every context
incorrectly - alloc_spu_context calls spu_set_timeslice before we set
ctx->prio so we always calculate the longest possible timeslice for the
lowest possible priority.

This patch makes sure to update the schedule-related fields before
calculating the timeslice and also makes sure we update the timeslice for
a non-running context when entering spu_run so a priority change affects
the context as soon as possible.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:56 +10:00
Masato Noguchi 6f6a6dc0c8 [POWERPC] spufs: Fix incorrect initialization of cbe_spu_info.spus
We currently initialize cbe_spu_info[].spus in both init_spu_base and
spu_sched_init. The initialise in spu_sched_init clears the SPU list,
so we end up with no physical SPUs. Because of this, the spu_run
syscall will block forever.

This change removes the unnecessary initialization in spu_sched_init.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:55 +10:00
Benjamin Herrenschmidt 17cd87c26b [POWERPC] Fix Maple platform ISA bus
The Maple platform has ISA IOs but didn't call the new functions to
actually map those, thus crashing when trying to access the nvram.

This fixes Maple and JS2x using SLOF.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:49 +10:00
Benjamin Herrenschmidt 50747cb818 [POWERPC] Make pci_iounmap actually unmap things
This patch uses the newly added functions for testing if an address is
an ISA or PCI IO port to properly unmap things in pci_iounmap that
aren't such ports.  Without that, drivers using the iomap API will never
actually unmap resources, which on IBM server machines will prevent
hot-unplug of the corresponding HW adapters.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:48 +10:00
Benjamin Herrenschmidt 6dfbde2091 [POWERPC] Add function to check if address is an IO port
This adds a function that tells you if a given kernel virtual address
is hitting a PCI or ISA IO port permanent mapping or not. This is to
be used in the next patch to fix iomap APIs to properly unmap things.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:47 +10:00
Alan Curry f5d834fc34 [POWERPC] Fix Pegasos keyboard detection
As of 2.6.22 the kernel doesn't recognize the i8042 keyboard/mouse
controller on the PegasosPPC.  This is because of a feature/bug in the
OF device tree: the "device_type" attribute is an empty string instead
of "8042" as the kernel expects.  This adds a secondary detection
which looks for a device whose *name* is "8042" if there is no device
whose *type* is "8042".

Signed-off-by: Alan Curry <pacman@world.std.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:45 +10:00
Stephen Rothwell 16782a604c [POWERPC] iSeries: Fix section mismatch warning in lpevents
WARNING: vmlinux.o(.text+0x4f568): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.setup_hvlpevent_queue' and '.process_hvlpevents')

setup_hvlpevent_queue is only called from __init code so make it __init
as well.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:18 +10:00
Stephen Rothwell c40b91b59d [POWERPC] iSeries: Fix section mismatch warnings
WARNING: vmlinux.o(.text+0x8124): Section mismatch: reference to .init.text:.iSeries_early_setup (between '.__start_initialization_iSeries' and '.__mmu_off')
WARNING: vmlinux.o(.text+0x8128): Section mismatch: reference to .init.text:.early_setup (between '.__start_initialization_iSeries' and '.__mmu_off')

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Guennadi Liakhovetski f2d32db344 [POWERPC] Fix RTC and device tree on linkstation machines
This fixes the RTC on linkstation ppc machines again, and updates the
device tree: add rtc nodes on i2c, remove bogus 0-size cache-line
declarations, rename interrupt-controller nodes, remove erroneous
interrupt-parent line, accidentally introduced by a recent patch.

Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Guennadi Liakhovetski d13ae8620d [POWERPC] Add of_register_i2c_devices()
Scan the device tree for i2c devices, check their "compatible" property
against a hard-coded table, and, if found, register with i2c boardinfo.
This provides the infrastructure needed to find i2c devices in the
device tree and register them with the i2c subsystem.

This and the following commit let the linkstation work with the new i2c
API and thus fix a regression.

Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Manish Ahuja 56d6d1a73d [POWERPC] Fix loop with unsigned long counter variable
This fixes a possible infinite loop when the unsigned long counter "i"
is used in lmb_add_region() in the following for loop:

for (i = rgn->cnt-1; i >= 0; i--)

by making the loop counter "i" be signed.

Signed-off-by: Manish Ahuja <ahuja@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Kumar Gala 141707892e [POWERPC] Fix register labels on show_regs() message for 4xx/Book-E
In a show_regs()  message The DEAR and ESR were reported as
DAR and DSISR which only exist on classic parts.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:46:15 -05:00
Kumar Gala d1c813123f [POWERPC] Only allow building of BootX text support on PPC_MULTIPLATFORM
BootX text code is only supported on systems with real OF at this point
which is PPC_OF && PPC_MULTIPLATFORM.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:43:36 -05:00
Roy Zang 10ce8c69d0 [POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boards
Add global-utilities node with has-rstcr on MPC8544 DS and MPC8568 MDS
boards so they are able to reset properly.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:19:57 -05:00
Roy Zang 006af9e229 [POWERPC] Fix mpc7448hpc2 tsi108 device_type bug
Fix mpc7448hpc2 tsi108 device_type bug.
Wrong device type will break the board startup.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:17:02 -05:00
Kumar Gala 282045b450 [POWREPC] Fixup a number of modpost warnings on ppc32
Fixed the following warnings:

WARNING: vmlinux.o(.text+0x2934): Section mismatch: reference to .init.text:__alloc_bootmem (between 'irq_alloc_host' and 'irq_set_default_host')
WARNING: vmlinux.o(.text+0xb2aa): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xb2b2): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xe354): Section mismatch: reference to .init.text:__alloc_bootmem (between 'pcibios_alloc_controller' and 'pci_domain_nr')
WARNING: vmlinux.o(.text+0x12768): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x127a8): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x17566c): Section mismatch: reference to .init.text:pcibios_fixup_bus (between 'pci_scan_child_bus' and 'pci_scan_bus_parented')

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:16:21 -05:00
Kumar Gala 9a9bcf4e00 [POWERPC] Fix ethernet PHY support on MPC8544 DS
The MPC8544 dts needed to set the new phy-connection-type to rgmii-id
for the Vitesse PHY on the board to work properly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:07:36 -05:00
Kumar Gala 2052d6d25d [POWERPC] Don't try to allocate resources for a Freescale POWERPC PHB
The Freescale PCI PHBs actual report back values in the BAR registers
this causes issues in that we try to allocate resources for them
and will get error messages like the following on MPC8544 DS:

PCI: Failed to allocate mem resource #1:80000000@0 for 0000:00:00.0

To address this if we are class PCI_CLASS_PROCESSOR_POWERPC, a normal
header type, and the PHB we clear out all the resources.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-25 23:02:06 -05:00
Paul Mackerras 77926826f3 Revert "[POWERPC] Don't complain if size-cells == 0 in prom_parse()"
This reverts commit fd6e9d3945.

Having #size-cells == 0 in a node indicates that things under the
node aren't directly accessible, and therefore we shouldn't try to
translate addresses for devices under the node into CPU physical
addresses.

Some drivers, such as the nvram driver for powermacs, rely on
of_address_to_resource failing if they are called for a node
representing a device whose resources aren't directly accessible
by the CPU.  These drivers were broken by commit fd6e9d39,
resulting in the "Lombard" powerbook hanging early in the boot
process.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 13:44:36 +10:00
Kumar Gala 7659c038d3 [POWERPC] Fix PCI indirect for big-endian cfg_addr
We didn't actually propogate the flag we pass into setup_indirect_pci()
to set indirect_type and thus were getting the wrong endianness if
PPC_INDIRECT_TYPE_BIG_ENDIAN was set.

Also, we need to or in additional flags rather than just doing a
direct assignment.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-25 00:29:53 -05:00
Linus Torvalds 0de085bb47 Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
* 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc: (25 commits)
  [POWERPC] 85xx: Added needed MPC85xx PCI device IDs
  [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs
  [POWERPC] 85xxCDS: MPC8548 DTS cleanup.
  [POWERPC] 85xxCDS: Misc 8548 PCI Corrections.
  [POWERPC] 85xxCDS: Delay 8259 cascade hookup.
  [POWERPC] 85xxCDS: Make sure restart resets the PCI bus.
  [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.
  [POWERPC] FSL: Add support for PCI-X controllers
  [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB
  [POWERPC] Provide ability to setup P2P bridge registers from struct resource
  [POWERPC] Add basic PCI/PCI Express support for 8544DS board
  [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
  [POWERPC] Removed setup_indirect_pci_nomap
  [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS
  [POWERPC] 85xx: Added 8568 PCIe support
  [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected
  [POWERPC] Add basic PCI node for mpc8568mds board
  [POWERPC] Use Freescale pci/pcie common code for 85xx boards
  [POWERPC] Update PCI nodes in the 83xx/85xx boards device tree
  [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node
  ...
2007-07-24 20:26:25 -07:00
Dale Farnsworth 7e07a15913 [WATCHDOG] mv64x60_wdt: Add arch/powerpc platform support
Add support for arch/powerpc, specifically for the prpmc2800 platform.

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2007-07-24 21:16:02 +00:00
Christoph Hellwig b2c863bd2d spusched: fix mismerge in spufs.h
spufs.h now has two enums for the sched_flags leading to identical
values for SPU_SCHED_WAS_ACTIVE and SPU_SCHED_NOTIFY_ACTIVE.  Merge
them into a single enum as they were in the IBM development tree.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-24 12:24:58 -07:00
Kumar Gala e58712111f [POWERPC] 85xx: Added needed MPC85xx PCI device IDs
Added the MPC85xx PCI device IDs that we need for the quirks we have.

Also, fixed the MPC8567E, MPC8567 device IDs which had the wrong value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:32:05 -05:00
Jon Loeliger c26c372cdb [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs
Also add 8641/8641D device IDs as well.
All of which already exist or have been submitted to
The Linux PCI ID Repository at:
    http://pci-ids.ucw.cz/

CC-to: pci-ids@ucw.cz
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:31:58 -05:00
Randy Vinson 6af0125742 [POWERPC] 85xxCDS: MPC8548 DTS cleanup.
Added the P2P bridge present on the Arcadia base board and moved the VIA
Southbridge behind the bridge to reflect its actual position in the bus
organization. Added the RTC that's in the VIA Southbridge and expanded
the ranges array for the SOC node to allow proper address translation of
the RTC registers.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:31:55 -05:00
Randy Vinson 8d7bc8f9d1 [POWERPC] 85xxCDS: Misc 8548 PCI Corrections.
Setting the host bridge @8000 as primary. Also fixing a bug in
setting the USB interrupt numbers.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:31:49 -05:00
Randy Vinson bca03c6bdd [POWERPC] 85xxCDS: Delay 8259 cascade hookup.
The interrupts of an E100 card inserted in PCI slot 4 may be on at bootup.
The resulting interrupt flood interacts with the 8259 cascade handler and
prevents proper boot up. There is a quirk for the E100 that will disable
the E100's interrupts but to use it, the 8259 cascade hookup must be
delayed until after the quirk has run. This patch delays the 8259 cascade
hookup by registering a device_initcall() which runs after the PCI quirk
for the E100.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:31:34 -05:00
Randy Vinson 637e9e13a1 [POWERPC] 85xxCDS: Make sure restart resets the PCI bus.
The current 85xxCDS restart code fails to reset the PCI bus which can
lead to odd behavior after the restart. This patch uses the VIA Super
Southbridge to perform a PCI reset which will reset the entire system.
NOTE: Since the VIA chip is behind a PCI-to-PCI bridge which can be
disabled with a switch setting, it may not be possible to perform the
PCI bus reset. In this case, the code defaults to the previous restart
mechanism.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:35:12 -05:00
Randy Vinson 3620fc1da2 [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.
The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy
8259 interrupt controller pair contained within a VIA VT82C686B Southbridge
on the main carrier board. The processor complex plugs into the carrier
card using a PCI slot which limits the available interrupts to the
INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed
through a gate array and connected to the PCI INTA interrupt line.
The normal interrupt chaining hook (set_irq_chained_handler) does
not allow sharing of the chained interrupt which prevents the
use of PCI INTA by PCI devices. This patch allows the 8259 cascade
pair to share their interrupt line with PCI devices.

NOTE: The addition of the .end routine for the MPIC is not strictly
necessary for this patch. It's there so this code will run from within
the threaded interrupt context used by the Real Time patch.

Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:34:40 -05:00
Kumar Gala eb12af4333 [POWERPC] FSL: Add support for PCI-X controllers
Some set of 85xx platforms have PCI-X controllers.  The old arch/ppc
code setup these controllers and we haven't moved it over to arch/powerpc.

We use the PCI-X Capabilties to know if we are in PCI-X mode instead
of the Global Utilities PORDEVSR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:14 -05:00
Kumar Gala 7391ff35b2 [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB
For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P
bridge registers properly.  Make sure they get setup based on what
the struct pci_controller got from the device tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:11 -05:00
Kumar Gala f64fddbeac [POWERPC] Provide ability to setup P2P bridge registers from struct resource
We need the ability to set P2P bridge registers to properly setup the virtual
P2P bridges that exist in PCIe controllers for some of the embedded setups.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:08 -05:00
Roy Zang f16dab981a [POWERPC] Add basic PCI/PCI Express support for 8544DS board
Add basic support for the PCIe PHB and enable the ULI bridge.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:02 -05:00
Kumar Gala 2e56ff206b [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:29:09 -05:00
Kumar Gala d5269966e5 [POWERPC] Removed setup_indirect_pci_nomap
We don't use setup_indirect_pci_nomap in arch/powerpc and it appears
the users that needed it from arch/ppc are now using setup_indirect_pci.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala 4e7982115e [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS
The newer Arcadia boards for CDS have an FPGA that shows up on PCI
however isn't a real PCI device.  Add a quirk to just ignore the
FPGA.

This is based on the following patch from Andy & York:

http://ozlabs.org/pipermail/linuxppc-dev/2007-February/032042.html

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala aa3c112146 [POWERPC] 85xx: Added 8568 PCIe support
Added the PCIe device node to the 8568 dts and the needed quirk entries.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala 6c0a11c118 [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected
On the 85xx/86xx PCIe controllers if there is no device connected to the
PHB we will still allocate a pci_bus for downstream bus of the virtual
P2P bridge. However the resources allocated to the downstream bus are not
correct and so we just mimic the resources from the upstream pci_bus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Roy Zang 66afe8780f [POWERPC] Add basic PCI node for mpc8568mds board
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Roy Zang 3f6c5dae27 [POWERPC] Use Freescale pci/pcie common code for 85xx boards
Switch the 85xx platform over to using the FSL generic PCI code.  This
gets ups PCIe support in addition to base PCI support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Roy Zang 344ffde71e [POWERPC] Update PCI nodes in the 83xx/85xx boards device tree
Updated the 83xx & 85xx device tree PCI related compartible property.

Used the following compatible properties:
	PCI     "fsl,mpc8349-pci"
	PCI     "fsl,mpc8540-pci"
	PCI-X:  "fsl,mpc8540-pcix"
	PCIe:   "fsl,mpc8548-pcie"

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Roy Zang 02edff59c9 [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node
Add 8548 CDS PCI express controller node and PCI-X device node. The current
dts file is suitable for 8548 Rev 2.0 board with Arcadia 3.1.

This kind of board combination is the most popular.

Used the following compatible properties:
	PCI	"fsl,mpc8540-pci"
	PCI-X:	"fsl,mpc8540-pcix"
	PCIe:	"fsl,mpc8548-pcie"

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Kumar Gala 957ecffc25 [POWERPC] FSL: Cleanup how we detect if we are a PCIe controller
Use the PCI capabilities to determine if we are PCIe PHB.  Also use
PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers
will lock the system if they don't have link and you try to do a config
access to anything but the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Kumar Gala 62c66c8e55 [POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no link
Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling
code to ensure that we don't talk to any device other than the PHB
if we don't have PCIe link.  Some controllers will lockup if they try
to do a config cycle to any device on the bus except the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Kumar Gala 38805e5f09 [POWERPC] Add the ability to find PCI capabilities early on
Added early_find_capability that wraps pci_bus_find_capability and uses
fake_pci_bus() to allow us to call it before we've fully setup the
pci_controller.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Zang Roy-r61911 9ac4dd301e [POWERPC] Rewrite Freescale PCI/PCIe support for 8{3,5,6}xx
Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and
PCIe on 85xx/86xx.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Roy Zang 55c44991e2 [POWERPC] Create common fsl pci/e files based on 86xx platforms
Move
arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h
as the base to unify 83xx/85xx/86xx pci and pcie.

Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option.
The code still works for 86xx platforms.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Linus Torvalds dc79747019 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Clean up duplicate includes in drivers/macintosh/
  [POWERPC] Quiet section mismatch warning on pcibios_setup
  [POWERPC] init and exit markings for hvc_iseries
  [POWERPC] Quiet section mismatch in hvc_rtas.c
  [POWERPC] Constify of_platform_driver match_table
  [POWERPC] hvcs: Make some things static and const
  [POWERPC] Constify of_platform_driver name
  [POWERPC] MPIC protected sources
  [POWERPC] of_detach_node()'s device node argument cannot be const
  [POWERPC] Fix ARCH=ppc builds
  [POWERPC] mv64x60: Use mutex instead of semaphore
  [POWERPC] Allow smp_call_function_single() to current cpu
  [POWERPC] Allow exec faults on readable areas on classic 32-bit PowerPC
  [POWERPC] Fix future firmware feature fixups function failure
  [POWERPC] fix showing xmon help
  [POWERPC] Make xmon_write accept a const buffer
  [POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option.
  [POWERPC] cell: CONFIG_SPE_BASE is a typo
2007-07-22 11:17:35 -07:00
Al Viro 5fa63fccc5 Fix ppc64 mismerge
Fix a mismerge in commit 8b6f50ef1d5cc86b278eb42bc91630fad455fb10:
"spufs: make signal-notification files readonly for NOSCHED contexts",
where structs got duplicated.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-22 10:41:27 -07:00
Stephen Rothwell a2b7390af4 [POWERPC] Quiet section mismatch warning on pcibios_setup
WARNING: vmlinux.o(.text+0x1cefcc): Section mismatch: reference to .init.text:.pcibios_setup (between '.pci_setup' and '.pci_init')

pci_setup() is marked __devinit and calls pcibios_setup.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:59 +10:00
Benjamin Herrenschmidt 7fd7218610 [POWERPC] MPIC protected sources
Some HW platforms, such as the new cell blades, requires some MPIC sources
to be left alone by the operating system. This implements support for
a "protected-sources" property in the mpic controller node containing a list
of source numbers to be protected against operating system interference.

For those interested in the gory details, the MPIC on the southbridge of
those blades has some of the processor outputs routed to the cell, and
at least one routed as a GPIO to the service processor. It will be used
in the GA product for routing some of the southbridge error interrupts
to the service processor which implements some of the RAS stuff, such
as checkstopping when fatal errors occurs before they can propagate.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:59 +10:00
Segher Boessenkool 34f329db54 [POWERPC] of_detach_node()'s device node argument cannot be const
...since it modifies it (when it sets the OF_DETACHED flag).

Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:59 +10:00
Avi Kivity adff093d6c [POWERPC] Allow smp_call_function_single() to current cpu
This removes the requirement for callers to get_cpu() to check in simple
cases.  i386 and x86_64 already received a similar treatment.

Signed-off-by: Avi Kivity <avi@qumranet.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:58 +10:00
Paul Mackerras 08ae6cc15d [POWERPC] Allow exec faults on readable areas on classic 32-bit PowerPC
Classic 32-bit PowerPC CPUs, and the early 64-bit PowerPC CPUs, don't
provide a way to prevent execution from readable pages, that is, the
MMU doesn't distinguish between data reads and instruction reads,
although a different exception is taken for faults in data accesses
and instruction accesses.

Commit 9ba4ace39f, in the course of
fixing another bug, added a check that meant that a page fault due
to an instruction access would fail if the vma did not have the
VM_EXEC flag set.  This gives an inconsistent enforcement on these
CPUs of the no-execute status of the vma (since reading from the page
is sufficient to allow subsequent execution from it), and causes old
versions of ppc32 glibc (2.2 and earlier) to fail, since they rely
on executing the word before the GOT but don't have it marked
executable.

This fixes the problem by allowing execution from readable (or writable)
areas on CPUs which do not provide separate control over data and
instruction reads.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2007-07-22 21:30:58 +10:00
Michael Neuling ca8ffc974d [POWERPC] Fix future firmware feature fixups function failure
Move firmware feature initialisation from pSeries_init_early to the
earlier pSeries_probe_hypertas so they are initialised before firmware
feature fixups are applied.

Currently firmware feature sections are only used for iSeries which
initialises the these features much earlier.  This is a bug in waiting
on pSeries.

Also adds some whitespace fixups.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:58 +10:00
Ishizaki Kou 4d404edce3 [POWERPC] fix showing xmon help
In some configuration, xmon help string is larger than xmon_printf
buffer.  We need not to use printf.  This patch adds xmon_puts and
change to use it to show help string.

Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:58 +10:00
Ishizaki Kou 776568d4c9 [POWERPC] Make xmon_write accept a const buffer
Because xmon_write doesn't change the buffer, we should add 'const'
qualifier to the argument which points it.

Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:58 +10:00
Robert P. J. Day f8eb77d6fb [POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option.
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:58 +10:00
Geert Uytterhoeven 1e57ba8ddd [POWERPC] cell: CONFIG_SPE_BASE is a typo
The config symbol for SPE support is called CONFIG_SPU_BASE, not
CONFIG_SPE_BASE.

Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:57 +10:00
Jeremy Kerr 8b6f50ef1d spufs: make signal-notification files readonly for NOSCHED contexts
Reading from the signal{1,2} files requires a spu_acquire_saved, so make these
files write-only for contexts created with SPU_CREATE_NOSCHED.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Geoff Levand 24ed8559c7 PS3: Fix build with 32-bit toolchains
The PS3 bootwrapper files use instructions only available on 64-bit CPUs.
Add the code generation directive '.machine "ppc64"' for toolchains
configured for 32-bit CPUs.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Geert Uytterhoeven f96526354b ps3: FLASH ROM Storage Driver
Add a FLASH ROM Storage Driver for the PS3:
  - Implemented as a misc character device driver
  - Uses a fixed 256 KiB buffer allocated from boot memory as the hypervisor
    requires the writing of aligned 256 KiB blocks

Cc: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Geert Uytterhoeven 9aea8cbf28 ps3: BD/DVD/CD-ROM Storage Driver
Add a BD/DVD/CD-ROM Storage Driver for the PS3:
  - Implemented as a SCSI device driver
  - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor
    doesn't support scatter-gather

Cc: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Geert Uytterhoeven c6131fa528 ps3: Disk Storage Driver
Add a Disk Storage Driver for the PS3:
  - Implemented as a block device driver with a dynamic major
  - Disk names (and partitions) are of the format ps3d%c(%u)
  - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor
    doesn't support scatter-gather

Cc: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Acked-by: Jens Axboe <jens.axboe@oracle.com>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Mariusz Kozlowski 97d22d26b4 powerpc: tlb_32.c build fix
allnoconfig results in this:

 CC      arch/powerpc/mm/tlb_32.o
In file included from include/asm/tlb.h:60,
                 from arch/powerpc/mm/tlb_32.c:30:
include/asm-generic/tlb.h: In function 'tlb_flush_mmu':
include/asm-generic/tlb.h:76: error: implicit declaration of function 'release_pages'
include/asm-generic/tlb.h: In function 'tlb_remove_page':
include/asm-generic/tlb.h:105: error: implicit declaration of function 'page_cache_release'

Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21 17:49:16 -07:00
Christoph Hellwig 486acd4850 [CELL] spufs: rework list management and associated locking
This sorts out the various lists and related locks in the spu code.

In detail:

 - the per-node free_spus and active_list are gone.  Instead struct spu
   gained an alloc_state member telling whether the spu is free or not
 - the per-node spus array is now locked by a per-node mutex, which
   takes over from the global spu_lock and the per-node active_mutex
 - the spu_alloc* and spu_free function are gone as the state change is
   now done inline in the spufs code.  This allows some more sharing of
   code for the affinity vs normal case and more efficient locking
 - some little refactoring in the affinity code for this locking scheme

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:28 +02:00
Bob Nelson 1474855d08 [CELL] oprofile: add support to OProfile for profiling CELL BE SPUs
From: Maynard Johnson <mpjohn@us.ibm.com>

This patch updates the existing arch/powerpc/oprofile/op_model_cell.c
to add in the SPU profiling capabilities.  In addition, a 'cell' subdirectory
was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code.
Exports spu_set_profile_private_kref and spu_get_profile_private_kref which
are used by OProfile to store private profile information in spufs data
structures.

Also incorporated several fixes from other patches (rrn).  Check pointer
returned from kzalloc.  Eliminated unnecessary cast.  Better error
handling and cleanup in the related area.  64-bit unsigned long parameter
was being demoted to 32-bit unsigned int and eventually promoted back to
unsigned long.

Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Bob Nelson <rrnelson@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Paul Mackerras <paulus@samba.org>
2007-07-20 21:42:24 +02:00
Bob Nelson 36aaccc1e9 [CELL] oprofile: enable SPU switch notification to detect currently active SPU tasks
From: Maynard Johnson <mpjohn@us.ibm.com>

This patch adds to the capability of spu_switch_event_register so that
the caller is also notified of currently active SPU tasks.
Exports spu_switch_event_register and spu_switch_event_unregister so
that OProfile can get access to the notifications provided.

Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Bob Nelson <rrnelson@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Paul Mackerras <paulus@samba.org>
2007-07-20 21:42:20 +02:00
Christoph Hellwig 2414059420 [CELL] spu_base: locking cleanup
Sort out the locking mess in spu_base and document the current rules.
As an added benefit spu_alloc* and spu_free don't block anymore.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:19 +02:00
Arnd Bergmann 9e7cbcbb6e [CELL] cell: indexing of SPUs based on firmware vicinity properties
This patch links spus according to their physical position using
information provided by the firmware through a special vicinity
device-tree property. This property is present in current version
of Malta firmware.

Example of vicinity properties for a node in Malta:

Node:        Vicinity property contains phandles of:
spe@0        [ spe@100000 , mic-tm@50a000 ]
spe@100000   [ spe@0      , spe@200000    ]
spe@200000   [ spe@100000 , spe@300000    ]
spe@300000   [ spe@200000 , bif0@512000   ]
spe@80000    [ spe@180000 , mic-tm@50a000 ]
spe@180000   [ spe@80000  , spe@280000    ]
spe@280000   [ spe@180000 , spe@380000    ]
spe@380000   [ spe@280000 , bif0@512000   ]

Only spe@* have a vicinity property (e.g., bif0@512000 and
mic-tm@50a000 do not have it).

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:18 +02:00
Arnd Bergmann cbc23d3e7c [CELL] spufs: integration of SPE affinity with the scheduller
This patch makes the scheduller honor affinity information for each
context being scheduled. If the context has no affinity information,
behaviour is unchanged. If there are affinity information, context is
schedulled to be run on the exact spu recommended by the affinity
placement algorithm.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:18 +02:00
Arnd Bergmann c5fc8d2a92 [CELL] cell: add placement computation for scheduling of affinity contexts
This patch provides the spu affinity placement logic for the spufs scheduler.
Each time a gang is going to be scheduled, the placement of a reference
context is defined. The placement of all other contexts with affinity from
the gang is defined based on this reference context location and on a
precomputed displacement offset.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:17 +02:00
Arnd Bergmann 8e68e2f248 [CELL] spufs: extension of spu_create to support affinity definition
This patch adds support for additional flags at spu_create, which relate
to the establishment of affinity between contexts and contexts to memory.
A fourth, optional, parameter is supported. This parameter represent
a affinity neighbor of the context being created, and is used when defining
SPU-SPU affinity.
Affinity is represented as a doubly linked list of spu_contexts.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:15 +02:00
Arnd Bergmann 3ad216cae8 [CELL] cell: add hardcoded spu vicinity information for QS20
This patch allows the use of spu affinity on QS20, whose
original FW does not provide affinity information.
This is done through two hardcoded arrays, and by reading the reg
property from each spu.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:13 +02:00
Arnd Bergmann 9d92af621f [CELL] cell: add vicinity information on spus
This patch adds affinity data to each spu instance.
A doubly linked list is created, meant to connect the spus
in the physical order they are placed in the BE. SPUs
near to memory should be marked as having memory affinity.
Adjustments of the fields acording to FW properties is done
in separate patches, one for CPBW, one for Malta (patch for
Malta under testing).

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:12 +02:00
Arnd Bergmann aa6d5b2025 [CELL] cell: add per BE structure with info about its SPUs
Addition of a spufs-global "cbe_info" array. Each entry contains information
about one Cell/B.E. node, namelly:
* list of spus (both free and busy spus are in this list);
* list of free spus (replacing the static spu_list from spu_base.c)
* number of spus;
* number of reserved (non scheduleable) spus.

SPE affinity implementation actually requires only access to one spu per
BE node (since it implements its own pointer to walk through the other spus
of the ring) and the number of scheduleable spus (n_spus - non_sched_spus)
However having this more general structure can be useful for other
functionalities, concentrating per-cbe statistics / data.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:11 +02:00
Masato Noguchi 7e90b74967 [CELL] spufs: use find_first_bit() instead of sched_find_first_bit()
spu_sched->bitmap has MAX_PRIO(=140) width in bits.However, since
ff80a77f20, sched_find_first_bit()
only supports 100-bit bitmaps.

Thus, spu_sched->bitmap should be treated by generic find_first_bit().

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:07 +02:00
Jeremy Kerr 50af32a94b [CELL] spufs: remove unused file argument from spufs_run_spu()
From: Sebastian Siewior <cbe-oss-dev@ml.breakpoint.cc>

The 'file' argument is unused in spufs_run_spu(). This change removes
it.

Signed-off-by: Sebastian Siewior <sebastian@breakpoint.cc>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:03 +02:00
Masato Noguchi ca53da3abb [CELL] spufs: change decrementer restore timing
The SPU decrementer should be restored after the LSCSA DMA has
completed.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:03 +02:00
Masato Noguchi cf17df223c [CELL] spufs: dont halt decrementer at restore step 47
No need to halt the SPE decrementer at context restore step 47, it will
be done in step 7.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:58 +02:00
Masato Noguchi a103f347a5 [CELL] spufs: limit saving MFC_CNTL bits
At save step 8, the mfc control register in the CSA should be written
_only_ with Sc and Sm bits (at least MFC_CNTL[Dh] should be set to 0)

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:57 +02:00
Masato Noguchi d40a01d4f4 [CELL] spufs: fix read and write for decr_status file
The decr_status in the LSCSA is valid only in the sequence of context
restore. Thus, it's nonsense to read and/or write it through spufs.

This patch changes decr_status node to access MFC_CNTL[Ds] in the CSA.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:56 +02:00
Masato Noguchi 1cfc0f86eb [CELL] spufs: fix decr_status meanings
The decr_status in the LSCSA is confusedly used as two meanings:
 * SPU decrementer was running
 * SPU decrementer was wrapped as a result of adjust
and the code to set decr_status is missing.

This patch fixes these problems by using the decr_status argument as a
set of flags. This requires a rebuild of the shipped spu_restore code.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:55 +02:00
Masato Noguchi cfd529b25d [CELL] spufs: remove needless context save/restore code
The following steps are not needed in the SPE context save/restore
paths:

Save Step 12: save_mfc_decr()
  save suspend_time to CSA (It will be done by step 14)
  save ch 7 (decrementer value will be saved in LSCSA by spe-side step 10)

Restore Step 59: restore_ch_part1()
  restore ch 1 (it will be done by spe-side step 15)

This change removes the unnecessary steps.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:54 +02:00
Jeremy Kerr daced0f718 [CELL] spufs: fix array size of channel index
Based on a fix from Masato Noguchi <Masato.Noguchi@jp.sony.com>.

Remove the (incorrect) array size declarations in the spufs channel
arrays, and use ARRAY_SIZE rather than hardcoded values.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:53 +02:00
Christoph Hellwig 27b1ea091f [CELL] spufs: make sure context are scheduled again after spu_acquire_saved
Currently a process is removed from the physical spu when spu_acquire_saved
is saved but never put back.  This patch adds a new spu_release_saved
that is to be paired with spu_acquire_saved and put the process back if
it has been in RUNNABLE state before.

Niether Jeremy not be are entirely happy about this exact patch because
it adds another spu_activate call outside of the owner thread, but I
feel this is the best short-term fix we can come up with.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:52 +02:00
Andre Detsch 27ec41d3a1 [CELL] spufs: add spu stats in sysfs and ctx stat file in spufs
This patch exports per-context statistics in spufs as long as spu
statistics in sysfs.

It was formed by merging:
"spufs: add spu stats in sysfs"   From: Christoph Hellwig
"spufs: add stat file to spufs"   From: Christoph Hellwig
"spufs: fix libassist accounting" From: Jeremy Kerr
"spusched: fix spu utilization statistics" From: Luke Browning
And some adjustments by myself, after suggestions on cbe-oss-dev.

Having separate patches was making the review process harder
than it should, as we end up integrating spus and ctx statistics
accounting much more than it was on the first implementation.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:50 +02:00
Jeremy Kerr e840cfe681 [CELL] spufs: Remove spurious WARN_ON for spu_deactivate for NOSCHED contexts
In 6cbf93960e64f313f6e247cbca7afaa50e3ee2c we added a WARN_ON for
calling spu_deactivate on contexts created with the SPU_CREATE_NOSCHED
flag. However, all NOSCHED contexts will need to be deactivated when
the context is destroyed, so this gives a spurious warning when any
NOSCHED context is closed.

This change removes the WARN_ON.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:49 +02:00
Jeremy Kerr d054b36ffd [CELL] spufs: Make signal-notification files readonly for NOSCHED contexts
Reading from the signal{1,2} files requires a spu_acquire_saved, so
make these files write-only for contexts created with
SPU_CREATE_NOSCHED.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:48 +02:00
Kazunori Asayama 49776d30ae [CELL] spufs: Avoid unexpectedly restaring MFC during context save
The current SPU context saving procedure in SPUFS unexpectedly
restarts MFC when halting decrementer, because MFC_CNTL[Dh] is set
without MFC_CNTL[Sm]. This bug causes, for example, saving broken DMA
queues. Here is a patch to fix the problem.

Signed-off-by: Kazunori Asayama <asayama@sm.sony.co.jp>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:47 +02:00
Sebastian Siewior d145031755 [CELL] spufs: remove section mismatch warning
WARNING: arch/powerpc/platforms/cell/spufs/spufs.o(.init.text+0x158): Section
mismatch: reference to .exit.text:.spu_sched_exit (between '.init_module' and
'.spu_sched_init')

was introduced by c99c1994a2
This patch removes the warning.

Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sebastian Siewior <sebastian@breakpoint.cc>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:46 +02:00
Michael Ellerman ce21b3c964 [CELL] add support for MSI on Axon-based Cell systems
This patch adds support for the setup and decoding of MSIs
on Axon-based Cell systems, using the MSIC mechanism.

This involves setting up an area of BE memory which the Axon
then uses as a FIFO for MSI messages. When one or more MSIs
are decoded by the MSIC we receive an interrupt on the MPIC,
and the MSI messages are written into the FIFO. At the moment
we use a 64KB FIFO, one per MSIC/BE.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:41:45 +02:00