Commit Graph

2 Commits

Author SHA1 Message Date
Jacob Pan ed93b71492 powercap / RAPL: add support for ValleyView Soc
This patch adds support for RAPL on Intel ValleyView based SoC
platforms, such as Baytrail.

Besides adding CPU ID, special energy unit encoding is handled
for ValleyView.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-12-22 01:27:51 +01:00
Jacob Pan 2d281d8196 PowerCap: Introduce Intel RAPL power capping driver
The Intel Running Average Power Limit (RAPL) technology provides platform
software with the ability to monitor, control, and get notifications on
power usage.

This feature is present in all Sandy Bridge and later Intel processors.
Newer models allow more fine grained controls to be applied.  In RAPL,
power control is divided into domains, which include package, DRAM
controller, CPU core (Power Plane 0), graphics uncore (power plane 1), etc.

The purpose of this driver is to expose the RAPL settings to userspace.
Overall, RAPL fits in the new powercap class driver in that platform
level power capping controls are exposed via this generic interface.

This driver is based on an earlier patch from Zhang Rui.

However, while the previous work was mainly focused on thermal monitoring
the focus here is on the usability from user space perspective.

References: https://lkml.org/lkml/2011/5/26/93
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-10-18 13:29:52 +02:00