Commit Graph

3 Commits

Author SHA1 Message Date
Tzachi Perelstein ca26f7d3ed [ARM] Orion: platform device registration for UART, USB and NAND
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:50 +00:00
Tzachi Perelstein c67de5b3c0 [ARM] Orion: programable address map support
The Orion has fully programable address map. There's a separate address
map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
Gigabit Ethernet, DMA/XOR engines, etc.

Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
2008-01-26 15:03:44 +00:00
Tzachi Perelstein 585cf17561 [ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.

This contains the basic structure and architecture register definitions.

Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:42 +00:00