Commit Graph

14 Commits

Author SHA1 Message Date
Joseph Lo 8f6a0b6528 ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2
tegra_{set,clear}_cpu_in_lp2 can easily determine which CPU ID they are
running on; there is no need to pass the CPU ID into those functions.
So, remove their CPU ID function parameter.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-06-05 11:44:58 -06:00
Joseph Lo bf91add4a0 ARM: tegra: hook tegra_tear_down_cpu function in the PM suspend init function
The tegra_tear_down_cpu was used to cut off the CPU rail for various Tegra
SoCs. Hooking it in the PM suspend init function and making the CPUidle
driver more generic.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-06-05 11:44:54 -06:00
Linus Torvalds 97b1007a29 ARM: arm-soc platform updates for 3.10, part 1
This branch contains platform updates for 3.10. Among the highlights:
 
 - Support for the new Atmel Cortex-A5 based platforms (SAMA5D3)
 - New support for CSR SiRFatlas6 SoCs
 - A handful of updates for NVidia T114 (a.k.a. Tegra 4)
 - A bunch of updates for the shmobile platforms
 - A handful of updates for davinci
 - A few updates for Qualcomm MSM
 - Plus a handful of other patches, defconfig updates, etc.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRgg+LAAoJEIwa5zzehBx3ePcP/3NUsSOTRQ2SZIVpyjnWOhkf
 RMZiRaVsxrY0BPfDB9E2Vcb6lannKmACTujs/Ux7kJC22BreuFM1PnZoDfhkRuSE
 n/nVB1981XJS82z2uONRSZGlUPSGWYzhTTUDJ0nHiBGmIGf5ctnC0iYWp3As3lv9
 kNY14H7NkwQ4zBVNEMu7WfW8d2IJgqZJgR9xhZPv5fOZ+LlQmK6VaHWTmQtjyea1
 bG1qoJ0dPbfJB4Vnr3a49rBkSJxZUiv8xQucw9+vo+ADRi64M4sZ1Jj2vVyDpqZp
 F4fxBNMVvg7xM0TcBbItFFYJBXlUjeT4z+UI5iYjkbnE7EV9ndFeZXHCWX1qzOSy
 X/nrJKuoe7ISQanBE9SHS9DpDGlkPDO0Mn0vb1f2VUQOY513pt/D1iFYEucZ6WCN
 fWUYtvt5GayidUr55D1U8ssbE0oGt2rizd9x7GUk4KbRVAnUUNopIQAhXrefTrZm
 jfdZNDckJ2F3aq8IPjsKuyJTpe61xD4Wvb3P/pEE3Q8fowPF5WIxXV+qjqHQ9vtt
 Tz4LkP/YdynVFGmhOwz3QZmPaQItaabaYyCcZ5cVCvt5mdxx5VuHYppafhCPJz+V
 KCQpKi1azuIv+sDR+nlGOl6+Ideea3s7TsRudfbmQFp5GsqkqOdJzR9gbbKmJauQ
 4JPpRd+4W8wC8zXQnhVY
 =HXX3
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "This branch contains part 1 of the platform updates for 3.10.  Among
  the highlights:

   - Support for the new Atmel Cortex-A5 based platforms (SAMA5D3)
   - New support for CSR SiRFatlas6 SoCs
   - A handful of updates for NVidia T114 (a.k.a. Tegra 4)
   - A bunch of updates for the shmobile platforms
   - A handful of updates for davinci
   - A few updates for Qualcomm MSM
   - Plus a handful of other patches, defconfig updates, etc."

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (135 commits)
  ARM: tegra: pm: fix build error w/o PM_SLEEP
  ARM: davinci: ensure global variables are declared
  ARM: davinci: sram.c: fix incorrect type in assignment
  ARM: davinci: da8xx dt: make file local symbols static
  ARM: davinci: da8xx: add remoteproc support
  ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries
  ARM: socfpga: Add clock entries into device tree
  ARM: socfpga: Enable soft reset
  ARM: EXYNOS: replace cpumask by the corresponding macro
  ARM: EXYNOS: handle properly the return values
  ARM: EXYNOS: factor out the idle states
  ARM: OMAP4: Enable fix for Cortex-A9 erratas
  ARM: OMAP2+: Export SoC information to userspace
  ARM: OMAP2+: SoC name and revision unification
  ARM: OMAP2+: Move common part of late init into common function
  ARM: tegra: pm: remove duplicated include from pm.c
  ARM: davinci: da850: override mmc DT node device name
  ARM: davinci: da850: add mmc DT entries
  mmc: davinci_mmc: add DT support
  ARM: SAMSUNG: check processor type before cache restoration in resume
  ...
2013-05-02 09:31:45 -07:00
Linus Torvalds 4d26aa3054 ARM: arm-soc non-critical fixes for 3.10
Here is a collection of fixes (and some intermixed cleanups) that were
 considered less important and thus not included in the later parts of
 the 3.9-rc cycle.
 
 It's a bit all over the map, contents wise. A series of ux500 fixes
 and cleanups, a bunch of various fixes for OMAP and tegra, and some for
 Freescale i.MX and even Qualcomm MSM.
 
 Note that there's also a patch on this branch to globally turn off
 -Wmaybe-uninitialized when building with -Os. It's been posted several
 times by Arnd and no dissent was raised, but nobody seemed interested
 to pick it up. So here it is, as the topmost patch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRggtQAAoJEIwa5zzehBx3TmYP/i4Kt3JDYEbYyAqNsH3nb0mN
 3kLwViUxDdS/aZCXEaNYLwZBUgl1Zyz3oRd39zFCo4dRM2uG1AW+lC73AP3/eW6n
 2oHxI43xzwjDNPxRkiipB4NXPyIoIdbRXM6/QIxXzM9zD3MJXj7BpBBpDgGAsLov
 BQ2r28idxZE6jB4puPjVZCuyG5UMjA0Ko2Fp2em7QXarQBBscDvhAtjqNZ3JPtlN
 thASsou1B8805J7jf5G8Wz6fNeVJg2wlWMgE9ywJpKFbut4cGM4riS/QvB0fTe6d
 tmkCae0bw3UD+D+N1gYcZpeGve8oPSHbeyhrSPAfI/wAVBh0J397MgJW5/f0vW8p
 DffLjQI+S450Kw0Bab41Tn0JnMnXtYUo56yjemdxa/NQJF34ycBFQ3HOm6nFxo7U
 6tce2O775uvG0+rJfDbX6M+Mu7QoIi0p8sOdg0/W+pFK08xvaezsOc1NjqTvuYoC
 s/2LYiIJqVG6tFVU0i/46duQhdp0I/Oj7wXtFXH0ZvZPBz0cDaSU3irB3QA9pNt5
 PI6JEBg0FUPUork24gShSUf7un4Itrjlq20HTkC9/z1skx87PbB3Wa7A8jnHeFme
 tpuPRvmfBWhIhp06AIA8znhDik9xuJ4B7ypsFNM0VyoV/qx+TSIHbViVQuwcOf9b
 nAidtuhMjE+P2sAu+VGU
 =bzsu
 -----END PGP SIGNATURE-----

Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical fixes from Olof Johansson:
 "Here is a collection of fixes (and some intermixed cleanups) that were
  considered less important and thus not included in the later parts of
  the 3.9-rc cycle.

  It's a bit all over the map, contents wise.  A series of ux500 fixes
  and cleanups, a bunch of various fixes for OMAP and tegra, and some
  for Freescale i.MX and even Qualcomm MSM.

  Note that there's also a patch on this branch to globally turn off
  -Wmaybe-uninitialized when building with -Os.  It's been posted
  several times by Arnd and no dissent was raised, but nobody seemed
  interested to pick it up.  So here it is, as the topmost patch."

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
  Turn off -Wmaybe-uninitialized when building with -Os
  ARM: orion5x: include linux/cpu.h
  ARM: tegra: call cpu_do_idle from C code
  ARM: u300: fix ages old copy/paste bug
  ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7
  ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled
  ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
  ARM: tegra: fix build error when THUMB2_KERNEL enabled
  ARM: msm: Fix uncompess.h tx underrun check
  ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms
  ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: mach-imx: mach-imx6q: Fix sparse warnings
  ARM: mach-imx: src: Include "common.h
  ARM: mach-imx: gpc: Include "common.h"
  ARM: mach-imx: avic: Staticize *avic_base
  ARM: mach-imx: tzic: Staticize *tzic_base
  ARM: mach-imx: clk: Include "clk.h"
  ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
  ...
2013-05-02 08:56:55 -07:00
Daniel Lezcano f040c26ffa ARM: tegra: cpuidle: use init/exit common routine for tegra3
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:23 +02:00
Daniel Lezcano 554c06ba3e cpuidle: remove en_core_tk_irqen flag
The en_core_tk_irqen flag is set in all the cpuidle driver which
means it is not necessary to specify this flag.

Remove the flag and the code related to it.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>  # for mach-omap2/*
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano 0697598db5 ARM: tegra: cpuidle: remove useless initialization
dev->state_count is initialized automatically by
cpuidle_register_device().

When drv->state_count is equal to dev->state_count, no need to init
this field, so removing it.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-08 22:20:06 +02:00
Joseph Lo 4d82d0587b ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:45:42 -06:00
Stephen Warren 02e75d6488 ARM: tegra: remove save/restore of CPU diag register
Prior to this change, {save,restore}_cpu_arch_register() collaborated to
maintain the value of the CPU diagnostic register across power cycles.
This was required to maintain any CPU errata workaround enable bits in
that register. However, now that the Tegra reset vector code always
enables all required workarounds, there is no need to save and restore
the diagnostic register; it is always explicitly programmed in the
required manner.

Hence, remove the save/restore logic.

This has the advantage that the kernel always directly controls the value
of this register every boot, rather than relying on a bootloader or other
kernel code having previously written the correct value into it. This
makes CPU0 (which was previously saved/restored) and CPUn (which should
have been set up by the reset vector) be controlled in exactly the same
way, which is easier to debug/find/...

In particular, when converting Tegra to a multi-platform kernel, the CPU0
diagnostic register value initially comes from the bootloader. Most Tegra
bootloaders don't yet enable all required CPU bug workarounds. The
previous commit updates the kernel to do so on any CPU power cycle.
However, the save/restore code ends up over-writing the value with the
old bootloader-driven value instead of the now more-likely-to-be-correct
kernel value!

Even irrespective of multi-platform conversion, this change limits the
kernel's exposure to any WARs the bootloader didn't enable for CPU0: on
the very first LP2 transition (CPU power-saving which power-cycles the
CPU), the correct value will be enabled.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:29:22 -06:00
Prashant Gaikwad 89572c77cd ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
tegra_cpu_car_ops struct is going to be accessed from drivers/clk/tegra.
Move the tegra_cpu_car_ops to include/linux/clk/tegra.h.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Joseph Lo 8c627fa658 ARM: tegra: clean up the CPUINIT section
There are some redundant codes in the CPUINIT section that was caused by
some codes not be organized well in "headsmp.S". Currently all the codes
in "headsmp.S" were put into CPUINIT section. But actually it doesn't
need to be loacted in CPUINIT section. There is no fuction access them
in CPUINIT section and we will relocate them to IRAM.

These codes also caused some unnecessary functions that access these
codes been put into CPUINIT section too. This patch clean it up and put
them into normal text section.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:51 -07:00
Joseph Lo d552920a02 ARM: tegra30: cpuidle: add powered-down state for CPU0
This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.

Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".

Base on the work by:
Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:22 -07:00
Joseph Lo d457ef358f ARM: tegra30: cpuidle: add powered-down state for secondary CPUs
This supports power-gated idle on secondary CPUs for Tegra30. The
secondary CPUs can go into powered-down state independently. When
CPU goes into this state, it saves it's contexts and puts itself
to flow controlled WFI state. After that, it will been power gated.

Be aware of that, you may see the legacy power state "LP2" in the
code which is exactly the same meaning of "CPU power down".

Based on the work by:
Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo 0b25e25bef ARM: tegra: cpuidle: separate cpuidle driver for different chips
The different Tegra chips may have different CPU idle states and data.
Individual CPU idle driver make it more easy to maintain.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:20 -07:00