Commit Graph

12 Commits

Author SHA1 Message Date
Chunfeng Yun d4f97f10da phy: phy-mtk-tphy: add property for BC12
Some platforms support BC12 which is disabled by default,
here add a property to enable it if need

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-10 13:45:08 +05:30
Chunfeng Yun 8158e917d9 phy: phy-mtk-tphy: add properties for eye diagram test
Add properties for Eye diagram test of HQA which sometimes need
adjust some parameters of u2phy

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-10 13:45:08 +05:30
Chunfeng Yun 3003cfa147 phy: phy-mtk-tphy: use SPDX license tag
Use SPDX-License-Identifier tag instead of the GPL license text

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-10 13:45:08 +05:30
Chunfeng Yun c1eb8f8384 phy: mediatek: add XS-PHY driver
Support XS-PHY for MediaTek SoCs with USB3.1 GEN2 controller

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-20 21:51:35 +05:30
Chunfeng Yun 8833ebf4f8 phy: phy-mtk-tphy: add configurable parameters for slew rate calibrate
There are two parameters, ref_clk and coefficient, for U2 slew rate
calibrate which may vary on different SoCs, here allow them to be
configurable

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-16 13:40:42 +05:30
Chunfeng Yun 4036325609 phy: phy-mtk-tphy: keep default value of mcu_bus_ck_gate_en
The default value of mcu_bus_ck_gate_en is 1, if clear it, will
prevent system to enter deep idle mode, so keep its default value
and without affecting PCIe function.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-16 13:40:42 +05:30
Chunfeng Yun e4b227c1ca phy: phy-mtk-tphy: use of_device_get_match_data()
reduce the boilerplate code to get the specific data

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-12-29 13:00:35 +05:30
Chunfeng Yun 93a04f4f16 phy: phy-mtk-tphy: make shared banks optional for V1 TPHY
V1 TPHY for SATA doesn't have shared banks if it isn't shared
with PCIe or USB, so make it optional.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-12-29 13:00:35 +05:30
Chunfeng Yun 00c0092c5f phy: phy-mtk-tphy: use auto instead of force to bypass utmi signals
When system is running, if usb2 phy is forced to bypass utmi signals,
all PLL will be turned off, and it can't detect device connection
anymore, so replace force mode with auto mode which can bypass utmi
signals automatically if no device attached for normal flow.
But keep the force mode to fix RX sensitivity degradation issue.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-12-29 13:00:35 +05:30
Chunfeng Yun 5954a10e8e phy: phy-mtk-tphy: add set_mode callback
This is used to force PHY with USB OTG function to enter a specific
mode, and override OTG IDPIN(or IDDIG) signal.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23 11:19:25 +05:30
Chunfeng Yun 554a56fc83 phy: phy-mtk-tphy: fix NULL point of chip bank
Chip bank of version-1 is initialized as NULL, but it's used
by pcie_phy_instance_power_on/off(), so assign it a right
address.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-09-26 17:02:48 +05:30
Chunfeng Yun cd4ec4b03d phy: phy-mt65xx-usb3: add mediatek directory and rename file
The driver is actually for T-PHY which supports USB3.0, PCIe and SATA,
and supports more SoCs now, but not just only for series of mt65xx SoCs,
so the name of file, data struct, functions etc with 'mt65xx' may cause
misunderstanding when new SoCs are supported. Here rename them to reflect
the real functions and also enhance readability.

And also update MAINTAINERS file to reflect the correct driver

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:51 +05:30