Commit Graph

5 Commits

Author SHA1 Message Date
Ramalingam C 8b44fefee6 drm: HDMI and DP specific HDCP2.2 defines
This patch adds HDCP register definitions for HDMI and DP HDCP
adaptations.

HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h,
where as HDCP2.2 register offsets in DPCD offsets are defined at
drm_dp_helper.h.

v2:
  bit_field definitions are replaced by macros. [Tomas and Jani]
v3:
  No Changes.
v4:
  Comments style and typos are fixed [Uma]
v5:
  Fix for macros.
v6:
  Adds _MS to the timeouts to represent units [Sean Paul]
v7:
  Macro DP_HDCP_2_2_REG_EKH_KM_OFFSET renamed [Uma]
  Redundant macro is removed [Uma]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Sean Paul <seanpaul@chromium.org> (for merging through drm-intel)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1540806351-7137-6-git-send-email-ramalingam.c@intel.com
2018-10-29 16:22:34 +01:00
Ramalingam C af5aad0598 drm: hdcp2.2 authentication msg definitions
This patch defines the hdcp2.2 protocol messages for authentication.

v2:
  bit_fields are removed. Instead bitmasking used. [Tomas and Jani]
  prefix HDCP_2_2_ is added to the macros. [Tomas]
v3:
  No Changes.
v4:
  Style and spellings are fixed [Uma]
v5:
  Fix for macros.
v6:
  comment for Type is improved [Sean Paul]
v7:
  %s/HDCP_2_2_LPRIME_HALF_LEN/HDCP_2_2_V_PRIME_HALF_LEN [Uma]
  %s/uintxx_t/uxx
v8:
  %s/eceiver_id/receiver_id

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1540806351-7137-5-git-send-email-ramalingam.c@intel.com
2018-10-29 16:22:14 +01:00
Ramalingam C b8e47d87be drm: Fix HDCP downstream dev count read
In both HDMI and DP, device count is represented by 6:0 bits of a
register(BInfo/Bstatus)

So macro for bitmasking the device_count is fixed(0x3F->0x7F).

v3:
  Retained the Rb-ed.
v4:
  %s/drm\/i915/drm [rodrigo]
v5:
  Added "Fixes:" and HDCP keyword in subject [Rodrigo, Sean Paul]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Fixes: 495eb7f877 drm: Add some HDCP related #defines
cc: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1522929802-22850-1-git-send-email-ramalingam.c@intel.com
2018-04-16 12:10:48 -04:00
Ramalingam C 49d85d0342 drm/i915: Check for downstream topology errors
HDCP compliant Repeaters can support max of 127 devices and max
depth of 7 for downstream topology.

If these max limits are exceeded, repeater will set the
topology error flags MAX_CASCADE_EXCEEDED and/or MAX_DEVS_EXCEEDED
in Bstatus followed by asserting READY/CP_IRQ for HDCP transmitter.

This patch check for these error flags as soon as READY bit is asserted.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
[seanpaul fixed checkpatch alignment issue]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-5-git-send-email-ramalingam.c@intel.com
2018-01-18 17:56:02 -05:00
Sean Paul 495eb7f877 drm: Add some HDCP related #defines
In preparation for implementing HDCP in i915, add some HDCP related
register offsets and defines. The dpcd register offsets will go in
drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff
will get stuffed in drm_hdcp.h, which is new.

Changes in v2:
- drm_hdcp.h gets MIT license (Daniel)
Changes in v3:
- None
Changes in v4:
- None
Changes in v5:
- None
Changes in v6:
- SPDX license

Cc: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Ramalingam C <ramalingm.c@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-5-seanpaul@chromium.org
2018-01-08 14:57:54 -05:00