Commit Graph

72 Commits

Author SHA1 Message Date
Olof Johansson
5e6f82b0fe RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros
INT and SHORT are used by some drivers that pull in the include files,
so prefixing helps avoid namespace conflicts. Other constructs in the
same file already uses this.

Fixes, among others, these warnings with allmodconfig:

../sound/core/pcm_misc.c:43:0: warning: "INT" redefined
 #define INT __force int

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-30 10:01:10 -08:00
Olof Johansson
5ddf755e44 RISC-V: use generic serial.h
Fixes this from allmodconfig:

drivers/tty/serial/earlycon.c:27:10: fatal error: asm/serial.h: No such file or directory

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-30 10:01:10 -08:00
Palmer Dabbelt
bf73055273 RISC-V: remove spin_unlock_wait()
This was removed from the other architectures in commit
952111d7db ("arch: Remove spin_unlock_wait() arch-specific
definitions").  That landed between when we got upstream and when our
patches were reviewed, so this is a followup patch.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:06:31 -08:00
Palmer Dabbelt
c901e45a99 RISC-V: sfence.vma orderes the instruction cache
This is just a comment change, but it's one that bit me on the mailing
list.  It turns out that issuing a `sfence.vma` enforces instruction
cache ordering in addition to TLB ordering.  This isn't explicitly
called out in the ISA manual, but Andrew will be making that more clear
in a future revision.

CC: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:06:17 -08:00
Palmer Dabbelt
21db403660 RISC-V: Add READ_ONCE in arch_spin_is_locked()
This was just incorrect in the original version.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:05:04 -08:00
Palmer Dabbelt
9347ce54cd RISC-V: __test_and_op_bit_ord should be strongly ordered
I mis-read the documentation.  After looking at it again the
documentation is actually as clear as it can be, it's just that I didn't
actually read it in order and therefor did the wrong thing.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:04:05 -08:00
Palmer Dabbelt
3343eb6806 RISC-V: Remove smb_mb__{before,after}_spinlock()
These are obselete.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:03:55 -08:00
Palmer Dabbelt
61a60d35b7 RISC-V: Remove __smp_bp__{before,after}_atomic
These duplicate the asm-generic definitions are therefor aren't useful.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:03:48 -08:00
Palmer Dabbelt
8286d51a6c RISC-V: Comment on why {,cmp}xchg is ordered how it is
This is another memory model FIXME.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-28 14:03:29 -08:00
Palmer Dabbelt
4650d02ad2 RISC-V: Remove unused arguments from ATOMIC_OP
Our atomics are generated from a complicated series of preprocessor
macros, each of which is slightly different from the last.  When writing
the macros I'd accidentally left some unused arguments floating around.
This patch removes the unused macro arguments.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-11-28 13:53:24 -08:00
Andrew Waterman
28dfbe6ed4 RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpu
For now these are just placeholders that execute the syscall.  We will
later optimize them to avoid kernel crossings, but we'd like to have the
VDSO entries from the first released kernel version to make the ABI
simpler.

Signed-off-by: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-27 07:51:39 -08:00
Palmer Dabbelt
b7e5a59150 RISC-V: Remove __vdso_cmpxchg{32,64} symbol versions
These were left over from an earlier version of the port.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2017-11-27 07:51:39 -08:00
Linus Torvalds
b293fca43b RISC-V Port for Linux 4.15 v9
This tag contains the core RISC-V Linux port, which has been through
 nine rounds of review on various mailing lists.  The port is not
 complete: there's some cleanup patches moving through the review
 process, a whole bunch of drivers that need some work, and a lot of
 feature additions that will be needed.
 
 The patches contained in this tag have been through nine rounds of
 review on the various mailing lists.  I have some outstanding cleanup
 patches, but since there's been so much review on these patches I
 thought it would be best to submit them as-is and then submit explicit
 cleanup patches so everyone can review them.  This first patch set is
 big enough that it's a bit of a pain to constantly rewrite, and it's
 caused a few headaches with various contributors.
 
 The port is definately a work in progress.  While what's there builds
 and boots with 4.14, it's a bit hard to actually see anything happen
 because there are no device drivers yet.  I maintain a staging branch
 that contains all the device drivers and cleanup that actually works,
 but those patches won't all be ready for a while.  I'd like to get what
 we currently have into your tree so everyone can start working from a
 single base -- of particular importance is allowing the glibc
 upstreaming process to proceed so we can sort out any possibly lingering
 user-visible ABI problems we might have.
 
 Copied below is the ChangeLog that contains the history of this patch
 set:
 
 (v9) As per suggestions on our v8 patch set, I've split the core architecture code
 out from our drivers and would like to submit this patch set to be included
 into linux-next, with the goal being to be merged in during the next merge
 window.  This patch set is based on 4.14-rc2, but if it's better to have it
 based on something else then I can change it around.
 
 This patch set contains just the core arch code for RISC-V, so while it builds
 an nominally boots, you can't print or take an interrupt so it's not that
 useful.  If you're looking to actually boot a system it would probably be
 better to use the full patch set listed below.
 
 We've collected a handful of tags from reviewers, and the remainder of the
 patch set only got minimal feedback last time.  Here's what changed:
 
  * We now use the device tree to initialize the timer driver so it's less
    tighly coupled with the arch port.
  * I cleaned up the defconfigs -- there's actually now just one, and it's
    empty.  For now I think we're OK with what the kernel sets as defaults, but
    I anticipate we'll begin to expand this as people start to use the port
    more.
  * The VDSO symbols version is sane.
  * We WFI while spinning in the boot loop.
  * A handful of comments have been added.
 
 While there are still a handful of FIXMEs in this patch set, we've started to
 get enough interest from various users and contributors that maintaining an out
 of tree patch set is starting to become a big burden.  Hopefully the patches
 are good enough to merge now, which will at least get everyone working in a
 more reasonable manner as we clean up the remaining issues.
 
 This patch set is also availiable on github
 
   https://github.com/riscv/riscv-linux/tree/riscv-for-submission-v9-arch
 
 as is the entire patch set necessary to get a more functional RISC-V system up
 and running, including a handful of patches that aren't ready for upstream yet.
 
   https://github.com/riscv/riscv-linux/tree/riscv-for-submission-v9
 
 Hopefully I've managed to get everyone's feedback
 
 Here's the change highlights from the whole patch set:
 
 (v8) I know it may not be the ideal time to submit a patch set right now, as
 it's the middle of the merge window, but things have calmed down quite a bit in
 the last month so I thought it would be good to get everyone on the same page.
 There's been a handful of changes since the last patch set, but most of them
 are fairly minor:
 
 * We changed PAGE_OFFSET to allowing mapping more physical memory on 64-bit
   systems.  This is user configurable, as it triggers a different code model
   that generates slightly less efficient code.
 * The device tree binding documentation is back, I'd managed to lose it at some
   point.
 * We now pass the atomic64 test suite.  The SBI timer driver has been
 * refactored.
 
 (v7) It's been a while since my last patch set, but the changes han been fairly
 minimal:
 
  * The PCI cleanup patches have been dropped, we'll do them as a separate patch
    set later.
  * We've the Kconfig entries from CONFIG_ISA_* to CONFIG_RISCV_ISA_*, to make
    grep easier.
  * There have been a handful of memory model related tweaks in I/O land,
    particularly relating the PCI and the upcoming platform specification.
    There are significant comments in the relevant files.  This is still a WIP,
    but I think we're close to getting as good as we're going to get until we
    end up with some more specifications.
 
 (v6) As it's been only a day since the v5 patch set, the changes are pretty
 minimal:
 
  * The patch set is now based on linux-next/master, which I believe is a better
    base now that we're getting closer to upstream.
  * EARLY_PRINTK is no longer an option.  Since the SBI console is reasonable,
    there's no penalty to enabling it (and thus no benefit to disabling it).
  * The mmap syscalls were refactored a bit.
 
 (v5) Things have really started to calm down, so this is fairly similar to the
 v4 patch set.  The most interesting changes include:
 
  * We've moved back to a single patch set.
 
  * SMP support has been fixed, I was accidentally running on a non-SMP
    configuration.  There were various mistakes all over the tree as a result of
    this.
 
  * The cmpxchg syscalls have been removed, as they were deemed a bad idea.  As
    a result, RISC-V Linux systems mandate the A extension.  The corresponding
    Kconfig entry to enable builds on non-A systems has been removed.
 
  * A few more atomic fixes: mostly fence changes, but those resulted in a
    handful of additional macros that were no longer necessary.
 
  * riscv_early_sie has been removed.
 
 (v4) There have only been a few changes since the v3 patch set:
 
  * The cmpxchg64 syscall is no longer enabled on 32-bit systems.  It's not
    possible to provide this on SMP systems, and it's not necessary as glibc
    knows not to call it.
 
  * We provide a ELF_HWCAP so users can determine the ISA of the machine the
    kernel is running on.
 
  * The multi-line comments are in a better form.
 
  * There were a handful of headers that could be replaced with the asm-generic
    versions, and a few unnecessary definitions.
 
  * We no longer use printk, but instead use pr_*.
 
  * A few Kconfig and defconfig entries have been cleaned up.
 
 (v3) A highlight of the changes since the v2 patch set includes:
 
  * We've split out all our drivers into separate patch sets, which I've already
    sent out to the relevant maintainers.  I haven't included those patches in
    this patch set, but some of them are necessary to build our port.  A git
    tree that contains all our patch sets merged together lives at
    <https://github.com/riscv/riscv-linux/tree/riscv-for-submission-v3>.
 
  * The patch set is now split up differently: rather than being split per
    directory it is split per topic.  Hopefully this will make it easier to
    review the port on the mailing list.  The split is a bit rough, so you
    probably still want to look at the patch set as a whole.
 
  * atomic.h has been completely rewritten and is hopefully now correct.  I've
    attempted to sanitize the various other memory model related code as well,
    and I think it should all be sane now aside from a handful of FIXMEs
    commented in the code.
 
  * We've changed the cmpexchg syscall to always exist and to not be
    multiplexed.  There is also a VDSO entry for compare and exchange, which
    allows kernels with the A extension to execute user code without the A
    extension reasonably fast.
 
  * Our user-visible register state now contains enough space for the Q
    extension for 128-bit floating point, as well as a few words to allow
    extensibility to future ISA extensions like the eventual V extension for
    vectors.
 
  * A handful of driver cleanups, but these have been split into separate patch
    sets now so I won't duplicate them here.
 
 (v2) A highlight of the changes since the v1 patch set includes:
 
   * We've split out our drivers into the right places, which means now there's
     a lot more patches.  I'll be submitting these patches to various subsystem
     maintainers and including them in any future RISC-V patch sets until
     they've been merged.
 
   * The SBI console driver has been completely rewritten to use the HVC helpers
     and is now significantly smaller.
 
   * We've begun to use weaker barriers as opposed to just the big "fence".
     There's still some work to do here, specifically:
     - We need fences in the relaxed MMIO functions.
     - The non-relaxed MMIO functions are missing R/W bits on their fences.
     - Many AMOs need the aq and rl bits set.
 
   * We now have thread_info in task_struct.  As a result, sscratch now contains
     TP instead of SP.  This was necessary because thread_info is no longer on
     the stack.
 
   * A few shared routines have been added that we use instead of creating
     another arch copy.
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Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux

Pull RISC-V architecture support from Palmer Dabbelt:
 "This contains the core RISC-V Linux port, which has been through nine
  rounds of review on various mailing lists. The port is not complete:
  there's some cleanup patches moving through the review process, a
  whole bunch of drivers that need some work, and a lot of feature
  additions that will be needed.

  The patches contained in this tag have been through nine rounds of
  review on the various mailing lists. I have some outstanding cleanup
  patches, but since there's been so much review on these patches I
  thought it would be best to submit them as-is and then submit explicit
  cleanup patches so everyone can review them. This first patch set is
  big enough that it's a bit of a pain to constantly rewrite, and it's
  caused a few headaches with various contributors.

  The port is definately a work in progress. While what's there builds
  and boots with 4.14, it's a bit hard to actually see anything happen
  because there are no device drivers yet. I maintain a staging branch
  that contains all the device drivers and cleanup that actually works,
  but those patches won't all be ready for a while. I'd like to get what
  we currently have into your tree so everyone can start working from a
  single base -- of particular importance is allowing the glibc
  upstreaming process to proceed so we can sort out any possibly
  lingering user-visible ABI problems we might have.

  Copied below is the ChangeLog that contains the history of this patch
  set:

   (v9) As per suggestions on our v8 patch set, I've split the core
        architecture code out from our drivers and would like to submit
        this patch set to be included into linux-next, with the goal
        being to be merged in during the next merge window. This patch
        set is based on 4.14-rc2, but if it's better to have it based on
        something else then I can change it around.

        This patch set contains just the core arch code for RISC-V, so
        while it builds an nominally boots, you can't print or take an
        interrupt so it's not that useful. If you're looking to actually
        boot a system it would probably be better to use the full patch
        set listed below.

        We've collected a handful of tags from reviewers, and the
        remainder of the patch set only got minimal feedback last time.
        Here's what changed:

         - We now use the device tree to initialize the timer driver so
           it's less tighly coupled with the arch port.

         - I cleaned up the defconfigs -- there's actually now just one,
           and it's empty. For now I think we're OK with what the kernel
           sets as defaults, but I anticipate we'll begin to expand this
           as people start to use the port more.

         - The VDSO symbols version is sane.

         - We WFI while spinning in the boot loop.

         - A handful of comments have been added.

        While there are still a handful of FIXMEs in this patch set,
        we've started to get enough interest from various users and
        contributors that maintaining an out of tree patch set is
        starting to become a big burden. Hopefully the patches are good
        enough to merge now, which will at least get everyone working in
        a more reasonable manner as we clean up the remaining issues.

   (v8) I know it may not be the ideal time to submit a patch set right
        now, as it's the middle of the merge window, but things have
        calmed down quite a bit in the last month so I thought it would
        be good to get everyone on the same page. There's been a handful
        of changes since the last patch set, but most of them are fairly
        minor:

         - We changed PAGE_OFFSET to allowing mapping more physical
           memory on 64-bit systems. This is user configurable, as it
           triggers a different code model that generates slightly less
           efficient code.

         - The device tree binding documentation is back, I'd managed to
           lose it at some point.

         - We now pass the atomic64 test suite

         - The SBI timer driver has been refactored.

   (v7) It's been a while since my last patch set, but the changes han
        been fairly minimal:

         - The PCI cleanup patches have been dropped, we'll do them as a
           separate patch set later.

         - We've the Kconfig entries from CONFIG_ISA_* to
           CONFIG_RISCV_ISA_*, to make grep easier.

         - There have been a handful of memory model related tweaks in
           I/O land, particularly relating the PCI and the upcoming
           platform specification. There are significant comments in the
           relevant files. This is still a WIP, but I think we're close
           to getting as good as we're going to get until we end up with
           some more specifications.

   (v6) As it's been only a day since the v5 patch set, the changes are
        pretty minimal:

         - The patch set is now based on linux-next/master, which I
           believe is a better base now that we're getting closer to
           upstream.

         - EARLY_PRINTK is no longer an option. Since the SBI console is
           reasonable, there's no penalty to enabling it (and thus no
           benefit to disabling it).

         - The mmap syscalls were refactored a bit.

   (v5) Things have really started to calm down, so this is fairly
        similar to the v4 patch set. The most interesting changes
        include:

         - We've moved back to a single patch set.

         - SMP support has been fixed, I was accidentally running on a
           non-SMP configuration. There were various mistakes all over
           the tree as a result of this.

         - The cmpxchg syscalls have been removed, as they were deemed a
           bad idea. As a result, RISC-V Linux systems mandate the A
           extension. The corresponding Kconfig entry to enable builds
           on non-A systems has been removed.

         - A few more atomic fixes: mostly fence changes, but those
           resulted in a handful of additional macros that were no
           longer necessary.

         - riscv_early_sie has been removed.

   (v4) There have only been a few changes since the v3 patch set:

         - The cmpxchg64 syscall is no longer enabled on 32-bit systems.
           It's not possible to provide this on SMP systems, and it's
           not necessary as glibc knows not to call it.

         - We provide a ELF_HWCAP so users can determine the ISA of the
           machine the kernel is running on.

         - The multi-line comments are in a better form.

         - There were a handful of headers that could be replaced with
           the asm-generic versions, and a few unnecessary definitions.

         - We no longer use printk, but instead use pr_*.

         - A few Kconfig and defconfig entries have been cleaned up.

   (v3) A highlight of the changes since the v2 patch set includes:

         - We've split out all our drivers into separate patch sets,
           which I've already sent out to the relevant maintainers. I
           haven't included those patches in this patch set, but some of
           them are necessary to build our port.

         - The patch set is now split up differently: rather than being
           split per directory it is split per topic. Hopefully this
           will make it easier to review the port on the mailing list.
           The split is a bit rough, so you probably still want to look
           at the patch set as a whole.

         - atomic.h has been completely rewritten and is hopefully now
           correct. I've attempted to sanitize the various other memory
           model related code as well, and I think it should all be sane
           now aside from a handful of FIXMEs commented in the code.

         - We've changed the cmpexchg syscall to always exist and to not
           be multiplexed. There is also a VDSO entry for compare and
           exchange, which allows kernels with the A extension to
           execute user code without the A extension reasonably fast.

         - Our user-visible register state now contains enough space for
           the Q extension for 128-bit floating point, as well as a few
           words to allow extensibility to future ISA extensions like
           the eventual V extension for vectors.

         - A handful of driver cleanups, but these have been split into
           separate patch sets now so I won't duplicate them here.

   (v2) A highlight of the changes since the v1 patch set includes:

         - We've split out our drivers into the right places, which
           means now there's a lot more patches. I'll be submitting
           these patches to various subsystem maintainers and including
           them in any future RISC-V patch sets until they've been
           merged.

         - The SBI console driver has been completely rewritten to use
           the HVC helpers and is now significantly smaller.

         - We've begun to use weaker barriers as opposed to just the big
           "fence". There's still some work to do here, specifically:
            - We need fences in the relaxed MMIO functions.
            - The non-relaxed MMIO functions are missing R/W bits on their fences.
            - Many AMOs need the aq and rl bits set.

         - We now have thread_info in task_struct. As a result, sscratch
           now contains TP instead of SP. This was necessary because
           thread_info is no longer on the stack.

         - A few shared routines have been added that we use instead of
           creating another arch copy"

Reviewed-by: Arnd Bergmann <arnd@arndb.de>

* tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
  RISC-V: Build Infrastructure
  RISC-V: User-facing API
  RISC-V: Paging and MMU
  RISC-V: Device, timer, IRQs, and the SBI
  RISC-V: Task implementation
  RISC-V: ELF and module implementation
  RISC-V: Generic library routines and assembly
  RISC-V: Atomic and Locking Code
  RISC-V: Init and Halt Code
  dt-bindings: RISC-V CPU Bindings
  lib: Add shared copies of some GCC library routines
  MAINTAINERS: Add RISC-V
2017-11-15 10:49:15 -08:00
Palmer Dabbelt
fbe934d69e RISC-V: Build Infrastructure
This patch contains all the build infrastructure that actually enables
the RISC-V port.  This includes Makefiles, linker scripts, and Kconfig
files.  It also contains the only top-level change, which adds RISC-V to
the list of architectures that need a sed run to produce the ARCH
variable when building locally.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:49 -07:00
Palmer Dabbelt
e2c0cdfba7 RISC-V: User-facing API
This patch contains code that is in some way visible to the user:
including via system calls, the VDSO, module loading and signal
handling.  It also contains some generic code that is ABI visible.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:48 -07:00
Palmer Dabbelt
07037db5d4 RISC-V: Paging and MMU
This patch contains code to manage the RISC-V MMU, including definitions
of the page tables and the page walking code.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:47 -07:00
Palmer Dabbelt
6d60b6ee0c RISC-V: Device, timer, IRQs, and the SBI
This patch contains code that interfaces with devices that are mandated
by the RISC-V supervisor specification and that don't have explicit
drivers anywhere else in the tree.  This includes the staticly defined
interrupts, the CSR-mapped timer, and virtualized SBI devices.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:47 -07:00
Palmer Dabbelt
7db91e57a0 RISC-V: Task implementation
This patch contains the implementation of tasks on RISC-V, most of which
is involved in task switching.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:46 -07:00
Palmer Dabbelt
2129a235c0 RISC-V: ELF and module implementation
This patch contains the code that interfaces with ELF objects on RISC-V
systems, the vast majority of which is present to load kernel modules.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:46 -07:00
Palmer Dabbelt
5d8544e2d0 RISC-V: Generic library routines and assembly
This patch contains code that is more specific to the RISC-V ISA than it
is to Linux.  It contains string and math operations, C wrappers for
various assembly instructions, stack walking code, and uaccess.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:45 -07:00
Palmer Dabbelt
fab957c11e RISC-V: Atomic and Locking Code
This contains all the code that directly interfaces with the RISC-V
memory model.  While this code corforms to the current RISC-V ISA
specifications (user 2.2 and priv 1.10), the memory model is somewhat
underspecified in those documents.  There is a working group that hopes
to produce a formal memory model by the end of the year, but my
understanding is that the basic definitions we're relying on here won't
change significantly.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:45 -07:00
Palmer Dabbelt
76d2a0493a RISC-V: Init and Halt Code
This contains the various __init C functions, the initial assembly
kernel entry point, and the code to reset the system.  When a file was
init-related this patch contains the entire file.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:44 -07:00