Commit Graph

5 Commits

Author SHA1 Message Date
Luc Van Oostenryck 889d746edd
riscv: add riscv-specific predefines to CHECKFLAGS
RISC-V uses the macro __riscv_xlen, predefined by GCC, to
make the distinction between 32 or 64 bit code.

However, sparse doesn't know anything about this macro
which lead to wrong warnings and failures.

Fix this by adding a define of __riscv_xlen to CHECKFLAGS
and add one for __riscv too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-06-11 09:03:43 -07:00
Palmer Dabbelt 7a8e7da422
RISC-V: Fixes to module loading
This cleans up the module support that was commited earlier to work with
what's actually emitted from our GCC port as it lands upstream.  Most of
the work here is adding new relocations to the kernel.

There's some limitations on module loading imposed by the kernel:

* The kernel doesn't support linker relaxation, which is necessary to
  support R_RISCV_ALIGN.  In order to get reliable module building
  you're going to need to a GCC that supports the new '-mno-relax',
  which IIRC isn't going to be out until 8.1.0.  It's somewhat unlikely
  that R_RISCV_ALIGN will appear in a module even without '-mno-relax'
  support, so issues shouldn't be common.

* There is no large code model for RISC-V, which means modules must be
  loaded within a 32-bit signed offset of the kernel.  We don't
  currently have any mechanism for ensuring this memory remains free or
  moving pages around, so issues here might be common.

I fixed a singcle merge conflict in arch/riscv/kernel/Makefile.
2018-04-02 20:43:14 -07:00
Zong Li ab1ef68e54
RISC-V: Add sections of PLT and GOT for kernel module
The address of external symbols will locate more than 32-bit offset
in 64-bit kernel with sv39 or sv48 virtual addressing.

Module loader emits the GOT and PLT entries for data symbols and
function symbols respectively.

The PLT entry is a trampoline code for jumping to the 64-bit
real address. The GOT entry is just the data symbol address.

Signed-off-by: Zong Li <zong@andestech.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-04-02 20:00:54 -07:00
Alan Kao a1d2a6b4ce
riscv/ftrace: Add RECORD_MCOUNT support
Now recordmcount.pl recognizes RISC-V object files. For the mechanism to
work, we have to disable the linker relaxation.

Cc: Greentime Hu <greentime@andestech.com>
Signed-off-by: Alan Kao <alankao@andestech.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-04-02 19:59:10 -07:00
Palmer Dabbelt fbe934d69e RISC-V: Build Infrastructure
This patch contains all the build infrastructure that actually enables
the RISC-V port.  This includes Makefiles, linker scripts, and Kconfig
files.  It also contains the only top-level change, which adds RISC-V to
the list of architectures that need a sed run to produce the ARCH
variable when building locally.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-26 15:26:49 -07:00