linux

Commit Graph

Author	SHA1	Message	Date
Joachim Eastwood	cfd093bbb5	phy: lpc18xx-usb-otg: fix clock order in phy init Changing the frequency of the USB clock must be done before the PLL is powered on (prepared). This matters when the USB clock is not setup by either boot ROM or boot loader. Reorder the function calls to adhere to the order noted in the user manual. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>	2015-08-10 20:11:58 +05:30
Joachim Eastwood	cbf919bd32	phy: add lpc18xx usb otg phy driver Add PHY driver for the internal USB OTG PHY found on NXP LPC18xx and LPC43xx devices. This driver takes care of enabling the PHY in CREG (syscon) and setting the required clock frequency. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>	2015-07-25 15:45:46 +05:30

Author

SHA1

Message

Date

Joachim Eastwood

cfd093bbb5

phy: lpc18xx-usb-otg: fix clock order in phy init

Changing the frequency of the USB clock must be done before the
PLL is powered on (prepared). This matters when the USB clock
is not setup by either boot ROM or boot loader. Reorder the
function calls to adhere to the order noted in the user manual.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

2015-08-10 20:11:58 +05:30

Joachim Eastwood

cbf919bd32

phy: add lpc18xx usb otg phy driver

Add PHY driver for the internal USB OTG PHY found on NXP
LPC18xx and LPC43xx devices. This driver takes care of
enabling the PHY in CREG (syscon) and setting the required
clock frequency.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

2015-07-25 15:45:46 +05:30

2 Commits