linux

Commit Graph

Author	SHA1	Message	Date
Yong Shen	644b1d586d	ARM i.MX53: Some bug fix about MX53 MSL code 1. pll_base address should return right value 2. uart parent clk is from pll3 Signed-off-by: Yong Shen <yong.shen@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2011-01-04 12:00:23 +01:00
Dinh Nguyen	c0abefd30b	ARM: imx: Add core definitions for MX53 Add iomux, clocks, and memory map for Freescale's MX53 SoC. Add cpu_is_mx53 function to common.h. Add 3 more banks of gpio's to mxc_gpio_ports. Add MX53 phys offset address. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>	2010-11-24 10:09:04 +01:00
Amit Kucheria	a329b48c43	mxc: Core support for Freescale i.MX5 series Add basic clock support, cpu identification, I/O mapping, interrupt controller, serial port and ethernet. Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>	2010-02-09 18:32:16 +02:00

Author

SHA1

Message

Date

Yong Shen

644b1d586d

ARM i.MX53: Some bug fix about MX53 MSL code

1. pll_base address should return right value
2. uart parent clk is from pll3

Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2011-01-04 12:00:23 +01:00

Dinh Nguyen

c0abefd30b

ARM: imx: Add core definitions for MX53

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2010-11-24 10:09:04 +01:00

Amit Kucheria

a329b48c43

mxc: Core support for Freescale i.MX5 series

Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>

2010-02-09 18:32:16 +02:00

3 Commits