Commit Graph

6 Commits

Author SHA1 Message Date
Gregory Bean 69b7f6ff85 msm: add MSM8x60 FFA support
The MSM8X60 FFA contains different components than the MSM8X60 SURF,
and therefore requires a different ARCH type and machine ID.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:49 -07:00
Steve Muckle 57bbf1cc8c msm: MSM8X60 simulator board support
Board configuration for MSM8X60 simulation.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:48 -07:00
Steve Muckle 49b76f718d msm: add msm8x60_surf machine
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:47 -07:00
Abhijeet Dharmapurikar e4fbb68f45 msm: 8x60: setup correct handlers for private interrupts
Private Peripheral interrupts could be edge triggered or level triggered
depending on the platform. Initialize handlers for these in board file.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:45 -07:00
Steve Muckle 9161d303af msm: 8x60: gic initialization fixup for RUMI
On RUMI platform STIs are not enabled by default, contrary to the
GIC spec. The bits for STIs in the enable/enable clear registers
are also RW instead of RO. STIs need to be enabled at initialization
time.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:40 -07:00
Steve Muckle a55df6edcf msm: MSM8X60 RUMI3 board support
Board configuration for MSM8X60 emulation on RUMI3.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:37 -07:00