* use 8 clk setting for active clocks == 7 (was 12 clk)
* use 12 clk setting for active clocks > 12 (was 8 clk)
* do 66MHz bus fixup before mapping active clocks
* fix setup of PIO command timings
Acked-by: Jung-Ik (John) Lee <jilee@google.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
MWDMA modes are not supported by this driver currently.
Acked-by: Jung-Ik (John) Lee <jilee@google.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This is a new pata driver for ARTOP 867X 64bit 4-channel UDMA133 ATA ctrls.
Based on the Atp867 data sheet rev 1.2, Acard, and in part on early ide codes
from Eric Uhrhane <ericu@google.com>.
Signed-off-by: John(Jung-Ik) Lee <jilee@google.com>
Reviewed-by: Grant Grundler <grundler@google.com>
Reviewed-by: Gwendal Gringo <gwendal@google.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Bartlomiej Zolnierkiewicz
John(Jung-Ik) Lee