Commit Graph

1067 Commits

Author SHA1 Message Date
Rafael J. Wysocki bfde19c4c2 Merge branches 'powercap' and 'acpi-lpss' with new device IDs
* powercap:
  powercap / RAPL: add support for ValleyView Soc

* acpi-lpss:
  ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs
2013-12-27 00:43:24 +01:00
Laurent Pinchart 8620f394c4 sh-pfc: Fix PINMUX_GPIO macro
Commit 7cbb0e55e2 ("sh-pfc: Don't duplicate argument to PINMUX_GPIO
macro") erronesouly modified the PINMUX_GPIO macro in a way that
resulted in all pins being named "name". Fix the macro to name the pins
correctly.

Cc: stable@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-10 13:12:28 +01:00
Laurent Pinchart 71493de7e5 sh-pfc: sh7372: Fix pin bias setup
When computing the pin configuration register offset the bias setup code
erroneously compares the pin number range with the loop index instead of
the pin number. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-03 10:38:41 +01:00
Laurent Pinchart 5d27619498 sh-pfc: r8a7740: Fix pin bias setup
When computing the pin configuration register offset the bias setup code
erroneously compares the pin number range with the loop index instead of
the pin number. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-03 10:38:39 +01:00
Axel Lin a9e51fe5e6 pinctrl: abx500: Fix header file include guard
Fix a trivial typo.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-02 11:37:48 +01:00
Paul Drews f6308b36c4 ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs
This adds the new ACPI ID (INT33FC) for the BayTrail GPIO
banks as seen on a BayTrail M System-On-Chip platform.  This
ACPI ID is used by the BayTrail GPIO (pinctrl) driver to
manage the Low Power Subsystem (LPSS).

Signed-off-by: Paul Drews <paul.drews@intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-11-30 15:07:36 +01:00
Dan Carpenter d32c3e260f pinctrl: rockchip: missing unlock on error in rockchip_set_pull()
We need to unlock here before returning -EINVAL.

Fixes: 6ca5274d1d ('pinctrl: rockchip: add rk3188 specifics')

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-25 09:08:18 +01:00
Dan Carpenter c590854dff pinctrl: abx500: fix some more bitwise AND tests
I sent a patch to fix some bitwise AND tests but I guess I missed some.
Sorry about that.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-25 09:08:18 +01:00
Dan Carpenter 38d321c899 pinctrl: rockchip: testing the wrong variable
There is a copy and paste bug so we test "info->reg_base" instead of
"info->reg_pull".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-25 09:08:18 +01:00
Roger Quadros c9b3a7d227 pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed
On OMAPs the IO ring must be rearmed each time the pad wakeup
configuration is changed. So call pcs_soc->rearm() from
pcs_irq_set().

As pinctrl-single is now an interrupt controller in some cases,
we should follow the standards and keep the interrupts enabled
constantly, and not just for wake-up events. The tracking of
runtime vs wake-up interrupts can be handled separately for
the automated runtime PM solution when we have it in the
future.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[tony@atomide.com: removed wrong comment, updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-14 10:43:17 -08:00
Linus Torvalds c2d3306991 GPIO bulk changes for the v3.13 development cycle
- Merged the GPIO descriptor API from Alexandre Courbot.
   This is a first step toward trying to get rid of the
   global GPIO numberspace for the future.
 
 - Add an API so that driver can flag that a certain GPIO
   line is being used by a irqchip backend for generating
   IRQs, so that we can enforce checks, like not allowing
   users to switch that line to an output at runtime, since
   this makes no sense. Implemented corresponding calls
   in a few select drivers.
 
 - ACPI GPIO cleanups, refactorings and switch to using the
   descriptor-based interface.
 
 - Support for the TPS80036 Palmas GPIO variant.
 
 - A new driver for the Broadcom Kona GPIO SoC IP block.
 
 - Device tree support for the PCF857x driver.
 
 - A set of ARM GPIO refactorings with the goal of getting
   rid of a bunch of custom GPIO implementations from the
   arch/arm/* tree:
 
   - Move the IOP GPIO driver to the GPIO subsystem and
     fix all users to use the gpiolib API for accessing
     GPIOs. Delete the old custom GPIO implementation.
 
   - Delete the unused custom PXA GPIO implemention.
 
   - Convert all users of the IXP4 custom GPIO
     implementation to use gpiolib and delete the custom
     implementation.
 
   - Delete the custom Gemini GPIO implementation, also
     completely unused.
 
 - Various cleanups and renamings.
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Merge tag 'gpio-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO changes from Linus Walleij:
 "Here is the bulk of GPIO changes for the v3.13 development cycle.

  I've got ACKs for the things that affect other subsystems (or it's my
  own subsystem, like pinctrl).  Most of that pertain to an attempt from
  my side to consolidate and get rid of custom GPIO implementations in
  the ARM tree.  I will continue doing this.

  The main change this time is the new GPIO descriptor API, background
  for this can be found in Corbet's summary from this january in LWN:

    http://lwn.net/Articles/533632/

  Summary:

   - Merged the GPIO descriptor API from Alexandre Courbot.  This is a
     first step toward trying to get rid of the global GPIO numberspace
     for the future.

   - Add an API so that driver can flag that a certain GPIO line is
     being used by a irqchip backend for generating IRQs, so that we can
     enforce checks, like not allowing users to switch that line to an
     output at runtime, since this makes no sense.  Implemented
     corresponding calls in a few select drivers.

   - ACPI GPIO cleanups, refactorings and switch to using the
     descriptor-based interface.

   - Support for the TPS80036 Palmas GPIO variant.

   - A new driver for the Broadcom Kona GPIO SoC IP block.

   - Device tree support for the PCF857x driver.

   - A set of ARM GPIO refactorings with the goal of getting rid of a
     bunch of custom GPIO implementations from the arch/arm/* tree:

     * Move the IOP GPIO driver to the GPIO subsystem and fix all users
       to use the gpiolib API for accessing GPIOs.  Delete the old
       custom GPIO implementation.

     * Delete the unused custom PXA GPIO implemention.

     * Convert all users of the IXP4 custom GPIO implementation to use
       gpiolib and delete the custom implementation.

     * Delete the custom Gemini GPIO implementation, also completely
       unused.

   - Various cleanups and renamings"

* tag 'gpio-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (85 commits)
  gpio: gpio-mxs: Remove unneeded dt checks
  gpio: pl061: don't depend on CONFIG_ARM
  gpio: bcm-kona: add missing .owner to struct gpio_chip
  gpiolib: provide a declaration of seq_file in gpio/driver.h
  gpiolib: include gpio/consumer.h in of_gpio.h for desc_to_gpio()
  gpio: provide stubs for devres gpio functions
  gpiolib: devres: add missing headers
  gpiolib: make GPIO_DEVRES depend on GPIOLIB
  gpiolib: devres: fix devm_gpiod_get_index()
  gpiolib / ACPI: document the GPIO descriptor based interface
  gpiolib / ACPI: allow passing GPIOF_ACTIVE_LOW for GpioInt resources
  gpiolib / ACPI: add ACPI support for gpiod_get_index()
  gpiolib / ACPI: convert to gpiod interfaces
  gpiolib: add gpiod_get() and gpiod_put() functions
  gpiolib: port of_ functions to use gpiod
  gpiolib: export descriptor-based GPIO interface
  Fixup "MAINTAINERS: GPIO-INTEL-MID: add maintainer"
  gpio: bcm281xx: Don't print addresses of GPIO area in probe()
  gpio: tegra: use new gpio_lock_as_irq() API
  gpio: rcar: Include linux/of.h header
  ...
2013-11-12 15:50:46 +09:00
Linus Torvalds 8a5dc585d5 Main pin control pull request for the v3.13 cycle:
- Blackfin ADI pin control driver, we move yet another
   architecture under this subsystem umbrella.
 
 - Incremental updates to the Renesas Super-H PFC pin control
   driver. New subdriver for the r8a7791 SoC.
 
 - Non-linear GPIO ranges from the gpiolib side of things,
   this enabled simplified device tree bindings by referring
   entire groups of pins on some pin controller to act as
   back-end for a certain GPIO-chip driver.
 
 - Add the Abilis TB10x pin control driver used on the ARC
   architecture. Also the corresponding GPIO driver is merged
   through this tree, so the ARC has full support for pins
   and GPIOs after this.
 
 - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin
   controller instances. The i.MX1 and i.MX27 is an entirely
   new family (silicon) of controllers whereas i.MX50 is
   a variant of the previous supported controller.
 
 - Then the usual slew of fixes, cleanups and incremental
   updates.
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Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Main pin control pull request for the v3.13 cycle.

  The changes hitting arch/blackfin are ACKed by the Blackfin
  maintainer, and the device tree bindings are ACKed to the extent
  possible by someone from the device tree maintainers group.

   - Blackfin ADI pin control driver, we move yet another architecture
     under this subsystem umbrella.

   - Incremental updates to the Renesas Super-H PFC pin control driver.
     New subdriver for the r8a7791 SoC.

   - Non-linear GPIO ranges from the gpiolib side of things, this
     enabled simplified device tree bindings by referring entire groups
     of pins on some pin controller to act as back-end for a certain
     GPIO-chip driver.

   - Add the Abilis TB10x pin control driver used on the ARC
     architecture.  Also the corresponding GPIO driver is merged through
     this tree, so the ARC has full support for pins and GPIOs after
     this.

   - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller
     instances.  The i.MX1 and i.MX27 is an entirely new family
     (silicon) of controllers whereas i.MX50 is a variant of the
     previous supported controller.

   - Then the usual slew of fixes, cleanups and incremental updates"

The ARC DT changes are apparently still pending, that hopefully gets
sorted out in a timely manner.

* tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: imx50: add pinctrl support code for the IMX50 SoC
  pinctrl: at91: copy define to driver
  pinctrl: remove minor dead code
  pinctrl: imx: fix using pin->input_val wrongly
  pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe()
  gpio: tb10x: fix return value check in tb10x_gpio_probe()
  gpio: tb10x: use module_platform_driver to simplify the code
  pinctrl: imx27: imx27 pincontrol driver
  pinctrl: imx1 core driver
  pinctrl: sh-pfc: r8a7791 PFC support
  sh-pfc: r8a7778: Add CAN pin groups
  gpio: add TB10x GPIO driver
  pinctrl: at91: correct a few typos
  pinctrl: mvebu: remove redundant of_match_ptr
  pinctrl: tb10x: use module_platform_driver to simplify the code
  pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()
  pinctrl: add documentation for pinctrl_get_group_pins()
  pinctrl: rockchip: emulate both edge triggered interrupts
  pinctrl: rockchip: add rk3188 specifics
  pinctrl: rockchip: remove redundant check
  ...
2013-11-12 15:40:03 +09:00
Greg Ungerer 9da8312048 pinctrl: imx50: add pinctrl support code for the IMX50 SoC
Add code to support the specific pin arrangements of the Freescale IMX50 SoC.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-06 10:06:59 +01:00
Linus Walleij 94daf85e3c pinctrl: at91: copy define to driver
The #define for the maximum number of GPIO blocks was retrieved
into pinctrl-at91.c by implicit inclusion of <mach/gpio.h>
from <linux/gpio.h> creating a dependency on machine-local
<mach/gpio.h>. Break the depenency by copying this single
define into the driver.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-05 10:54:27 +01:00
Michael Opdenacker 808e657c5c pinctrl: remove minor dead code
This removes a test whether the 'desc' variable is NULL.
This possibility has already been eliminated by the
below test earlier in the loop:

                if (desc == NULL) {
                        dev_warn(pctldev->dev,
                                 "could not get pin desc for pin %d\n",
                                 pins[i]);
                        continue;
                }

Found with Coverity: CID #1090078

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-04 13:07:05 +01:00
Peter Chen a3183c60e3 pinctrl: imx: fix using pin->input_val wrongly
The commit: "pinctrl: imx: Use struct type for pins" relaced
pin->input_reg by pin->input_val wrongly, fix it at this commit.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-04 13:04:26 +01:00
Linus Walleij de91a3789d Merge branch 'pinmux/next/pfc' of git://linuxtv.org/pinchartl/fbdev into devel 2013-11-04 13:02:37 +01:00
Wei Yongjun 5e1109adde pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe()
In case of error, the function devm_ioremap_nocache() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value check
should be replaced with NULL test.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-11-04 12:49:56 +01:00
Markus Pargmann e16dbf6011 pinctrl: imx27: imx27 pincontrol driver
imx27 pincontrol driver using the imx1 core driver. The DT bindings are
similar to other imx pincontrol drivers.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-29 08:58:06 -07:00
Markus Pargmann 30612cd900 pinctrl: imx1 core driver
Core driver for register formats of imx1/imx21/imx27 processors.

The pins of those processors are grouped into ports. Each port has 32
pins. The pins mux configuration is controlled by registers with 1 or 2
bit per pin, depending on the specific control register.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-29 06:54:37 -07:00
Hisashi Nakamura 5088451962 pinctrl: sh-pfc: r8a7791 PFC support
Add PFC support for the r8a7791 SoC V2 including pin groups for
on-chip devices such as MSIOF, SCIF, USB, MMC, SDHI, DU.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
Signed-off-by: Nobuyuki HIRAI <nobuyuki.hirai.xe@renesas.com>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, minor fixes]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-10-27 16:40:52 +01:00
Sergei Shtylyov 24799c22ae sh-pfc: r8a7778: Add CAN pin groups
Add CAN data and clock pin groups to R8A7778 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-10-27 16:40:51 +01:00
Alexandre Belloni 61e310a1ed pinctrl: at91: correct a few typos
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23 11:07:21 +02:00
Sachin Kamat f2e9394d1a pinctrl: mvebu: remove redundant of_match_ptr
The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23 10:55:04 +02:00
Wei Yongjun 7ddd183738 pinctrl: tb10x: use module_platform_driver to simplify the code
module_platform_driver() makes the code simpler by eliminating
boilerplate code.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23 10:46:00 +02:00
Wei Yongjun 86467ff2dd pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()
This patch fix the error handling in tb10x_pinctrl_probe():
 - devm_ioremap_resource() return ERR_PTR() and never return NULL
 - remove the dev_err call to avoid redundant error message
 - pinctrl_register() returns NULL not ERR_PTR()

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23 10:41:22 +02:00
Tony Lindgren 1b9c0fb365 pinctrl: single: Fix build when not built on ARM
Looks like we need a little bit of arch specific handling
with the generic IRQ. Fix the issue with an ifdef the
same way as other drivers do.

ARM needs things set to IRQF_VALID, which also then sets
noprobe. Others seem to use just irq_set_noprobe().

Otherwise we can get:

drivers/pinctrl/pinctrl-single.c: In function 'pcs_irqdomain_map':
drivers/pinctrl/pinctrl-single.c:1750:2: error: implicit declaration of function 'set_irq_flags' [-Werror=implicit-function-declaration]
drivers/pinctrl/pinctrl-single.c:1750:21: error: 'IRQF_VALID' undeclared (first use in this function)
drivers/pinctrl/pinctrl-single.c:1750:34: error: 'IRQF_PROBE' undeclared (first use in this function)

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 16:43:06 -07:00
Heiko Stübner 5a92750133 pinctrl: rockchip: emulate both edge triggered interrupts
The gpio interrupt controller on Rockchip socs can do edge triggers only
for single edges but not both. Nevertheless a lot of gpio users rely on
the availability of both-edge triggered interrupts - i.e. gpio-keys.

Therefore implement a solution similar to pinctrl-coh901 re-setting the
triggering edge depending on the gpio value in the interrupt demuxer.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:55 +02:00
Heiko Stübner 6ca5274d1d pinctrl: rockchip: add rk3188 specifics
Besides the pull registers sitting in a separate place, the rk3188 also
has the peculiarity that the pull registers of the first bank are split
and the first half is sitting in the register space of the pmu.

Therefore this adds a special bank-type for the first bank, to handle
the two register sources.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:54 +02:00
Heiko Stübner d1358f90e3 pinctrl: rockchip: remove redundant check
The check limiting bias options to supported ones is already
done thru rockchip_pinconf_pull_valid. Therefore this check is
redundant and can be removed.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:53 +02:00
Heiko Stübner 65fca613b0 pinctrl: rockchip: add support for multiple bank types
There are Rockchip SoCs, namely the rk3188, that combine a set of
regular banks with banks that need special handling for some settings.

Therefore add the possibility for the driver to handle more than one
bank type.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:53 +02:00
Heiko Stübner a282926d65 pinctrl: rockchip: separate different sub-types more
Further investigation of the different Rockchip SoCs showed that
the differences especially in the pull settings are quite deep.
As further patches will show, the register layout for the pulls of
the rk3188 is quite strange. Also it is to assume, that later
Rockchip SoCs may introduce even more quirks in this regard, making
it hard to support all of those using the current generic pull_*
variables.

Therefore move the driver to hold the type of controller in an enum
and do the handling according to it in the necessary places. Also
instead of calculating the register in the get and set pull functions
move it to a type-specific callback.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:52 +02:00
Roel Kluin 6d0a4ed2b9 pinctrl: dove: unset twsi option3 for gconfig as well
This fixes a typo which left twsi config3 option enabled.

Cc: stable@vger.kernel.org
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:51 +02:00
Christian Ruppert 5aad0db1c1 pinctrl: add TB10x pin control driver
The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs.
Used to control the pinmux and is a prerequisite for the GPIO driver.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:51 +02:00
Christian Ruppert 586a87e6ed pinctrl/gpio: non-linear GPIO ranges accesible from gpiolib
This patch adds the infrastructure required to register non-linear gpio
ranges through gpiolib and the standard GPIO device tree bindings.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 15:33:50 +02:00
Linus Walleij 263c43a447 Linux 3.12-rc4
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Merge tag 'v3.12-rc4' into devel

Linux 3.12-rc4
2013-10-16 10:05:53 +02:00
Linus Walleij 873ee9ed2c pinctrl: coh901: mark GPIO lines used for IRQ
When an IRQ is started on a GPIO line, mark this GPIO as IRQ in
the gpiolib so we can keep track of the usage centrally.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 09:59:55 +02:00
Linus Walleij 494336f3a6 pinctrl: nomadik: mark GPIO lines used for IRQ
When an IRQ is started on a GPIO line, mark this GPIO as IRQ in
the gpiolib so we can keep track of the usage centrally.

Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16 09:59:55 +02:00
Tony Lindgren dc7743aa3c pinctrl: single: Add support for auxdata
For omaps, we still have dependencies to the legacy code
for handling the PRM (Power Reset Management) interrupts,
and also for reconfiguring the io wake-up chain after
changes.

Let's pass the PRM interrupt and the rearm functions via
auxdata. Then when at some point we have a proper PRM
driver, we can get the interrupt via device tree and
set up the rearm function as exported function in the
PRM driver.

By using auxdata we can remove a dependency to the
wake-up events for converting omap3 to be device
tree only.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-10 15:30:47 -07:00
Tony Lindgren 3e6cee1786 pinctrl: single: Add support for wake-up interrupts
The pin control registers can have interrupts for example
for device wake-up. These interrupts can be treated as a
chained interrupt controller as suggested earlier by
Linus Walleij <linus.walleij@linaro.org>.

This patch adds support for interrupts in a way that
should be pretty generic, and works for the omaps that
support wake-up interrupts. On omaps, there's an
interrupt enable and interrupt status bit for each pin.
The two pinctrl domains on omaps share a single interrupt
from the PRM chained interrupt handler. Support for
other similar hardware should be easy to add.

Note that this patch does not attempt to handle the
wake-up interrupts automatically unlike the earlier
patches. This patch allows the device drivers to do
a request_irq() on the wake-up pins as needed. I'll
try to do also a separate generic patch for handling
the wake-up events automatically.

Also note that as this patch makes the pinctrl-single
an irq controller, the current bindings need some
extra trickery to use interrupts from two different
interrupt controllers for the same driver. So it
might be worth waiting a little on the patches
enabling the wake-up interrupts from drivers as there
should be a generic way to handle it coming. And also
there's been discussion of interrupts-extended binding
for using interrupts from multiple interrupt controllers.

In any case, this patch should be ready to go allowing
handling the wake-up interrupts in a generic way, or
separately from the device drivers.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Cc: linux-kernel@vger.kernel.org
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-10 15:30:30 -07:00
Laxman Dewangan c8ce878206 pincntrl: add support for ams AS3722 pin control driver
The AS3722 is a compact system PMU suitable for mobile phones, tablets etc.

Add a driver to support accessing the GPIO, pinmux and pin configuration
of 8 GPIO pins found on the ams AS3722 through pin control driver and
gpiolib.

The driver will register itself as the pincontrol driver and gpio driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-10 17:38:29 +02:00
Tony Lindgren 02e483f66d pinctrl: single: Prepare for supporting SoC specific features
Let's replace is_pinconf with flags and add struct pcs_soc_data
so we can support SoC specific features like pin wake-up events.

Done in collaboration with Roger Quadros <rogerq@ti.com>.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: linux-kernel@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-09 14:47:54 -07:00
Sonic Zhang d3224ed140 pinctrl: pinctrl-adi2: disable IRQ when setting value
GPIO output value should be set after the GPIO interrupt is disabled.
Use BIT macro as well.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
[Edited commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-09 13:09:41 +02:00
Sonic Zhang 010c51e189 pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.
Also avoid use NULL pointer in error message.

v2-changes:
- use port pinter only after checking

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-09 13:07:05 +02:00
Laxman Dewangan a047914e7f pinctrl: palmas: remove pin config BIAS_PULL_PIN_DEFAULT support
Palmas devices do not support the default bias configuration
and hence removing this option from valid pin config parameters.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 13:27:27 +02:00
Linus Walleij bfabb59433 Linux 3.12-rc4
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Merge tag 'v3.12-rc4' into devel

Linux 3.12-rc4
2013-10-08 13:27:11 +02:00
Rong Wang 6a08a92ec4 pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1).
here we add this pinmux capability.
USB1/UART1 mode selection has dedicated control register in RSC module, here we attach
the register offset of private data of related pin groups.

Signed-off-by: Rong Wang <Rong.Wang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 10:19:26 +02:00
Qipan Li af614b2301 pinctrl: sirf: add lost USP-based UART pin groups for prima2
USP(Universal Serial Ports) can be UART as commit 5df831117b,
this patch defines the USP-based UART function pin groups for prima2.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 10:18:15 +02:00
Qipan Li fb85f4290d pinctrl: sirf: add lost uart0-no-stream-control pingroup for prima2
the old codes defined uart0_nostreamctrl_pins, but missed pingroup
and padmux definition for it. this patch fixes it.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 10:16:34 +02:00
Sachin Kamat 606fca94f7 pinctrl: remove redundant of_match_ptr
The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.

This is a squash commit of:
pinctrl: at91: Remove redundant of_match_ptr
pinctrl: exynos5440: Remove redundant of_match_ptr
pinctrl: imx35: Remove redundant of_match_ptr
pinctrl: imx51: Remove redundant of_match_ptr
pinctrl: imx53: Remove redundant of_match_ptr
pinctrl: imx6dl: Remove redundant of_match_ptr
pinctrl: imx6q: Remove redundant of_match_ptr
pinctrl: samsung: Remove redundant of_match_ptr
pinctrl: vf610: Remove redundant of_match_ptr
pinctrl: imx6sl: Remove redundant of_match_ptr
pinctrl: plgpio: Remove redundant of_match_ptr

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 10:02:25 +02:00