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Maciej W. Rozycki 8ff374b9c2 MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 		2013-09-18 20:25:19 +02:00
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Makefile
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Platform
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a20r.c serial: sccnxp: Using CLK API for getting UART clock 2013-07-31 18:08:01 -07:00
eisa.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
irq.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
pcimt.c MIPS: SNI: pcimt: Guard sni_controller with CONFIG_PCI 2013-06-25 16:47:33 +02:00
pcit.c MIPS: SNI: pcit: Fix build error with CONFIG_PCI=n disabled. 2013-06-25 17:10:28 +02:00
reset.c Disintegrate asm/system.h for MIPS 2012-03-28 18:30:02 +01:00
rm200.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
setup.c MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 2013-09-18 20:25:19 +02:00
time.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00